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/drivers/staging/iio/meter/ade7753.c

http://github.com/tom3q/spica-3.0
C | 620 lines | 517 code | 87 blank | 16 comment | 29 complexity | 1925f362b9df04728be5b36f96859db2 MD5 | raw file
Possible License(s): AGPL-1.0, GPL-2.0, LGPL-2.0
  1. /*
  2. * ADE7753 Single-Phase Multifunction Metering IC with di/dt Sensor Interface
  3. *
  4. * Copyright 2010 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/interrupt.h>
  9. #include <linux/irq.h>
  10. #include <linux/gpio.h>
  11. #include <linux/delay.h>
  12. #include <linux/mutex.h>
  13. #include <linux/device.h>
  14. #include <linux/kernel.h>
  15. #include <linux/spi/spi.h>
  16. #include <linux/slab.h>
  17. #include <linux/sysfs.h>
  18. #include <linux/list.h>
  19. #include "../iio.h"
  20. #include "../sysfs.h"
  21. #include "meter.h"
  22. #include "ade7753.h"
  23. static int ade7753_spi_write_reg_8(struct device *dev,
  24. u8 reg_address,
  25. u8 val)
  26. {
  27. int ret;
  28. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  29. struct ade7753_state *st = iio_dev_get_devdata(indio_dev);
  30. mutex_lock(&st->buf_lock);
  31. st->tx[0] = ADE7753_WRITE_REG(reg_address);
  32. st->tx[1] = val;
  33. ret = spi_write(st->us, st->tx, 2);
  34. mutex_unlock(&st->buf_lock);
  35. return ret;
  36. }
  37. static int ade7753_spi_write_reg_16(struct device *dev,
  38. u8 reg_address,
  39. u16 value)
  40. {
  41. int ret;
  42. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  43. struct ade7753_state *st = iio_dev_get_devdata(indio_dev);
  44. mutex_lock(&st->buf_lock);
  45. st->tx[0] = ADE7753_WRITE_REG(reg_address);
  46. st->tx[1] = (value >> 8) & 0xFF;
  47. st->tx[2] = value & 0xFF;
  48. ret = spi_write(st->us, st->tx, 3);
  49. mutex_unlock(&st->buf_lock);
  50. return ret;
  51. }
  52. static int ade7753_spi_read_reg_8(struct device *dev,
  53. u8 reg_address,
  54. u8 *val)
  55. {
  56. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  57. struct ade7753_state *st = iio_dev_get_devdata(indio_dev);
  58. ssize_t ret;
  59. ret = spi_w8r8(st->us, ADE7753_READ_REG(reg_address));
  60. if (ret < 0) {
  61. dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
  62. reg_address);
  63. return ret;
  64. }
  65. *val = ret;
  66. return 0;
  67. }
  68. static int ade7753_spi_read_reg_16(struct device *dev,
  69. u8 reg_address,
  70. u16 *val)
  71. {
  72. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  73. struct ade7753_state *st = iio_dev_get_devdata(indio_dev);
  74. ssize_t ret;
  75. ret = spi_w8r16(st->us, ADE7753_READ_REG(reg_address));
  76. if (ret < 0) {
  77. dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
  78. reg_address);
  79. return ret;
  80. }
  81. *val = ret;
  82. *val = be16_to_cpup(val);
  83. return 0;
  84. }
  85. static int ade7753_spi_read_reg_24(struct device *dev,
  86. u8 reg_address,
  87. u32 *val)
  88. {
  89. struct spi_message msg;
  90. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  91. struct ade7753_state *st = iio_dev_get_devdata(indio_dev);
  92. int ret;
  93. struct spi_transfer xfers[] = {
  94. {
  95. .tx_buf = st->tx,
  96. .bits_per_word = 8,
  97. .len = 1,
  98. }, {
  99. .rx_buf = st->tx,
  100. .bits_per_word = 8,
  101. .len = 3,
  102. }
  103. };
  104. mutex_lock(&st->buf_lock);
  105. st->tx[0] = ADE7753_READ_REG(reg_address);
  106. spi_message_init(&msg);
  107. spi_message_add_tail(&xfers[0], &msg);
  108. spi_message_add_tail(&xfers[1], &msg);
  109. ret = spi_sync(st->us, &msg);
  110. if (ret) {
  111. dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
  112. reg_address);
  113. goto error_ret;
  114. }
  115. *val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2];
  116. error_ret:
  117. mutex_unlock(&st->buf_lock);
  118. return ret;
  119. }
  120. static ssize_t ade7753_read_8bit(struct device *dev,
  121. struct device_attribute *attr,
  122. char *buf)
  123. {
  124. int ret;
  125. u8 val;
  126. struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
  127. ret = ade7753_spi_read_reg_8(dev, this_attr->address, &val);
  128. if (ret)
  129. return ret;
  130. return sprintf(buf, "%u\n", val);
  131. }
  132. static ssize_t ade7753_read_16bit(struct device *dev,
  133. struct device_attribute *attr,
  134. char *buf)
  135. {
  136. int ret;
  137. u16 val;
  138. struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
  139. ret = ade7753_spi_read_reg_16(dev, this_attr->address, &val);
  140. if (ret)
  141. return ret;
  142. return sprintf(buf, "%u\n", val);
  143. }
  144. static ssize_t ade7753_read_24bit(struct device *dev,
  145. struct device_attribute *attr,
  146. char *buf)
  147. {
  148. int ret;
  149. u32 val;
  150. struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
  151. ret = ade7753_spi_read_reg_24(dev, this_attr->address, &val);
  152. if (ret)
  153. return ret;
  154. return sprintf(buf, "%u\n", val);
  155. }
  156. static ssize_t ade7753_write_8bit(struct device *dev,
  157. struct device_attribute *attr,
  158. const char *buf,
  159. size_t len)
  160. {
  161. struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
  162. int ret;
  163. long val;
  164. ret = strict_strtol(buf, 10, &val);
  165. if (ret)
  166. goto error_ret;
  167. ret = ade7753_spi_write_reg_8(dev, this_attr->address, val);
  168. error_ret:
  169. return ret ? ret : len;
  170. }
  171. static ssize_t ade7753_write_16bit(struct device *dev,
  172. struct device_attribute *attr,
  173. const char *buf,
  174. size_t len)
  175. {
  176. struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
  177. int ret;
  178. long val;
  179. ret = strict_strtol(buf, 10, &val);
  180. if (ret)
  181. goto error_ret;
  182. ret = ade7753_spi_write_reg_16(dev, this_attr->address, val);
  183. error_ret:
  184. return ret ? ret : len;
  185. }
  186. static int ade7753_reset(struct device *dev)
  187. {
  188. u16 val;
  189. ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
  190. val |= 1 << 6; /* Software Chip Reset */
  191. return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
  192. }
  193. static ssize_t ade7753_write_reset(struct device *dev,
  194. struct device_attribute *attr,
  195. const char *buf, size_t len)
  196. {
  197. if (len < 1)
  198. return -1;
  199. switch (buf[0]) {
  200. case '1':
  201. case 'y':
  202. case 'Y':
  203. return ade7753_reset(dev);
  204. }
  205. return -1;
  206. }
  207. static IIO_DEV_ATTR_AENERGY(ade7753_read_24bit, ADE7753_AENERGY);
  208. static IIO_DEV_ATTR_LAENERGY(ade7753_read_24bit, ADE7753_LAENERGY);
  209. static IIO_DEV_ATTR_VAENERGY(ade7753_read_24bit, ADE7753_VAENERGY);
  210. static IIO_DEV_ATTR_LVAENERGY(ade7753_read_24bit, ADE7753_LVAENERGY);
  211. static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO,
  212. ade7753_read_16bit,
  213. ade7753_write_16bit,
  214. ADE7753_CFDEN);
  215. static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO,
  216. ade7753_read_8bit,
  217. ade7753_write_8bit,
  218. ADE7753_CFNUM);
  219. static IIO_DEV_ATTR_CHKSUM(ade7753_read_8bit, ADE7753_CHKSUM);
  220. static IIO_DEV_ATTR_PHCAL(S_IWUSR | S_IRUGO,
  221. ade7753_read_16bit,
  222. ade7753_write_16bit,
  223. ADE7753_PHCAL);
  224. static IIO_DEV_ATTR_APOS(S_IWUSR | S_IRUGO,
  225. ade7753_read_16bit,
  226. ade7753_write_16bit,
  227. ADE7753_APOS);
  228. static IIO_DEV_ATTR_SAGCYC(S_IWUSR | S_IRUGO,
  229. ade7753_read_8bit,
  230. ade7753_write_8bit,
  231. ADE7753_SAGCYC);
  232. static IIO_DEV_ATTR_SAGLVL(S_IWUSR | S_IRUGO,
  233. ade7753_read_8bit,
  234. ade7753_write_8bit,
  235. ADE7753_SAGLVL);
  236. static IIO_DEV_ATTR_LINECYC(S_IWUSR | S_IRUGO,
  237. ade7753_read_8bit,
  238. ade7753_write_8bit,
  239. ADE7753_LINECYC);
  240. static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
  241. ade7753_read_8bit,
  242. ade7753_write_8bit,
  243. ADE7753_WDIV);
  244. static IIO_DEV_ATTR_IRMS(S_IWUSR | S_IRUGO,
  245. ade7753_read_24bit,
  246. NULL,
  247. ADE7753_IRMS);
  248. static IIO_DEV_ATTR_VRMS(S_IRUGO,
  249. ade7753_read_24bit,
  250. NULL,
  251. ADE7753_VRMS);
  252. static IIO_DEV_ATTR_IRMSOS(S_IWUSR | S_IRUGO,
  253. ade7753_read_16bit,
  254. ade7753_write_16bit,
  255. ADE7753_IRMSOS);
  256. static IIO_DEV_ATTR_VRMSOS(S_IWUSR | S_IRUGO,
  257. ade7753_read_16bit,
  258. ade7753_write_16bit,
  259. ADE7753_VRMSOS);
  260. static IIO_DEV_ATTR_WGAIN(S_IWUSR | S_IRUGO,
  261. ade7753_read_16bit,
  262. ade7753_write_16bit,
  263. ADE7753_WGAIN);
  264. static IIO_DEV_ATTR_VAGAIN(S_IWUSR | S_IRUGO,
  265. ade7753_read_16bit,
  266. ade7753_write_16bit,
  267. ADE7753_VAGAIN);
  268. static IIO_DEV_ATTR_PGA_GAIN(S_IWUSR | S_IRUGO,
  269. ade7753_read_16bit,
  270. ade7753_write_16bit,
  271. ADE7753_GAIN);
  272. static IIO_DEV_ATTR_IPKLVL(S_IWUSR | S_IRUGO,
  273. ade7753_read_8bit,
  274. ade7753_write_8bit,
  275. ADE7753_IPKLVL);
  276. static IIO_DEV_ATTR_VPKLVL(S_IWUSR | S_IRUGO,
  277. ade7753_read_8bit,
  278. ade7753_write_8bit,
  279. ADE7753_VPKLVL);
  280. static IIO_DEV_ATTR_IPEAK(S_IRUGO,
  281. ade7753_read_24bit,
  282. NULL,
  283. ADE7753_IPEAK);
  284. static IIO_DEV_ATTR_VPEAK(S_IRUGO,
  285. ade7753_read_24bit,
  286. NULL,
  287. ADE7753_VPEAK);
  288. static IIO_DEV_ATTR_VPERIOD(S_IRUGO,
  289. ade7753_read_16bit,
  290. NULL,
  291. ADE7753_PERIOD);
  292. static IIO_DEV_ATTR_CH_OFF(1, S_IWUSR | S_IRUGO,
  293. ade7753_read_8bit,
  294. ade7753_write_8bit,
  295. ADE7753_CH1OS);
  296. static IIO_DEV_ATTR_CH_OFF(2, S_IWUSR | S_IRUGO,
  297. ade7753_read_8bit,
  298. ade7753_write_8bit,
  299. ADE7753_CH2OS);
  300. static int ade7753_set_irq(struct device *dev, bool enable)
  301. {
  302. int ret;
  303. u8 irqen;
  304. ret = ade7753_spi_read_reg_8(dev, ADE7753_IRQEN, &irqen);
  305. if (ret)
  306. goto error_ret;
  307. if (enable)
  308. irqen |= 1 << 3; /* Enables an interrupt when a data is
  309. present in the waveform register */
  310. else
  311. irqen &= ~(1 << 3);
  312. ret = ade7753_spi_write_reg_8(dev, ADE7753_IRQEN, irqen);
  313. error_ret:
  314. return ret;
  315. }
  316. /* Power down the device */
  317. static int ade7753_stop_device(struct device *dev)
  318. {
  319. u16 val;
  320. ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
  321. val |= 1 << 4; /* AD converters can be turned off */
  322. return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
  323. }
  324. static int ade7753_initial_setup(struct ade7753_state *st)
  325. {
  326. int ret;
  327. struct device *dev = &st->indio_dev->dev;
  328. /* use low spi speed for init */
  329. st->us->mode = SPI_MODE_3;
  330. spi_setup(st->us);
  331. /* Disable IRQ */
  332. ret = ade7753_set_irq(dev, false);
  333. if (ret) {
  334. dev_err(dev, "disable irq failed");
  335. goto err_ret;
  336. }
  337. ade7753_reset(dev);
  338. msleep(ADE7753_STARTUP_DELAY);
  339. err_ret:
  340. return ret;
  341. }
  342. static ssize_t ade7753_read_frequency(struct device *dev,
  343. struct device_attribute *attr,
  344. char *buf)
  345. {
  346. int ret, len = 0;
  347. u8 t;
  348. int sps;
  349. ret = ade7753_spi_read_reg_8(dev, ADE7753_MODE, &t);
  350. if (ret)
  351. return ret;
  352. t = (t >> 11) & 0x3;
  353. sps = 27900 / (1 + t);
  354. len = sprintf(buf, "%d\n", sps);
  355. return len;
  356. }
  357. static ssize_t ade7753_write_frequency(struct device *dev,
  358. struct device_attribute *attr,
  359. const char *buf,
  360. size_t len)
  361. {
  362. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  363. struct ade7753_state *st = iio_dev_get_devdata(indio_dev);
  364. unsigned long val;
  365. int ret;
  366. u16 reg, t;
  367. ret = strict_strtol(buf, 10, &val);
  368. if (ret)
  369. return ret;
  370. mutex_lock(&indio_dev->mlock);
  371. t = (27900 / val);
  372. if (t > 0)
  373. t--;
  374. if (t > 1)
  375. st->us->max_speed_hz = ADE7753_SPI_SLOW;
  376. else
  377. st->us->max_speed_hz = ADE7753_SPI_FAST;
  378. ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &reg);
  379. if (ret)
  380. goto out;
  381. reg &= ~(3 << 11);
  382. reg |= t << 11;
  383. ret = ade7753_spi_write_reg_16(dev, ADE7753_MODE, reg);
  384. out:
  385. mutex_unlock(&indio_dev->mlock);
  386. return ret ? ret : len;
  387. }
  388. static IIO_DEV_ATTR_TEMP_RAW(ade7753_read_8bit);
  389. static IIO_CONST_ATTR(temp_offset, "-25 C");
  390. static IIO_CONST_ATTR(temp_scale, "0.67 C");
  391. static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
  392. ade7753_read_frequency,
  393. ade7753_write_frequency);
  394. static IIO_DEV_ATTR_RESET(ade7753_write_reset);
  395. static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("27900 14000 7000 3500");
  396. static struct attribute *ade7753_attributes[] = {
  397. &iio_dev_attr_temp_raw.dev_attr.attr,
  398. &iio_const_attr_temp_offset.dev_attr.attr,
  399. &iio_const_attr_temp_scale.dev_attr.attr,
  400. &iio_dev_attr_sampling_frequency.dev_attr.attr,
  401. &iio_const_attr_sampling_frequency_available.dev_attr.attr,
  402. &iio_dev_attr_reset.dev_attr.attr,
  403. &iio_dev_attr_phcal.dev_attr.attr,
  404. &iio_dev_attr_cfden.dev_attr.attr,
  405. &iio_dev_attr_aenergy.dev_attr.attr,
  406. &iio_dev_attr_laenergy.dev_attr.attr,
  407. &iio_dev_attr_vaenergy.dev_attr.attr,
  408. &iio_dev_attr_lvaenergy.dev_attr.attr,
  409. &iio_dev_attr_cfnum.dev_attr.attr,
  410. &iio_dev_attr_apos.dev_attr.attr,
  411. &iio_dev_attr_sagcyc.dev_attr.attr,
  412. &iio_dev_attr_saglvl.dev_attr.attr,
  413. &iio_dev_attr_linecyc.dev_attr.attr,
  414. &iio_dev_attr_chksum.dev_attr.attr,
  415. &iio_dev_attr_pga_gain.dev_attr.attr,
  416. &iio_dev_attr_wgain.dev_attr.attr,
  417. &iio_dev_attr_choff_1.dev_attr.attr,
  418. &iio_dev_attr_choff_2.dev_attr.attr,
  419. &iio_dev_attr_wdiv.dev_attr.attr,
  420. &iio_dev_attr_irms.dev_attr.attr,
  421. &iio_dev_attr_vrms.dev_attr.attr,
  422. &iio_dev_attr_irmsos.dev_attr.attr,
  423. &iio_dev_attr_vrmsos.dev_attr.attr,
  424. &iio_dev_attr_vagain.dev_attr.attr,
  425. &iio_dev_attr_ipklvl.dev_attr.attr,
  426. &iio_dev_attr_vpklvl.dev_attr.attr,
  427. &iio_dev_attr_ipeak.dev_attr.attr,
  428. &iio_dev_attr_vpeak.dev_attr.attr,
  429. &iio_dev_attr_vperiod.dev_attr.attr,
  430. NULL,
  431. };
  432. static const struct attribute_group ade7753_attribute_group = {
  433. .attrs = ade7753_attributes,
  434. };
  435. static const struct iio_info ade7753_info = {
  436. .attrs = &ade7753_attribute_group,
  437. .driver_module = THIS_MODULE,
  438. };
  439. static int __devinit ade7753_probe(struct spi_device *spi)
  440. {
  441. int ret, regdone = 0;
  442. struct ade7753_state *st = kzalloc(sizeof *st, GFP_KERNEL);
  443. if (!st) {
  444. ret = -ENOMEM;
  445. goto error_ret;
  446. }
  447. /* this is only used for removal purposes */
  448. spi_set_drvdata(spi, st);
  449. /* Allocate the comms buffers */
  450. st->rx = kzalloc(sizeof(*st->rx)*ADE7753_MAX_RX, GFP_KERNEL);
  451. if (st->rx == NULL) {
  452. ret = -ENOMEM;
  453. goto error_free_st;
  454. }
  455. st->tx = kzalloc(sizeof(*st->tx)*ADE7753_MAX_TX, GFP_KERNEL);
  456. if (st->tx == NULL) {
  457. ret = -ENOMEM;
  458. goto error_free_rx;
  459. }
  460. st->us = spi;
  461. mutex_init(&st->buf_lock);
  462. /* setup the industrialio driver allocated elements */
  463. st->indio_dev = iio_allocate_device(0);
  464. if (st->indio_dev == NULL) {
  465. ret = -ENOMEM;
  466. goto error_free_tx;
  467. }
  468. st->indio_dev->name = spi->dev.driver->name;
  469. st->indio_dev->dev.parent = &spi->dev;
  470. st->indio_dev->info = &ade7753_info;
  471. st->indio_dev->dev_data = (void *)(st);
  472. st->indio_dev->modes = INDIO_DIRECT_MODE;
  473. ret = iio_device_register(st->indio_dev);
  474. if (ret)
  475. goto error_free_dev;
  476. regdone = 1;
  477. /* Get the device into a sane initial state */
  478. ret = ade7753_initial_setup(st);
  479. if (ret)
  480. goto error_free_dev;
  481. return 0;
  482. error_free_dev:
  483. if (regdone)
  484. iio_device_unregister(st->indio_dev);
  485. else
  486. iio_free_device(st->indio_dev);
  487. error_free_tx:
  488. kfree(st->tx);
  489. error_free_rx:
  490. kfree(st->rx);
  491. error_free_st:
  492. kfree(st);
  493. error_ret:
  494. return ret;
  495. }
  496. /* fixme, confirm ordering in this function */
  497. static int ade7753_remove(struct spi_device *spi)
  498. {
  499. int ret;
  500. struct ade7753_state *st = spi_get_drvdata(spi);
  501. struct iio_dev *indio_dev = st->indio_dev;
  502. ret = ade7753_stop_device(&(indio_dev->dev));
  503. if (ret)
  504. goto err_ret;
  505. iio_device_unregister(indio_dev);
  506. kfree(st->tx);
  507. kfree(st->rx);
  508. kfree(st);
  509. return 0;
  510. err_ret:
  511. return ret;
  512. }
  513. static struct spi_driver ade7753_driver = {
  514. .driver = {
  515. .name = "ade7753",
  516. .owner = THIS_MODULE,
  517. },
  518. .probe = ade7753_probe,
  519. .remove = __devexit_p(ade7753_remove),
  520. };
  521. static __init int ade7753_init(void)
  522. {
  523. return spi_register_driver(&ade7753_driver);
  524. }
  525. module_init(ade7753_init);
  526. static __exit void ade7753_exit(void)
  527. {
  528. spi_unregister_driver(&ade7753_driver);
  529. }
  530. module_exit(ade7753_exit);
  531. MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
  532. MODULE_DESCRIPTION("Analog Devices ADE7753/6 Single-Phase Multifunction Meter");
  533. MODULE_LICENSE("GPL v2");