// This file is part of www.nand2tetris.org

// and the book "The Elements of Computing Systems"

// by Nisan and Schocken, MIT Press.

// File name: projects/03/b/RAM4K.hdl



/**

 * Memory of 4K registers, each 16-bit wide.  

 * The chip facilitates read and write operations, as follows:

 *     Read:  out(t) = RAM4K[address(t)](t)

 *     Write: If load(t-1) then RAM4K[address(t-1)](t) = in(t-1)

 * In words: the chip always outputs the value stored at the memory 

 * location specified by address. If load == 1, the in value is loaded 

 * into the memory location specified by address.  This value becomes 

 * available through the out output starting from the next time step.

 */



CHIP RAM4K {

    IN in[16], load, address[12];

    OUT out[16];



    PARTS:

    DMux8Way(in=load,sel=address[9..11],a=selA,b=selB,c=selC,d=selD,e=selE,f=selF,g=selG,h=selH);

    RAM512(in=in,load=selA,out=outA,address=address[0..8]);

    RAM512(in=in,load=selB,out=outB,address=address[0..8]);

    RAM512(in=in,load=selC,out=outC,address=address[0..8]);

    RAM512(in=in,load=selD,out=outD,address=address[0..8]);

    RAM512(in=in,load=selE,out=outE,address=address[0..8]);

    RAM512(in=in,load=selF,out=outF,address=address[0..8]);

    RAM512(in=in,load=selG,out=outG,address=address[0..8]);

    RAM512(in=in,load=selH,out=outH,address=address[0..8]);

    Mux8Way16(a=outA,b=outB,c=outC,d=outD,e=outE,f=outF,g=outG,h=outH,sel=address[9..11],out=out);

}