/drivers/media/video/samsung/fimc/fimc_capture.c
C | 3475 lines | 2789 code | 511 blank | 175 comment | 619 complexity | d33bd73fb31f967958d3b8e70bb8acec MD5 | raw file
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1/* linux/drivers/media/video/samsung/fimc_capture.c 2 * 3 * Copyright (c) 2010 Samsung Electronics Co., Ltd. 4 * http://www.samsung.com/ 5 * 6 * V4L2 Capture device support file for Samsung Camera Interface (FIMC) driver 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11*/ 12 13#include <linux/slab.h> 14#include <linux/bootmem.h> 15#include <linux/string.h> 16#include <linux/platform_device.h> 17#include <linux/videodev2.h> 18#include <linux/videodev2_exynos_media.h> 19#include <linux/videodev2_exynos_camera.h> 20#include <linux/clk.h> 21#include <linux/mm.h> 22#include <linux/dma-mapping.h> 23#include <linux/io.h> 24#include <linux/uaccess.h> 25#include <plat/media.h> 26#include <plat/clock.h> 27#include <plat/fimc.h> 28#include <linux/delay.h> 29 30#include <asm/cacheflush.h> 31#include <linux/pm_qos_params.h> 32 33#include "fimc.h" 34 35static struct pm_qos_request_list bus_qos_pm_qos_req; 36 37static const struct v4l2_fmtdesc capture_fmts[] = { 38 { 39 .index = 0, 40 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 41 .flags = FORMAT_FLAGS_PACKED, 42 .description = "RGB-5-6-5", 43 .pixelformat = V4L2_PIX_FMT_RGB565, 44 }, { 45 .index = 1, 46 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 47 .flags = FORMAT_FLAGS_PACKED, 48 .description = "RGB-8-8-8, unpacked 24 bpp", 49 .pixelformat = V4L2_PIX_FMT_RGB32, 50 }, { 51 .index = 2, 52 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 53 .flags = FORMAT_FLAGS_PACKED, 54 .description = "YUV 4:2:2 packed, YCbYCr", 55 .pixelformat = V4L2_PIX_FMT_YUYV, 56 }, { 57 .index = 3, 58 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 59 .flags = FORMAT_FLAGS_PACKED, 60 .description = "YUV 4:2:2 packed, CbYCrY", 61 .pixelformat = V4L2_PIX_FMT_UYVY, 62 }, { 63 .index = 4, 64 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 65 .flags = FORMAT_FLAGS_PACKED, 66 .description = "YUV 4:2:2 packed, CrYCbY", 67 .pixelformat = V4L2_PIX_FMT_VYUY, 68 }, { 69 .index = 5, 70 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 71 .flags = FORMAT_FLAGS_PACKED, 72 .description = "YUV 4:2:2 packed, YCrYCb", 73 .pixelformat = V4L2_PIX_FMT_YVYU, 74 }, { 75 .index = 6, 76 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 77 .flags = FORMAT_FLAGS_PLANAR, 78 .description = "YUV 4:2:2 planar, Y/Cb/Cr", 79 .pixelformat = V4L2_PIX_FMT_YUV422P, 80 }, { 81 .index = 7, 82 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 83 .flags = FORMAT_FLAGS_PLANAR, 84 .description = "YUV 4:2:0 planar, Y/CbCr", 85 .pixelformat = V4L2_PIX_FMT_NV12, 86 }, { 87 .index = 8, 88 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 89 .flags = FORMAT_FLAGS_PLANAR, 90 .description = "YUV 4:2:0 planar, Y/CbCr, Tiled", 91 .pixelformat = V4L2_PIX_FMT_NV12T, 92 }, { 93 .index = 9, 94 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 95 .flags = FORMAT_FLAGS_PLANAR, 96 .description = "YUV 4:2:0 planar, Y/CrCb", 97 .pixelformat = V4L2_PIX_FMT_NV21, 98 }, { 99 .index = 10, 100 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 101 .flags = FORMAT_FLAGS_PLANAR, 102 .description = "YUV 4:2:2 planar, Y/CbCr", 103 .pixelformat = V4L2_PIX_FMT_NV16, 104 }, { 105 .index = 11, 106 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 107 .flags = FORMAT_FLAGS_PLANAR, 108 .description = "YUV 4:2:2 planar, Y/CrCb", 109 .pixelformat = V4L2_PIX_FMT_NV61, 110 }, { 111 .index = 12, 112 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 113 .flags = FORMAT_FLAGS_PLANAR, 114 .description = "YUV 4:2:0 planar, Y/Cb/Cr", 115 .pixelformat = V4L2_PIX_FMT_YUV420, 116 }, { 117 .index = 13, 118 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 119 .flags = FORMAT_FLAGS_PLANAR, 120 .description = "YUV 4:2:0 planar, Y/Cr/Cb", 121 .pixelformat = V4L2_PIX_FMT_YVU420, 122 }, { 123 .index = 14, 124 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 125 .description = "JPEG encoded data", 126 .pixelformat = V4L2_PIX_FMT_JPEG, 127 }, { 128 .index = 15, 129 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 130 .description = "Interleaved data", 131 .pixelformat = V4L2_PIX_FMT_INTERLEAVED, 132 }, 133}; 134 135static const struct v4l2_queryctrl fimc_controls[] = { 136 { 137 .id = V4L2_CID_ROTATION, 138 .type = V4L2_CTRL_TYPE_BOOLEAN, 139 .name = "Roataion", 140 .minimum = 0, 141 .maximum = 270, 142 .step = 90, 143 .default_value = 0, 144 }, { 145 .id = V4L2_CID_HFLIP, 146 .type = V4L2_CTRL_TYPE_BOOLEAN, 147 .name = "Horizontal Flip", 148 .minimum = 0, 149 .maximum = 1, 150 .step = 1, 151 .default_value = 0, 152 }, { 153 .id = V4L2_CID_VFLIP, 154 .type = V4L2_CTRL_TYPE_BOOLEAN, 155 .name = "Vertical Flip", 156 .minimum = 0, 157 .maximum = 1, 158 .step = 1, 159 .default_value = 0, 160 }, { 161 .id = V4L2_CID_PADDR_Y, 162 .type = V4L2_CTRL_TYPE_BOOLEAN, 163 .name = "Physical address Y", 164 .minimum = 0, 165 .maximum = 1, 166 .step = 1, 167 .default_value = 0, 168 .flags = V4L2_CTRL_FLAG_READ_ONLY, 169 }, { 170 .id = V4L2_CID_PADDR_CB, 171 .type = V4L2_CTRL_TYPE_BOOLEAN, 172 .name = "Physical address Cb", 173 .minimum = 0, 174 .maximum = 1, 175 .step = 1, 176 .default_value = 0, 177 .flags = V4L2_CTRL_FLAG_READ_ONLY, 178 }, { 179 .id = V4L2_CID_PADDR_CR, 180 .type = V4L2_CTRL_TYPE_BOOLEAN, 181 .name = "Physical address Cr", 182 .minimum = 0, 183 .maximum = 1, 184 .step = 1, 185 .default_value = 0, 186 .flags = V4L2_CTRL_FLAG_READ_ONLY, 187 }, { 188 .id = V4L2_CID_PADDR_CBCR, 189 .type = V4L2_CTRL_TYPE_BOOLEAN, 190 .name = "Physical address CbCr", 191 .minimum = 0, 192 .maximum = 1, 193 .step = 1, 194 .default_value = 0, 195 .flags = V4L2_CTRL_FLAG_READ_ONLY, 196 }, { 197 .id = V4L2_CID_CACHEABLE, 198 .type = V4L2_CTRL_TYPE_BOOLEAN, 199 .name = "Cacheable", 200 .minimum = 0, 201 .maximum = 1, 202 .step = 1, 203 .default_value = 0, 204 }, 205}; 206#ifdef CONFIG_MACH_GC1 207static bool leave_power; 208#endif 209 210#ifndef CONFIG_VIDEO_FIMC_MIPI 211void s3c_csis_start(int csis_id, int lanes, int settle, \ 212 int align, int width, int height, int pixel_format) {} 213void s3c_csis_stop(int csis_id) {} 214void s3c_csis_enable_pktdata(int csis_id, bool enable) {} 215#endif 216 217static int fimc_init_camera(struct fimc_control *ctrl) 218{ 219 struct fimc_global *fimc = get_fimc_dev(); 220 struct s3c_platform_fimc *pdata; 221 struct s3c_platform_camera *cam; 222 int ret = 0, retry_cnt = 0; 223 224#if (defined(CONFIG_EXYNOS_DEV_PD) && defined(CONFIG_PM_RUNTIME)) 225 struct platform_device *pdev = to_platform_device(ctrl->dev); 226#endif 227 pdata = to_fimc_plat(ctrl->dev); 228 229 cam = ctrl->cam; 230 231 /* do nothing if already initialized */ 232 if (ctrl->cam->initialized) 233 return 0; 234 235#if (defined(CONFIG_EXYNOS_DEV_PD) && defined(CONFIG_PM_RUNTIME)) 236 if (ctrl->power_status == FIMC_POWER_OFF) { 237 pm_runtime_get_sync(&pdev->dev); 238 } 239#endif 240 /* 241 * WriteBack mode doesn't need to set clock and power, 242 * but it needs to set source width, height depend on LCD resolution. 243 */ 244 if ((cam->id == CAMERA_WB) || (cam->id == CAMERA_WB_B)) { 245 ret = s3cfb_direct_ioctl(0, S3CFB_GET_LCD_WIDTH, 246 (unsigned long)&cam->width); 247 if (ret) { 248 fimc_err("fail to get LCD size\n"); 249#if (defined(CONFIG_EXYNOS_DEV_PD) && defined(CONFIG_PM_RUNTIME)) 250 pm_runtime_put_sync(&pdev->dev); 251#endif 252 return ret; 253 } 254 255 ret = s3cfb_direct_ioctl(0, S3CFB_GET_LCD_HEIGHT, 256 (unsigned long)&cam->height); 257 if (ret) { 258 fimc_err("fail to get LCD size\n"); 259#if (defined(CONFIG_EXYNOS_DEV_PD) && defined(CONFIG_PM_RUNTIME)) 260 pm_runtime_put_sync(&pdev->dev); 261#endif 262 return ret; 263 } 264 265 cam->window.width = cam->width; 266 cam->window.height = cam->height; 267 cam->initialized = 1; 268 269 return ret; 270 } 271 272retry: 273 /* set rate for mclk */ 274#ifndef CONFIG_MACH_GC1 275 if ((clk_get_rate(cam->clk)) && (fimc->mclk_status == CAM_MCLK_OFF)) { 276#else 277 if ((clk_get_rate(cam->clk)) && (fimc->mclk_status == CAM_MCLK_OFF) 278 && !leave_power) { 279#endif 280 clk_set_rate(cam->clk, cam->clk_rate); 281 clk_enable(cam->clk); 282 fimc->mclk_status = CAM_MCLK_ON; 283 fimc_info1("clock for camera: %d\n", cam->clk_rate); 284 } 285 286 /* enable camera power if needed */ 287 if (cam->cam_power) { 288#ifndef CONFIG_MACH_GC1 289 ret = cam->cam_power(1); 290#else 291 if (!leave_power) 292 ret = cam->cam_power(1); 293 294 leave_power = false; 295#endif 296 if (unlikely(ret < 0)) { 297 fimc_err("\nfail to power on\n"); 298 if (fimc->mclk_status == CAM_MCLK_ON) { 299 clk_disable(ctrl->cam->clk); 300 fimc->mclk_status = CAM_MCLK_OFF; 301 } 302#if (defined(CONFIG_EXYNOS_DEV_PD) && defined(CONFIG_PM_RUNTIME)) 303 pm_runtime_put_sync(&pdev->dev); 304#endif 305 return ret; 306 } 307 } 308 309#ifndef CONFIG_MACH_GC1 310 /* "0" argument means preview init for s5k4ea */ 311 ret = v4l2_subdev_call(cam->sd, core, init, 0); 312#endif 313 314 /* Retry camera power-up if first i2c fails. */ 315 if (unlikely(ret < 0)) { 316 if (cam->cam_power) 317 cam->cam_power(0); 318 319 if (fimc->mclk_status == CAM_MCLK_ON) { 320 clk_disable(ctrl->cam->clk); 321 fimc->mclk_status = CAM_MCLK_OFF; 322 } 323 if (retry_cnt++ < 3) { 324 msleep(100); 325 fimc_err("Retry power on(%d/3)\n\n", retry_cnt); 326 goto retry; 327 } else { 328 fimc_err("Camera power/init failed!!!!\n\n"); 329#if (defined(CONFIG_EXYNOS_DEV_PD) && defined(CONFIG_PM_RUNTIME)) 330 if (ctrl->power_status == FIMC_POWER_ON) { 331 pm_runtime_put_sync(&pdev->dev); 332 } 333#endif 334 } 335 } else { 336 /* Apply things to interface register */ 337 fimc_hwset_reset(ctrl); 338 cam->initialized = 1; 339 } 340 341 return ret; 342} 343 344static int fimc_camera_get_jpeg_memsize(struct fimc_control *ctrl) 345{ 346 int ret = 0; 347 struct v4l2_control cam_ctrl; 348 cam_ctrl.id = V4L2_CID_CAM_JPEG_MEMSIZE; 349 350 ret = v4l2_subdev_call(ctrl->cam->sd, core, g_ctrl, &cam_ctrl); 351 if (ret < 0) { 352 fimc_err("%s: Subdev doesn't support JEPG encoding.\n", \ 353 __func__); 354 return 0; 355 } 356 357 return cam_ctrl.value; 358} 359 360 361static int fimc_capture_scaler_info(struct fimc_control *ctrl) 362{ 363 struct fimc_scaler *sc = &ctrl->sc; 364 struct v4l2_rect *window = &ctrl->cam->window; 365 int tx, ty, sx, sy; 366 struct s3c_platform_fimc *pdata = to_fimc_plat(ctrl->dev); 367 int rot = 0; 368 369 if (!ctrl->cam->use_isp) { 370 sx = window->width; 371 sy = window->height; 372 } else { 373 sx = ctrl->is.fmt.width; 374 sy = ctrl->is.fmt.height; 375 } 376 377 sc->real_width = sx; 378 sc->real_height = sy; 379 380 rot = fimc_mapping_rot_flip(ctrl->cap->rotate, ctrl->cap->flip); 381 382 if (rot & FIMC_ROT) { 383 tx = ctrl->cap->fmt.height; 384 ty = ctrl->cap->fmt.width; 385 } else { 386 tx = ctrl->cap->fmt.width; 387 ty = ctrl->cap->fmt.height; 388 } 389 390 fimc_dbg("%s: CamOut (%d, %d), TargetOut (%d, %d)\n", 391 __func__, sx, sy, tx, ty); 392 393 if (sx <= 0 || sy <= 0) { 394 fimc_err("%s: invalid source size\n", __func__); 395 return -EINVAL; 396 } 397 398 if (tx <= 0 || ty <= 0) { 399 fimc_err("%s: invalid target size\n", __func__); 400 return -EINVAL; 401 } 402 403 fimc_get_scaler_factor(sx, tx, &sc->pre_hratio, &sc->hfactor); 404 fimc_get_scaler_factor(sy, ty, &sc->pre_vratio, &sc->vfactor); 405 406 if (sx == sy) { 407 if (sx*10/tx >= 15 && sx*10/tx < 20) { 408 sc->pre_hratio = 2; 409 sc->hfactor = 1; 410 } 411 if (sy*10/ty >= 15 && sy*10/ty < 20) { 412 sc->pre_vratio = 2; 413 sc->vfactor = 1; 414 } 415 } 416 417 418 sc->pre_dst_width = sx / sc->pre_hratio; 419 sc->pre_dst_height = sy / sc->pre_vratio; 420 421 if (pdata->hw_ver >= 0x50) { 422 sc->main_hratio = (sx << 14) / (tx << sc->hfactor); 423 sc->main_vratio = (sy << 14) / (ty << sc->vfactor); 424 } else { 425 sc->main_hratio = (sx << 8) / (tx << sc->hfactor); 426 sc->main_vratio = (sy << 8) / (ty << sc->vfactor); 427 } 428 429 sc->scaleup_h = (tx >= sx) ? 1 : 0; 430 sc->scaleup_v = (ty >= sy) ? 1 : 0; 431 432 return 0; 433} 434 435static int fimc_capture_change_scaler_info(struct fimc_control *ctrl) 436{ 437 struct fimc_scaler *sc = &ctrl->sc; 438 struct v4l2_rect *window = &ctrl->cam->window; 439 int tx, ty, sx, sy; 440 struct s3c_platform_fimc *pdata = to_fimc_plat(ctrl->dev); 441 int rot = 0; 442 443 if (!ctrl->cam->use_isp) { 444 sx = window->width; 445 sy = window->height; 446 } else { 447 sx = ctrl->is.zoom_in_width; 448 sy = ctrl->is.zoom_in_height; 449 } 450 451 sc->real_width = sx; 452 sc->real_height = sy; 453 454 rot = fimc_mapping_rot_flip(ctrl->cap->rotate, ctrl->cap->flip); 455 456 if (rot & FIMC_ROT) { 457 tx = ctrl->cap->fmt.height; 458 ty = ctrl->cap->fmt.width; 459 } else { 460 tx = ctrl->cap->fmt.width; 461 ty = ctrl->cap->fmt.height; 462 } 463 464 fimc_dbg("%s: CamOut (%d, %d), TargetOut (%d, %d)\n", 465 __func__, sx, sy, tx, ty); 466 467 if (sx <= 0 || sy <= 0) { 468 fimc_err("%s: invalid source size\n", __func__); 469 return -EINVAL; 470 } 471 472 if (tx <= 0 || ty <= 0) { 473 fimc_err("%s: invalid target size\n", __func__); 474 return -EINVAL; 475 } 476 477 fimc_get_scaler_factor(sx, tx, &sc->pre_hratio, &sc->hfactor); 478 fimc_get_scaler_factor(sy, ty, &sc->pre_vratio, &sc->vfactor); 479 480 sc->pre_dst_width = sx / sc->pre_hratio; 481 sc->pre_dst_height = sy / sc->pre_vratio; 482 483 if (pdata->hw_ver >= 0x50) { 484 sc->main_hratio = (sx << 14) / (tx << sc->hfactor); 485 sc->main_vratio = (sy << 14) / (ty << sc->vfactor); 486 } else { 487 sc->main_hratio = (sx << 8) / (tx << sc->hfactor); 488 sc->main_vratio = (sy << 8) / (ty << sc->vfactor); 489 } 490 491 sc->scaleup_h = (tx >= sx) ? 1 : 0; 492 sc->scaleup_v = (ty >= sy) ? 1 : 0; 493 494 return 0; 495} 496 497int fimc_start_zoom_capture(struct fimc_control *ctrl) 498{ 499 fimc_dbg("%s\n", __func__); 500 501 fimc_hwset_start_scaler(ctrl); 502 503 fimc_hwset_enable_capture(ctrl, ctrl->sc.bypass); 504 fimc_hwset_disable_frame_end_irq(ctrl); 505 506 return 0; 507} 508 509int fimc_stop_zoom_capture(struct fimc_control *ctrl) 510{ 511 fimc_dbg("%s\n", __func__); 512 if (!ctrl->cam) { 513 fimc_err("%s: No capture device.\n", __func__); 514 return -ENODEV; 515 } 516 517 if (!ctrl->cap) { 518 fimc_err("%s: No cappure format.\n", __func__); 519 return -ENODEV; 520 } 521 522 if (ctrl->cap->lastirq) { 523 fimc_hwset_enable_lastirq(ctrl); 524 fimc_hwset_disable_capture(ctrl); 525 fimc_hwset_disable_lastirq(ctrl); 526 } else { 527 fimc_hwset_disable_capture(ctrl); 528 fimc_hwset_enable_frame_end_irq(ctrl); 529 } 530 531 fimc_hwset_stop_scaler(ctrl); 532 return 0; 533} 534 535static int fimc_add_inqueue(struct fimc_control *ctrl, int i) 536{ 537 struct fimc_capinfo *cap = ctrl->cap; 538 struct fimc_buf_set *tmp_buf; 539 struct list_head *count; 540 541 /* PINGPONG_2ADDR_MODE Only */ 542 list_for_each(count, &cap->inq) { 543 tmp_buf = list_entry(count, struct fimc_buf_set, list); 544 /* skip list_add_tail if already buffer is in cap->inq list*/ 545 if (tmp_buf->id == i) 546 return 0; 547 } 548 list_add_tail(&cap->bufs[i].list, &cap->inq); 549 550 return 0; 551} 552 553static int fimc_add_outqueue(struct fimc_control *ctrl, int i) 554{ 555 struct fimc_capinfo *cap = ctrl->cap; 556 struct fimc_buf_set *buf; 557 unsigned int mask = 0x2; 558 559 /* PINGPONG_2ADDR_MODE Only */ 560 /* pair_buf_index stands for pair index of i. (0<->2) (1<->3) */ 561 int pair_buf_index = (i^mask); 562 563 /* FIMC have 4 h/w registers */ 564 if (i < 0 || i >= FIMC_PHYBUFS) { 565 fimc_err("%s: invalid queue index : %d\n", __func__, i); 566 return -ENOENT; 567 } 568 569 if (list_empty(&cap->inq)) 570 return -ENOENT; 571 572 buf = list_first_entry(&cap->inq, struct fimc_buf_set, list); 573 574 /* pair index buffer should be allocated first */ 575 cap->outq[pair_buf_index] = buf->id; 576 fimc_hwset_output_address(ctrl, buf, pair_buf_index); 577 578 cap->outq[i] = buf->id; 579 fimc_hwset_output_address(ctrl, buf, i); 580 581 list_del(&buf->list); 582 583 return 0; 584} 585 586int fimc_g_parm(struct file *file, void *fh, struct v4l2_streamparm *a) 587{ 588 struct fimc_control *ctrl = ((struct fimc_prv_data *)fh)->ctrl; 589 int ret = 0; 590 591 fimc_dbg("%s\n", __func__); 592 593 /* WriteBack doesn't have subdev_call */ 594 595 if ((ctrl->cam->id == CAMERA_WB) || (ctrl->cam->id == CAMERA_WB_B)) 596 return 0; 597 598 mutex_lock(&ctrl->v4l2_lock); 599 ret = v4l2_subdev_call(ctrl->cam->sd, video, g_parm, a); 600 mutex_unlock(&ctrl->v4l2_lock); 601 602 return ret; 603} 604 605int fimc_s_parm(struct file *file, void *fh, struct v4l2_streamparm *a) 606{ 607 struct fimc_control *ctrl = ((struct fimc_prv_data *)fh)->ctrl; 608 struct s3c_platform_fimc *pdata = to_fimc_plat(ctrl->dev); 609 int ret = 0; 610 int new_fps = a->parm.capture.timeperframe.denominator / 611 a->parm.capture.timeperframe.numerator; 612 613 fimc_info2("%s fimc%d, %d\n", __func__, ctrl->id, new_fps); 614 615 /* WriteBack doesn't have subdev_call */ 616 if ((ctrl->cam->id == CAMERA_WB) || (ctrl->cam->id == CAMERA_WB_B)) 617 return 0; 618 619 mutex_lock(&ctrl->v4l2_lock); 620 621 if (ctrl->cam->sd && fimc_cam_use) 622 ret = v4l2_subdev_call(ctrl->cam->sd, video, s_parm, a); 623 else if (ctrl->is.sd && fimc_cam_use) 624 ret = v4l2_subdev_call(ctrl->is.sd, video, s_parm, a); 625 626 mutex_unlock(&ctrl->v4l2_lock); 627 628 return ret; 629} 630 631/* Enumerate controls */ 632int fimc_queryctrl(struct file *file, void *fh, struct v4l2_queryctrl *qc) 633{ 634 struct fimc_control *ctrl = ((struct fimc_prv_data *)fh)->ctrl; 635 int i, ret; 636 637 fimc_dbg("%s\n", __func__); 638 639 for (i = 0; i < ARRAY_SIZE(fimc_controls); i++) { 640 if (fimc_controls[i].id == qc->id) { 641 memcpy(qc, &fimc_controls[i], sizeof(struct v4l2_queryctrl)); 642 return 0; 643 } 644 } 645 646 mutex_lock(&ctrl->v4l2_lock); 647 ret = v4l2_subdev_call(ctrl->cam->sd, core, queryctrl, qc); 648 mutex_unlock(&ctrl->v4l2_lock); 649 650 return ret; 651} 652 653/* Menu control items */ 654int fimc_querymenu(struct file *file, void *fh, struct v4l2_querymenu *qm) 655{ 656 struct fimc_control *ctrl = ((struct fimc_prv_data *)fh)->ctrl; 657 int ret = 0; 658 659 fimc_dbg("%s\n", __func__); 660 661 mutex_lock(&ctrl->v4l2_lock); 662 ret = v4l2_subdev_call(ctrl->cam->sd, core, querymenu, qm); 663 mutex_unlock(&ctrl->v4l2_lock); 664 665 return ret; 666} 667 668int fimc_enum_input(struct file *file, void *fh, struct v4l2_input *inp) 669{ 670 struct fimc_global *fimc = get_fimc_dev(); 671 struct fimc_control *ctrl = ((struct fimc_prv_data *)fh)->ctrl; 672 673 fimc_dbg("%s: index %d\n", __func__, inp->index); 674 675 if (inp->index >= FIMC_MAXCAMS) { 676 fimc_err("%s: invalid input index, received = %d\n", 677 __func__, inp->index); 678 return -EINVAL; 679 } 680 681 if (!fimc->camera_isvalid[inp->index]) 682 return -EINVAL; 683 mutex_lock(&ctrl->v4l2_lock); 684 685 if (fimc->camera[inp->index]->use_isp && !(fimc->camera[inp->index]->info)) 686 strcpy(inp->name, "ISP Camera"); 687 else 688 strcpy(inp->name, fimc->camera[inp->index]->info->type); 689 690 inp->type = V4L2_INPUT_TYPE_CAMERA; 691 692 mutex_unlock(&ctrl->v4l2_lock); 693 694 return 0; 695} 696 697int fimc_g_input(struct file *file, void *fh, unsigned int *i) 698{ 699 struct fimc_control *ctrl = ((struct fimc_prv_data *)fh)->ctrl; 700 struct fimc_global *fimc = get_fimc_dev(); 701 702 /* In case of isueing g_input before s_input */ 703 if (!ctrl->cam) { 704 fimc_err("no camera device selected yet. do VIDIOC_S_INPUT first\n"); 705 return -ENODEV; 706 } 707 mutex_lock(&ctrl->v4l2_lock); 708 709 *i = (unsigned int) fimc->active_camera; 710 711 mutex_unlock(&ctrl->v4l2_lock); 712 713 fimc_dbg("%s: index %d\n", __func__, *i); 714 715 return 0; 716} 717 718int fimc_release_subdev(struct fimc_control *ctrl) 719{ 720 struct fimc_global *fimc = get_fimc_dev(); 721 struct i2c_client *client; 722 struct s3c_platform_fimc *pdata = to_fimc_plat(ctrl->dev); 723 int ret; 724 725 if (ctrl->cam->sd && fimc_cam_use) { 726 fimc_dbg("%s called\n", __func__); 727 728 /* WriteBack doesn't need clock setting */ 729 if ((ctrl->cam->id == CAMERA_WB) || 730 (ctrl->cam->id == CAMERA_WB_B)) { 731 ctrl->cam->initialized = 0; 732 ctrl->cam = NULL; 733 fimc->active_camera = -1; 734 return 0; 735 } 736 737 client = v4l2_get_subdevdata(ctrl->cam->sd); 738 i2c_unregister_device(client); 739 ctrl->cam->sd = NULL; 740#ifndef CONFIG_MACH_GC1 741 if (ctrl->cam->cam_power) 742#else 743 if (ctrl->cam->cam_power && !leave_power) 744#endif 745 ctrl->cam->cam_power(0); 746 747 /* shutdown the MCLK */ 748#ifndef CONFIG_MACH_GC1 749 if (fimc->mclk_status == CAM_MCLK_ON) { 750#else 751 if (fimc->mclk_status == CAM_MCLK_ON && !leave_power) { 752#endif 753 clk_disable(ctrl->cam->clk); 754 fimc->mclk_status = CAM_MCLK_OFF; 755 } 756 757 ctrl->cam->initialized = 0; 758 ctrl->cam = NULL; 759 fimc->active_camera = -1; 760 } else if (ctrl->cam->sd) { 761 ctrl->cam->initialized = 0; 762 ctrl->cam = NULL; 763 fimc->active_camera = -1; 764 } 765 766 if (ctrl->flite_sd && fimc_cam_use) { 767 ret = v4l2_subdev_call(ctrl->flite_sd, core, s_power, 0); 768 if (ret) 769 fimc_err("s_power failed: %d", ret); 770 771 ctrl->flite_sd = NULL; 772 } 773 774 return 0; 775} 776 777static int fimc_configure_subdev(struct fimc_control *ctrl) 778{ 779 struct i2c_adapter *i2c_adap; 780 struct i2c_board_info *i2c_info; 781 struct i2c_client *client; 782 struct v4l2_subdev *sd; 783 unsigned short addr; 784 char *name; 785 int ret = 0; 786 787 i2c_adap = i2c_get_adapter(ctrl->cam->get_i2c_busnum()); 788 if (!i2c_adap) { 789 fimc_err("subdev i2c_adapter missing-skip registration\n"); 790 return -ENODEV; 791 } 792 793 i2c_info = ctrl->cam->info; 794 if (!i2c_info) { 795 fimc_err("%s: subdev i2c board info missing\n", __func__); 796 return -ENODEV; 797 } 798 799 name = i2c_info->type; 800 if (!name) { 801 fimc_err("subdev i2c driver name missing-skip registration\n"); 802 return -ENODEV; 803 } 804 805 addr = i2c_info->addr; 806 if (!addr) { 807 fimc_err("subdev i2c address missing-skip registration\n"); 808 return -ENODEV; 809 } 810 /* 811 * NOTE: first time subdev being registered, 812 * s_config is called and try to initialize subdev device 813 * but in this point, we are not giving MCLK and power to subdev 814 * so nothing happens but pass platform data through 815 */ 816 sd = v4l2_i2c_new_subdev_board(&ctrl->v4l2_dev, i2c_adap, 817 i2c_info, &addr); 818 if (!sd) { 819 fimc_err("%s: v4l2 subdev board registering failed\n", 820 __func__); 821 } 822 /* Assign subdev to proper camera device pointer */ 823 ctrl->cam->sd = sd; 824 825 if (!ctrl->cam->initialized) { 826 ret = fimc_init_camera(ctrl); 827 if (ret < 0) { 828 fimc_err("%s: fail to initialize subdev\n", __func__); 829 830#ifndef CONFIG_MACH_GC1 831 client = v4l2_get_subdevdata(sd); 832 i2c_unregister_device(client); 833 ctrl->cam->sd = NULL; 834#endif 835 836 return ret; 837 } 838 } 839 840 return 0; 841} 842 843static int flite_register_callback(struct device *dev, void *p) 844{ 845 struct v4l2_subdev **sd_list = p; 846 struct v4l2_subdev *sd = NULL; 847 848 sd = dev_get_drvdata(dev); 849 if (sd) { 850 struct platform_device *pdev = v4l2_get_subdev_hostdata(sd); 851 *(sd_list + pdev->id) = sd; 852 } 853 854 return 0; /* non-zero value stops iteration */ 855} 856 857static struct v4l2_subdev *exynos_flite_get_subdev(int id) 858{ 859 const char *module_name = "exynos-fimc-lite"; 860 struct device_driver *drv; 861 struct v4l2_subdev *sd[FLITE_MAX_NUM] = {NULL,}; 862 int ret; 863 864 drv = driver_find(module_name, &platform_bus_type); 865 if (!drv) { 866 request_module(module_name); 867 drv = driver_find(module_name, &platform_bus_type); 868 } 869 if (!drv) 870 return ERR_PTR(-ENODEV); 871 872 ret = driver_for_each_device(drv, NULL, &sd[0], 873 flite_register_callback); 874 put_driver(drv); 875 876 return ret ? NULL : sd[id]; 877} 878 879int fimc_subdev_attatch(struct fimc_control *ctrl) 880{ 881 int ret = 0; 882 struct s3c_platform_fimc *pdata = to_fimc_plat(ctrl->dev); 883 884 ctrl->flite_sd = exynos_flite_get_subdev(ctrl->cam->flite_id); 885 if (IS_ERR_OR_NULL(ctrl->flite_sd)) { 886 ctrl->flite_sd = NULL; 887 return PTR_ERR(ctrl->flite_sd); 888 } else { 889 if (fimc_cam_use) { 890 ret = v4l2_subdev_call(ctrl->flite_sd, core, s_power, 1); 891 if (ret) 892 fimc_err("s_power failed: %d", ret); 893 } 894 895 } 896 897 return 0; 898} 899 900static int fimc_is_register_callback(struct device *dev, void *p) 901{ 902 struct v4l2_subdev **sd = p; 903 904 *sd = dev_get_drvdata(dev); 905 906 if (!*sd) 907 return -EINVAL; 908 909 return 0; /* non-zero value stops iteration */ 910} 911 912int fimc_is_release_subdev(struct fimc_control *ctrl) 913{ 914 int ret; 915 struct fimc_global *fimc = get_fimc_dev(); 916 struct s3c_platform_fimc *pdata = to_fimc_plat(ctrl->dev); 917 918 if (ctrl->is.sd && ctrl->cam && fimc_cam_use) { 919 if (ctrl->cam->cam_power) 920 ctrl->cam->cam_power(0); 921 /* shutdown the MCLK */ 922 if (fimc->mclk_status == CAM_MCLK_ON) { 923 clk_disable(ctrl->cam->clk); 924 fimc->mclk_status = CAM_MCLK_OFF; 925 } 926 927 ret = v4l2_subdev_call(ctrl->is.sd, core, s_power, 0); 928 if (ret < 0) { 929 fimc_dbg("FIMC-IS init failed"); 930 return -ENODEV; 931 } 932 933 v4l2_device_unregister_subdev(ctrl->is.sd); 934 ctrl->is.sd = NULL; 935 ctrl->cam->initialized = 0; 936 ctrl->cam = NULL; 937 fimc->active_camera = -1; 938 } else if (ctrl->is.sd && ctrl->cam) { 939 ctrl->is.sd = NULL; 940 ctrl->cam->initialized = 0; 941 ctrl->cam = NULL; 942 fimc->active_camera = -1; 943 } 944 945 return 0; 946} 947 948static struct v4l2_subdev *fimc_is_get_subdev(int id) 949{ 950 const char *module_name = "exynos4-fimc-is"; 951 struct device_driver *drv; 952 struct v4l2_subdev *sd = NULL; 953 int ret; 954 955 drv = driver_find(module_name, &platform_bus_type); 956 if (!drv) { 957 request_module(module_name); 958 drv = driver_find(module_name, &platform_bus_type); 959 } 960 if (!drv) 961 return ERR_PTR(-ENODEV); 962 963 ret = driver_for_each_device(drv, NULL, &sd, 964 fimc_is_register_callback); 965 put_driver(drv); 966 return ret ? NULL : sd; 967} 968 969static int fimc_is_init_cam(struct fimc_control *ctrl) 970{ 971 struct fimc_global *fimc = get_fimc_dev(); 972 struct s3c_platform_camera *cam; 973 int ret = 0; 974 975#if (defined(CONFIG_EXYNOS_DEV_PD) && defined(CONFIG_PM_RUNTIME)) 976 struct platform_device *pdev = to_platform_device(ctrl->dev); 977#endif 978 979 cam = ctrl->cam; 980 /* Do noting if already initialized */ 981 if (ctrl->cam->initialized) 982 return 0; 983 984#if (defined(CONFIG_EXYNOS_DEV_PD) && defined(CONFIG_PM_RUNTIME)) 985 if (ctrl->power_status == FIMC_POWER_OFF) 986 pm_runtime_get_sync(&pdev->dev); 987#endif 988 989 /* set rate for mclk */ 990 if ((clk_get_rate(cam->clk)) && (fimc->mclk_status == CAM_MCLK_OFF)) { 991 clk_set_rate(cam->clk, cam->clk_rate); 992 clk_enable(cam->clk); 993 fimc->mclk_status = CAM_MCLK_ON; 994 fimc_info1("clock for camera (FIMC-IS): %d\n", cam->clk_rate); 995 } 996 997 /* enable camera power if needed */ 998 if (cam->cam_power) { 999 ret = cam->cam_power(1); 1000 if (unlikely(ret < 0)) 1001 fimc_err("\nfail to power on\n"); 1002 } 1003 1004 1005 /* Retry camera power-up if first i2c fails. */ 1006 if (unlikely(ret < 0)) { 1007 if (cam->cam_power) 1008 cam->cam_power(0); 1009 1010 if (fimc->mclk_status == CAM_MCLK_ON) { 1011 clk_disable(ctrl->cam->clk); 1012 fimc->mclk_status = CAM_MCLK_OFF; 1013 } 1014 1015 fimc_err("Camera power/init failed!!!!\n\n"); 1016#if (defined(CONFIG_EXYNOS_DEV_PD) && defined(CONFIG_PM_RUNTIME)) 1017 if (ctrl->power_status == FIMC_POWER_ON) 1018 pm_runtime_put_sync(&pdev->dev); 1019#endif 1020 } else { 1021 /* Apply things to interface register */ 1022 fimc_hwset_reset(ctrl); 1023 cam->initialized = 1; 1024 } 1025 1026 return ret; 1027} 1028 1029int fimc_s_input(struct file *file, void *fh, unsigned int i) 1030{ 1031 struct fimc_global *fimc = get_fimc_dev(); 1032 struct fimc_control *ctrl = ((struct fimc_prv_data *)fh)->ctrl; 1033 struct fimc_capinfo *cap = ctrl->cap; 1034 struct s3c_platform_fimc *pdata = to_fimc_plat(ctrl->dev); 1035 int ret = 0; 1036#if (defined(CONFIG_EXYNOS_DEV_PD) && defined(CONFIG_PM_RUNTIME)) 1037 struct platform_device *pdev = to_platform_device(ctrl->dev); 1038#endif 1039 1040 fimc_dbg("%s: index %d\n", __func__, i); 1041 1042 if (i >= FIMC_MAXCAMS) { 1043 fimc_err("%s: invalid input index\n", __func__); 1044 return -EINVAL; 1045 } 1046 1047 if (!fimc->camera_isvalid[i]) 1048 return -EINVAL; 1049 1050 if (fimc->camera[i]->sd && fimc_cam_use) { 1051 fimc_err("%s: Camera already in use.\n", __func__); 1052 return -EBUSY; 1053 } 1054 mutex_lock(&ctrl->v4l2_lock); 1055 1056 /* If ctrl->cam is not NULL, there is one subdev already registered. 1057 * We need to unregister that subdev first. */ 1058 if (i != fimc->active_camera) { 1059 fimc_info1("\n\nfimc_s_input activating subdev\n"); 1060 if (ctrl->cam && (ctrl->cam->sd || ctrl->flite_sd)) 1061 fimc_release_subdev(ctrl); 1062 else if (ctrl->is.sd) 1063 fimc_is_release_subdev(ctrl); 1064 ctrl->cam = fimc->camera[i]; 1065 1066 if ((ctrl->cam->id != CAMERA_WB) && (ctrl->cam->id != 1067 CAMERA_WB_B) && (!ctrl->cam->use_isp) && fimc_cam_use) { 1068 ret = fimc_configure_subdev(ctrl); 1069 if (ret < 0) { 1070#ifdef CONFIG_MACH_GC1 1071 if (ret == -ENOSYS) { 1072 /* return no error If firmware is bad. 1073 Because F/W update app should access the sensor through HAL instance */ 1074 fimc_err("%s: please update the F/W\n", __func__); 1075 } else { 1076 ctrl->cam = NULL; 1077 mutex_unlock(&ctrl->v4l2_lock); 1078 fimc_err("%s: Could not register camera" \ 1079 " sensor with V4L2.\n", __func__); 1080 return -ENODEV; 1081 } 1082#else 1083 ctrl->cam = NULL; 1084 mutex_unlock(&ctrl->v4l2_lock); 1085 fimc_err("%s: Could not register camera" \ 1086 " sensor with V4L2.\n", __func__); 1087 return -ENODEV; 1088#endif 1089 } 1090 } 1091 fimc->active_camera = i; 1092 fimc_info2("fimc_s_input activated subdev = %d\n", i); 1093 } 1094 1095 if (!fimc_cam_use) { 1096 if (i == fimc->active_camera) { 1097 ctrl->cam = fimc->camera[i]; 1098 fimc_info2("fimc_s_input activating subdev FIMC%d\n", 1099 ctrl->id); 1100 } else { 1101 mutex_unlock(&ctrl->v4l2_lock); 1102 return -EINVAL; 1103 } 1104#if (defined(CONFIG_EXYNOS_DEV_PD) && defined(CONFIG_PM_RUNTIME)) 1105#ifdef CONFIG_DRM_EXYNOS_FIMD_WB 1106 if ((ctrl->cam->id != CAMERA_WB) && 1107 (ctrl->cam->id != CAMERA_WB_B) && 1108 (ctrl->power_status == FIMC_POWER_OFF)) { 1109#else 1110 if (ctrl->power_status == FIMC_POWER_OFF) { 1111#endif 1112 pm_runtime_get_sync(&pdev->dev); 1113 } 1114 fimc_hwset_reset(ctrl); 1115#endif 1116 } 1117 1118 if (ctrl->cam->use_isp) { 1119 /* fimc-lite attatch */ 1120 ret = fimc_subdev_attatch(ctrl); 1121 if (ret) { 1122 fimc_err("subdev_attatch failed\n"); 1123 mutex_unlock(&ctrl->v4l2_lock); 1124 return -ENODEV; 1125 } 1126 /* fimc-is attatch */ 1127 ctrl->is.sd = fimc_is_get_subdev(i); 1128 if (IS_ERR_OR_NULL(ctrl->is.sd)) { 1129 fimc_err("fimc-is subdev_attatch failed\n"); 1130 mutex_unlock(&ctrl->v4l2_lock); 1131 return -ENODEV; 1132 } 1133 1134 ctrl->is.fmt.width = ctrl->cam->width; 1135 ctrl->is.fmt.height = ctrl->cam->height; 1136 ctrl->is.frame_count = 0; 1137 if (fimc_cam_use) { 1138 ret = fimc_is_init_cam(ctrl); 1139 if (ret < 0) { 1140 fimc_dbg("FIMC-IS init clock failed"); 1141 mutex_unlock(&ctrl->v4l2_lock); 1142 return -ENODEV; 1143 } 1144 ret = v4l2_subdev_call(ctrl->is.sd, core, s_power, 1); 1145 if (ret < 0) { 1146 fimc_err("FIMC-IS init s_power failed"); 1147 mutex_unlock(&ctrl->v4l2_lock); 1148 return -ENODEV; 1149 } 1150 ret = v4l2_subdev_call(ctrl->is.sd, core, load_fw); 1151 if (ret < 0) { 1152 fimc_err("FIMC-IS init load_fw failed"); 1153 mutex_unlock(&ctrl->v4l2_lock); 1154 if (!cap) { 1155 cap = kzalloc(sizeof(*cap), GFP_KERNEL); 1156 if (!cap) { 1157 fimc_err("%s: no memory for " 1158 "capture device info\n", __func__); 1159 return -ENOMEM; 1160 } 1161 1162 /* assign to ctrl */ 1163 ctrl->cap = cap; 1164 } 1165 return -ENODEV; 1166 } 1167 ret = v4l2_subdev_call(ctrl->is.sd, core, init, ctrl->cam->sensor_index); 1168 if (ret < 0) { 1169 fimc_err("FIMC-IS init failed"); 1170 mutex_unlock(&ctrl->v4l2_lock); 1171 if (!cap) { 1172 cap = kzalloc(sizeof(*cap), GFP_KERNEL); 1173 if (!cap) { 1174 fimc_err("%s: no memory for " 1175 "capture device info\n", __func__); 1176 return -ENOMEM; 1177 } 1178 1179 /* assign to ctrl */ 1180 ctrl->cap = cap; 1181 } 1182 1183 return -ENODEV; 1184 } 1185 } 1186 } 1187 1188 1189 /* 1190 * The first time alloc for struct cap_info, and will be 1191 * released at the file close. 1192 * Anyone has better idea to do this? 1193 */ 1194 if (!cap) { 1195 cap = kzalloc(sizeof(*cap), GFP_KERNEL); 1196 if (!cap) { 1197 fimc_err("%s: no memory for " 1198 "capture device info\n", __func__); 1199 return -ENOMEM; 1200 } 1201 1202 /* assign to ctrl */ 1203 ctrl->cap = cap; 1204#if (defined(CONFIG_EXYNOS_DEV_PD) && defined(CONFIG_PM_RUNTIME)) 1205 if (ctrl->power_status == FIMC_POWER_OFF) 1206 pm_runtime_get_sync(&pdev->dev); 1207#endif 1208 } else { 1209 memset(cap, 0, sizeof(*cap)); 1210 } 1211 1212 mutex_unlock(&ctrl->v4l2_lock); 1213 1214 return 0; 1215} 1216 1217int fimc_enum_fmt_vid_capture(struct file *file, void *fh, 1218 struct v4l2_fmtdesc *f) 1219{ 1220 struct fimc_control *ctrl = ((struct fimc_prv_data *)fh)->ctrl; 1221 int i = f->index; 1222 1223 fimc_dbg("%s\n", __func__); 1224 1225 if (i >= ARRAY_SIZE(capture_fmts)) { 1226 fimc_err("%s: There is no support format index %d\n", __func__, i); 1227 return -EINVAL; 1228 } 1229 1230 mutex_lock(&ctrl->v4l2_lock); 1231 1232 memset(f, 0, sizeof(*f)); 1233 memcpy(f, &capture_fmts[i], sizeof(*f)); 1234 1235 mutex_unlock(&ctrl->v4l2_lock); 1236 1237 return 0; 1238} 1239 1240#ifdef CONFIG_SLP_DMABUF 1241/* 1242 * figures out the depth of requested format 1243 */ 1244static int fimc_fmt_depth_mplane(struct fimc_control *ctrl, 1245 struct v4l2_format *f, int depth[]) 1246{ 1247 int ret = 0; 1248 1249 /* handles only supported pixelformats */ 1250 switch (f->fmt.pix_mp.pixelformat) { 1251 case V4L2_PIX_FMT_NV12: 1252 case V4L2_PIX_FMT_NV12T: 1253 case V4L2_PIX_FMT_NV21: 1254 f->fmt.pix_mp.num_planes = 2; 1255 depth[0] = 8; 1256 depth[1] = 4; 1257 break; 1258 case V4L2_PIX_FMT_YUV420: 1259 case V4L2_PIX_FMT_YVU420: 1260 f->fmt.pix_mp.num_planes = 3; 1261 depth[0] = 8; 1262 depth[1] = 2; 1263 depth[2] = 2; 1264 break; 1265 case V4L2_PIX_FMT_JPEG: 1266 case V4L2_PIX_FMT_INTERLEAVED: 1267 f->fmt.pix_mp.num_planes = 1; 1268 depth[0] = -1; 1269 fimc_dbg("Compressed format.\n"); 1270 break; 1271 default: 1272 fimc_dbg("why am I here?\n"); 1273 ret = -EINVAL; 1274 break; 1275 } 1276 1277 return ret; 1278} 1279static int fimc_g_fmt_vid_capture_mplane(struct fimc_control *ctrl, 1280 struct v4l2_format *f) 1281{ 1282 int depth[VIDEO_MAX_PLANES]; 1283 int ret; 1284 int i; 1285 1286 /* 1287 * Note that expecting format only can be with 1288 * available output format from FIMC 1289 * Following items should be handled in driver 1290 * bytesperline = width * depth / 8 1291 * sizeimage = bytesperline * height 1292 */ 1293 1294 f->fmt.pix_mp.pixelformat = ctrl->cap->fmt.pixelformat; 1295 f->fmt.pix_mp.width = ctrl->cap->fmt.width; 1296 f->fmt.pix_mp.height = ctrl->cap->fmt.height; 1297 1298 ret = fimc_fmt_depth_mplane(ctrl, f, depth); 1299 if (ret < 0) { 1300 fimc_err("Invaild format\n"); 1301 return ret; 1302 } 1303 for (i = 0; i < f->fmt.pix_mp.num_planes; ++i) { 1304 f->fmt.pix_mp.plane_fmt[i].bytesperline = (f->fmt.pix_mp.width * 1305 depth[i]) >> 3; 1306 f->fmt.pix_mp.plane_fmt[i].sizeimage = 1307 (f->fmt.pix_mp.plane_fmt[i].bytesperline * 1308 f->fmt.pix_mp.width); 1309 } 1310 1311 return 0; 1312} 1313#endif 1314 1315int fimc_g_fmt_vid_capture(struct file *file, void *fh, struct v4l2_format *f) 1316{ 1317 struct fimc_control *ctrl = ((struct fimc_prv_data *)fh)->ctrl; 1318 1319 fimc_dbg("%s\n", __func__); 1320 1321 if (!ctrl->cap) { 1322 fimc_err("%s: no capture device info\n", __func__); 1323 return -EINVAL; 1324 } 1325 1326 mutex_lock(&ctrl->v4l2_lock); 1327 1328#ifdef CONFIG_SLP_DMABUF 1329 if (V4L2_TYPE_IS_MULTIPLANAR(f->type)) 1330 if (fimc_g_fmt_vid_capture_mplane(ctrl, f) < 0) { 1331 mutex_unlock(&ctrl->v4l2_lock); 1332 return -EINVAL; 1333 } 1334 else { 1335 memset(&f->fmt.pix, 0, sizeof(f->fmt.pix)); 1336 memcpy(&f->fmt.pix, &ctrl->cap->fmt, sizeof(f->fmt.pix)); 1337 } 1338#else 1339 memset(&f->fmt.pix, 0, sizeof(f->fmt.pix)); 1340 memcpy(&f->fmt.pix, &ctrl->cap->fmt, sizeof(f->fmt.pix)); 1341#endif 1342 1343 mutex_unlock(&ctrl->v4l2_lock); 1344 1345 return 0; 1346} 1347 1348/* 1349 * Check for whether the requested format 1350 * can be streamed out from FIMC 1351 * depends on FIMC node 1352 */ 1353static int fimc_fmt_avail(struct fimc_control *ctrl, 1354 struct v4l2_pix_format *f) 1355{ 1356 int i; 1357 1358 /* 1359 * TODO: check for which FIMC is used. 1360 * Available fmt should be varied for each FIMC 1361 */ 1362 1363 for (i = 0; i < ARRAY_SIZE(capture_fmts); i++) { 1364 if (capture_fmts[i].pixelformat == f->pixelformat) 1365 return 0; 1366 } 1367 1368 fimc_info1("Not supported pixelformat requested\n"); 1369 1370 return -1; 1371} 1372 1373/* 1374 * figures out the depth of requested format 1375 */ 1376static int fimc_fmt_depth(struct fimc_control *ctrl, struct v4l2_pix_format *f) 1377{ 1378 int err, depth = 0; 1379 1380 /* First check for available format or not */ 1381 err = fimc_fmt_avail(ctrl, f); 1382 if (err < 0) 1383 return -1; 1384 1385 /* handles only supported pixelformats */ 1386 switch (f->pixelformat) { 1387 case V4L2_PIX_FMT_RGB32: 1388 depth = 32; 1389 fimc_dbg("32bpp\n"); 1390 break; 1391 case V4L2_PIX_FMT_RGB565: 1392 case V4L2_PIX_FMT_YUYV: 1393 case V4L2_PIX_FMT_UYVY: 1394 case V4L2_PIX_FMT_VYUY: 1395 case V4L2_PIX_FMT_YVYU: 1396 case V4L2_PIX_FMT_YUV422P: 1397 case V4L2_PIX_FMT_NV16: 1398 case V4L2_PIX_FMT_NV61: 1399 depth = 16; 1400 fimc_dbg("16bpp\n"); 1401 break; 1402 case V4L2_PIX_FMT_NV12: 1403 case V4L2_PIX_FMT_NV12T: 1404 case V4L2_PIX_FMT_NV21: 1405 case V4L2_PIX_FMT_YUV420: 1406 case V4L2_PIX_FMT_YVU420: 1407 depth = 12; 1408 fimc_dbg("12bpp\n"); 1409 break; 1410 case V4L2_PIX_FMT_JPEG: 1411 case V4L2_PIX_FMT_INTERLEAVED: 1412 depth = -1; 1413 fimc_dbg("Compressed format.\n"); 1414 break; 1415 default: 1416 fimc_dbg("why am I here?\n"); 1417 break; 1418 } 1419 1420 return depth; 1421} 1422 1423int fimc_s_fmt_vid_private(struct file *file, void *fh, struct v4l2_format *f) 1424{ 1425 struct fimc_control *ctrl = ((struct fimc_prv_data *)fh)->ctrl; 1426 struct s3c_platform_fimc *pdata = to_fimc_plat(ctrl->dev); 1427 struct v4l2_mbus_framefmt *mbus_fmt; 1428 int ret = 0; 1429 1430 fimc_dbg("%s\n", __func__); 1431 if (ctrl->cam->sd) { 1432 struct v4l2_pix_format *pix = &f->fmt.pix; 1433 int depth; 1434 1435 fimc_info1("%s %d:\n", __func__, __LINE__); 1436 1437 mbus_fmt = &ctrl->cap->mbus_fmt; 1438 mbus_fmt->width = pix->width; 1439 mbus_fmt->height = pix->height; 1440#ifdef CONFIG_MACH_P4NOTE 1441/* Unfortuntely, we have to use pix->field (not pix->priv) since 1442 * pix.field is already used in the below else condtion statement 1443 * (in case that sub-devices are not registered) 1444 */ 1445 mbus_fmt->field = pix->field; 1446#endif 1447#if defined(CONFIG_MACH_GC1) 1448 mbus_fmt->field = pix->priv; 1449#endif 1450 printk(KERN_INFO "%s mbus_fmt->width = %d, height = %d,\n", 1451 __func__,mbus_fmt->width ,mbus_fmt->height); 1452 1453 depth = fimc_fmt_depth(ctrl, pix); 1454 if (depth == 0) { 1455 fimc_err("%s: Invalid pixel format\n", __func__); 1456 return -EINVAL; 1457 } else if (depth < 0) { /* JPEG */ 1458 mbus_fmt->code = V4L2_MBUS_FMT_JPEG_1X8; 1459 mbus_fmt->colorspace = V4L2_COLORSPACE_JPEG; 1460 } else { 1461 mbus_fmt->code = V4L2_MBUS_FMT_VYUY8_2X8; 1462 } 1463 1464 if (fimc_cam_use) { 1465 ret = v4l2_subdev_call(ctrl->cam->sd, video, 1466 s_mbus_fmt, mbus_fmt); 1467 if (ret) { 1468 fimc_err("%s: fail to s_mbus_fmt\n", __func__); 1469 return ret; 1470 } 1471 } 1472 1473 return 0; 1474 } else { 1475 mbus_fmt = kzalloc(sizeof(*mbus_fmt), GFP_KERNEL); 1476 if (!mbus_fmt) { 1477 fimc_err("%s: no memory for " 1478 "mbus_fmt\n", __func__); 1479 return -ENOMEM; 1480 } 1481 ctrl->is.fmt.width = f->fmt.pix.width; 1482 ctrl->is.fmt.height = f->fmt.pix.height; 1483 ctrl->is.fmt.pixelformat = f->fmt.pix.pixelformat; 1484 1485 mbus_fmt->width = f->fmt.pix.width; 1486 mbus_fmt->height = f->fmt.pix.height; 1487 mbus_fmt->code = V4L2_MBUS_FMT_YUYV8_2X8; /*dummy*/ 1488 mbus_fmt->field = f->fmt.pix.field; 1489 mbus_fmt->colorspace = V4L2_COLORSPACE_SRGB; 1490 1491 printk(KERN_INFO "%s mbus_fmt->width = %d, height = %d, \n", 1492 __func__,mbus_fmt->width ,mbus_fmt->height); 1493 if (fimc_cam_use) 1494 ret = v4l2_subdev_call(ctrl->is.sd, video, 1495 s_mbus_fmt, mbus_fmt); 1496 kfree(mbus_fmt); 1497 return ret; 1498 } 1499 1500 return -EINVAL; 1501} 1502 1503int fimc_s_fmt_vid_capture(struct file *file, void *fh, struct v4l2_format *f) 1504{ 1505 struct fimc_control *ctrl = ((struct fimc_prv_data *)fh)->ctrl; 1506 struct fimc_capinfo *cap = ctrl->cap; 1507 struct s3c_platform_fimc *pdata = to_fimc_plat(ctrl->dev); 1508 1509 int ret = 0; 1510 int depth; 1511 struct v4l2_control is_ctrl; 1512 1513 is_ctrl.id = 0; 1514 is_ctrl.value = 0; 1515 1516 printk(KERN_INFO "%s\n", __func__); 1517 1518 if (!ctrl->cap) { 1519 fimc_err("%s: No capture structure." \ 1520 "you have to call s_input first.\n", __func__); 1521 return -ENODEV; 1522 } 1523 1524 /* rotaton, flip, dtp_mode, movie_mode and vt_mode, 1525 * sensor_output_width,height should be maintained.(by TN) */ 1526 memset(cap, 0, sizeof(*cap) - sizeof(u32) * 7); 1527 1528 mutex_lock(&ctrl->v4l2_lock); 1529 1530 memset(&cap->fmt, 0, sizeof(cap->fmt)); 1531#ifdef CONFIG_SLP_DMABUF 1532 if (V4L2_TYPE_IS_MULTIPLANAR(f->type)) { 1533 cap->fmt.pixelformat = f->fmt.pix_mp.pixelformat; 1534 cap->fmt.width = f->fmt.pix_mp.width; 1535 cap->fmt.height = f->fmt.pix_mp.height; 1536 cap->fmt.pixelformat = f->fmt.pix_mp.pixelformat; 1537 } else 1538 memcpy(&cap->fmt, &f->fmt.pix, sizeof(cap->fmt)); 1539#else 1540 memcpy(&cap->fmt, &f->fmt.pix, sizeof(cap->fmt)); 1541#endif 1542 1543 /* 1544 * Note that expecting format only can be with 1545 * available output format from FIMC 1546 * Following items should be handled in driver 1547 * bytesperline = width * depth / 8 1548 * sizeimage = bytesperline * height 1549 */ 1550 /* This function may return 0 or -1 in case of error, 1551 * hence need to check here. 1552 */ 1553 1554 depth = fimc_fmt_depth(ctrl, &cap->fmt); 1555 if (depth == 0) { 1556 mutex_unlock(&ctrl->v4l2_lock); 1557 fimc_err("%s: Invalid pixel format\n", __func__); 1558 return -EINVAL; 1559 } else if (depth < 0) { 1560 /* 1561 * When the pixelformat is JPEG, 1562 * the application is requesting for data 1563 * in JPEG compressed format 1564 */ 1565 cap->fmt.colorspace = V4L2_COLORSPACE_JPEG; 1566 } else { 1567 cap->fmt.bytesperline = (cap->fmt.width * depth) >> 3; 1568 cap->fmt.sizeimage = (cap->fmt.bytesperline * cap->fmt.height); 1569 } 1570 1571 1572 if (cap->fmt.pixelformat == V4L2_PIX_FMT_JPEG || 1573 cap->fmt.pixelformat == V4L2_PIX_FMT_INTERLEAVED) { 1574 ctrl->sc.bypass = 1; 1575 cap->lastirq = 0; 1576 fimc_info1("fimc_s_fmt_vid_capture V4L2_COLORSPACE_JPEG or INTERLEAVED\n"); 1577 } else { 1578#ifdef CONFIG_MACH_GC1 1579 /* 1580 Fimc scaler input Hsize is restricted to 4224 pixels. 1581 So, GC1 has to bypass fimc scaler to use more than 12M YUV. 1582 */ 1583 if (cap->fmt.width > ctrl->limit->pre_dst_w) 1584 ctrl->sc.bypass = 1; 1585 else 1586 ctrl->sc.bypass = 0; 1587 1588#else 1589 ctrl->sc.bypass = 0; 1590#endif 1591 cap->lastirq = 0; 1592 } 1593 1594 printk(KERN_INFO "fimc%d s_fmt width = %d, height = %d\n", ctrl->id, \ 1595 cap->fmt.width, cap->fmt.height); 1596 1597 /* WriteBack doesn't have subdev_call */ 1598 if (ctrl->cam->id == CAMERA_WB || ctrl->cam->id == CAMERA_WB_B) { 1599 mutex_unlock(&ctrl->v4l2_lock); 1600 return 0; 1601 } 1602 1603 if (ctrl->is.sd && fimc_cam_use) { 1604 ctrl->is.mbus_fmt.code = V4L2_MBUS_FMT_SGRBG10_1X10; 1605 is_ctrl.id = V4L2_CID_IS_GET_SENSOR_WIDTH; 1606 is_ctrl.value = 0; 1607 v4l2_subdev_call(ctrl->is.sd, core, g_ctrl, &is_ctrl); 1608 ctrl->is.fmt.width = ctrl->is.mbus_fmt.width = is_ctrl.value; 1609 1610 is_ctrl.id = V4L2_CID_IS_GET_SENSOR_HEIGHT; 1611 is_ctrl.value = 0; 1612 v4l2_subdev_call(ctrl->is.sd, core, g_ctrl, &is_ctrl); 1613 ctrl->is.fmt.height = ctrl->is.mbus_fmt.height = is_ctrl.value; 1614 /* default offset values */ 1615 ctrl->is.offset_x = 16; 1616 ctrl->is.offset_y = 12; 1617 } 1618 1619 fimc_hwset_reset(ctrl); 1620 1621 mutex_unlock(&ctrl->v4l2_lock); 1622 printk(KERN_INFO "%s -- FIMC%d\n", __func__, ctrl->id); 1623 1624 return ret; 1625} 1626 1627int fimc_try_fmt_vid_capture(struct file *file, void *fh, struct v4l2_format *f) 1628{ 1629 /* Not implement */ 1630 return -ENOTTY; 1631} 1632 1633static int fimc_alloc_buffers(struct fimc_control *ctrl, 1634 int plane, int size, int align, int bpp, int use_paddingbuf, int pad_size) 1635{ 1636 struct fimc_capinfo *cap = ctrl->cap; 1637 int i, j; 1638 int plane_length[4] = {0, }; 1639#ifdef CONFIG_VIDEO_SAMSUNG_USE_DMA_MEM 1640 int alloc_size, err; 1641 struct cma_info mem_info; 1642#endif 1643 1644 switch (plane) { 1645 case 1: 1646 if (align) { 1647 plane_length[0] = PAGE_ALIGN((size*bpp) >> 3); 1648 plane_length[1] = 0; 1649 plane_length[2] = 0; 1650 } else { 1651 plane_length[0] = (size*bpp) >> 3; 1652 plane_length[1] = 0; 1653 plane_length[2] = 0; 1654 } 1655 break; 1656 /* In case of 2, only NV12 and NV12T is supported. */ 1657 case 2: 1658 if (align) { 1659 plane_length[0] = PAGE_ALIGN((size*8) >> 3); 1660 plane_length[1] = PAGE_ALIGN((size*(bpp-8)) >> 3); 1661 plane_length[2] = 0; 1662 fimc_info2("plane_length[0] = %d, plane_length[1] = %d\n" \ 1663 , plane_length[0], plane_length[1]); 1664 } else { 1665 plane_length[0] = ((size*8) >> 3); 1666 plane_length[1] = ((size*(bpp-8)) >> 3); 1667 plane_length[2] = 0; 1668 fimc_info2("plane_length[0] = %d, plane_length[1] = %d\n" \ 1669 , plane_length[0], plane_length[1]); 1670 } 1671 1672 break; 1673 /* In case of 3 1674 * YUV422 : 8 / 4 / 4 (bits) 1675 * YUV420 : 8 / 2 / 2 (bits) 1676 * 3rd plane have to consider page align for mmap */ 1677 case 3: 1678 if (align) { 1679 plane_length[0] = (size*8) >> 3; 1680 plane_length[1] = (size*((bpp-8)/2)) >> 3; 1681 plane_length[2] = PAGE_ALIGN((size*bpp)>>3) - plane_length[0] 1682 - plane_length[1]; 1683 } else { 1684 plane_length[0] = (size*8) >> 3; 1685 plane_length[1] = (size*((bpp-8)/2)) >> 3; 1686 plane_length[2] = ((size*bpp)>>3) - plane_length[0] 1687 - plane_length[1]; 1688 } 1689 break; 1690 default: 1691 fimc_err("impossible!\n"); 1692 return -ENOMEM; 1693 } 1694 1695 if (use_paddingbuf) { 1696 plane_length[plane] = pad_size; 1697 cap->pktdata_plane = plane; 1698 } else 1699 plane_length[plane] = 0; 1700 1701#ifdef CONFIG_VIDEO_SAMSUNG_USE_DMA_MEM 1702 if (align) { 1703 alloc_size = (ALIGN(plane_length[0], align) + 1704 ALIGN(plane_length[1], align) 1705 + ALIGN(plane_length[2], align)) 1706 * cap->nr_bufs; 1707 } else { 1708 alloc_size = (plane_length[0] + plane_length[1] + 1709 plane_length[2]) * cap->nr_bufs; 1710 } 1711 1712 err = cma_info(&mem_info, ctrl->dev, 0); 1713 printk(KERN_DEBUG "%s : [cma_info] start_addr : 0x%x, end_addr : 0x%x, " 1714 "total_size : 0x%x, free_size : 0x%x req_size : 0x%x\n", 1715 __func__, mem_info.lower_bound, mem_info.upper_bound, 1716 mem_info.total_size, mem_info.free_size, alloc_size); 1717 1718 if (err || (mem_info.free_size < alloc_size)) { 1719 fimc_err("%s: get cma info failed\n", __func__); 1720 ctrl->mem.size = 0; 1721 ctrl->mem.base = 0; 1722 return -ENOMEM; 1723 } else { 1724 ctrl->mem.size = alloc_size; 1725 ctrl->mem.base = (dma_addr_t)cma_alloc 1726 (ctrl->dev, ctrl->cma_name, (size_t) alloc_size, align); 1727 } 1728 1729 ctrl->mem.curr = ctrl->mem.base; 1730#endif 1731 for (i = 0; i < cap->nr_bufs; i++) { 1732 for (j = 0; j < plane; j++) { 1733 cap->bufs[i].length[j] = plane_length[j]; 1734 fimc_dma_alloc(ctrl, &cap->bufs[i], j, align); 1735 1736 if (!cap->bufs[i].base[j]) 1737 goto err_alloc; 1738 } 1739 if (use_paddingbuf) { 1740 cap->bufs[i].length[plane] = plane_length[plane]; 1741 fimc_dma_alloc(ctrl, &cap->bufs[i], plane, align); 1742 1743 cap->bufs[i].vaddr_pktdata = phys_to_virt(cap->bufs[i].base[plane]); 1744 /* printk(KERN_INFO "pktdata address = 0x%x, 0x%x\n" 1745 ,cap->bufs[i].base[1], cap->bufs[i].vaddr_pktdata ); */ 1746 1747 if (!cap->bufs[i].base[plane]) 1748 goto err_alloc; 1749 } 1750 cap->bufs[i].state = VIDEOBUF_PREPARED; 1751 } 1752 1753 return 0; 1754 1755err_alloc: 1756 for (i = 0; i < cap->nr_bufs; i++) { 1757 for (j = 0; j < plane; j++) { 1758 if (cap->bufs[i].base[j]) 1759 fimc_dma_free(ctrl, &cap->bufs[i], j); 1760 } 1761 if (use_paddingbuf) { 1762 if (cap->bufs[i].base[plane]) 1763 fimc_dma_free(ctrl, &cap->bufs[i], plane); 1764 } 1765 memset(&cap->bufs[i], 0, sizeof(cap->bufs[i])); 1766 } 1767 1768 return -ENOMEM; 1769} 1770 1771static void fimc_free_buffers(struct fimc_control *ctrl) 1772{ 1773 struct fimc_capinfo *cap; 1774 int i; 1775 1776 if (ctrl && ctrl->cap) 1777 cap = ctrl->cap; 1778 else 1779 return; 1780 1781 for (i = 0; i < FIMC_PHYBUFS; i++) { 1782 memset(&cap->bufs[i], 0, sizeof(cap->bufs[i])); 1783 cap->bufs[i].state = VIDEOBUF_NEEDS_INIT; 1784 } 1785 1786 ctrl->mem.curr = ctrl->mem.base; 1787} 1788 1789#ifdef CONFIG_SLP_DMABUF 1790static int fimc_set_cap_num_plane(struct fimc_control *ctrl) 1791{ 1792 struct fimc_capinfo *cap = ctrl->cap; 1793 1794 switch (cap->fmt.pixelformat) { 1795 case V4L2_PIX_FMT_RGB32: /* fall through */ 1796 case V4L2_PIX_FMT_RGB565: /* fall through */ 1797 case V4L2_PIX_FMT_YUYV: /* fall through */ 1798 case V4L2_PIX_FMT_UYVY: /* fall through */ 1799 case V4L2_PIX_FMT_VYUY: /* fall through */ 1800 case V4L2_PIX_FMT_YVYU: /* fall through */ 1801 case V4L2_PIX_FMT_NV16: /* fall through */ 1802 case V4L2_PIX_FMT_NV61: /* fall through */ 1803 case V4L2_PIX_FMT_JPEG: 1804 case V4L2_PIX_FMT_INTERLEAVED: 1805 return PLANE_1; 1806 1807 case V4L2_PIX_FMT_NV21: 1808 case V4L2_PIX_FMT_NV12: 1809 case V4L2_PIX_FMT_NV12T: 1810 return PLANE_2; 1811 1812 case V4L2_PIX_FMT_YUV422P: /* fall through */ 1813 case V4L2_PIX_FMT_YUV420: 1814 case V4L2_PIX_FMT_YVU420: 1815 return PLANE_3; 1816 1817 default: 1818 fimc_err("%s: Undefined format\n", __func__); 1819 break; 1820 } 1821 1822 return 0; 1823} 1824#endif 1825 1826int fimc_reqbufs_capture_mmap(void *fh, struct v4l2_requestbuffers *b) 1827{ 1828 struct fimc_control *ctrl = fh; 1829 struct fimc_capinfo *cap = ctrl->cap; 1830 struct s3c_platform_fimc *pdata = to_fimc_plat(ctrl->dev); 1831#if (defined(CONFIG_EXYNOS_DEV_PD) && defined(CONFIG_PM_RUNTIME)) 1832 struct platform_device *pdev = to_platform_device(ctrl->dev); 1833#endif 1834 int ret = 0, i; 1835 int bpp = 0; 1836 int size = 0; 1837 1838 if (!cap) { 1839 fimc_err("%s: no capture device info\n", __func__); 1840 return -ENODEV; 1841 } 1842 1843 mutex_lock(&ctrl->v4l2_lock); 1844 1845 /* A count value of zero frees all buffers */ 1846 if ((b->count == 0) || (b->count >= FIMC_CAPBUFS)) { 1847 /* aborting or finishing any DMA in progress */ 1848 if (ctrl->status == FIMC_STREAMON) 1849 fimc_streamoff_capture(fh); 1850 for (i = 0; i < FIMC_CAPBUFS; i++) { 1851 fimc_dma_free(ctrl, &ctrl->cap->bufs[i], 0); 1852 fimc_dma_free(ctrl, &ctrl->cap->bufs[i], 1); 1853 fimc_dma_free(ctrl, &ctrl->cap->bufs[i], 2); 1854 } 1855#ifdef CONFIG_VIDEO_SAMSUNG_USE_DMA_MEM 1856 if (ctrl->mem.base) { 1857 cma_free(ctrl->mem.base); 1858 ctrl->mem.base = 0; 1859 ctrl->mem.size = 0; 1860 } 1861#endif 1862 1863 mutex_unlock(&ctrl->v4l2_lock); 1864 return 0; 1865 } 1866 /* free previous buffers */ 1867 if ((cap->nr_bufs >= 0) && (cap->nr_bufs < FIMC_CAPBUFS)) { 1868 fimc_info1("%s : remained previous buffer count is %d\n", __func__, 1869 cap->nr_bufs); 1870 for (i = 0; i < cap->nr_bufs; i++) { 1871 fimc_dma_free(ctrl, &cap->bufs[i], 0); 1872 fimc_dma_free(ctrl, &cap->bufs[i], 1); 1873 fimc_dma_free(ctrl, &cap->bufs[i], 2); 1874 fimc_dma_free(ctrl, &cap->bufs[i], 3); 1875 } 1876#ifdef CONFIG_VIDEO_SAMSUNG_USE_DMA_MEM 1877 if (ctrl->mem.base) { 1878 cma_free(ctrl->mem.base); 1879 ctrl->mem.base = 0; 1880 ctrl->mem.size = 0; 1881 } 1882#endif 1883 } 1884 fimc_free_buffers(ctrl); 1885 1886 cap->nr_bufs = b->count; 1887 if (pdata->hw_ver >= 0x51) { 1888#if (defined(CONFIG_EXYNOS_DEV_PD) && defined(CONFIG_PM_RUNTIME)) 1889 if (ctrl->power_status == FIMC_POWER_OFF) { 1890 pm_runtime_get_sync(&pdev->dev); 1891 } 1892#endif 1893 fimc_hw_reset_output_buf_sequence(ctrl); 1894 for (i = 0; i < cap->nr_bufs; i++) { 1895 fimc_hwset_output_buf_sequence(ctrl, i, 1); 1896 cap->bufs[i].id = i; 1897 cap->bufs[i].state = VIDEOBUF_NEEDS_INIT; 1898 1899 /* initialize list */ 1900 INIT_LIST_HEAD(&cap->bufs[i].list); 1901 } 1902 fimc_info1("%s: requested %d buffers\n", __func__, b->count); 1903 fimc_info1("%s: sequence[%d]\n", __func__, 1904 fimc_hwget_output_buf_sequence(ctrl)); 1905 INIT_LIST_HEAD(&cap->outgoing_q); 1906 } 1907 if (pdata->hw_ver < 0x51) { 1908 INIT_LIST_HEAD(&cap->inq); 1909 for (i = 0; i < cap->nr_bufs; i++) { 1910 cap->bufs[i].id = i; 1911 cap->bufs[i].state = VIDEOBUF_NEEDS_INIT; 1912 1913 /* initialize list */ 1914 INIT_LIST_HEAD(&cap->bufs[i].list); 1915 } 1916 } 1917 1918 if (cap->pktdata_enable) 1919 cap->pktdata_size = 0x1000; 1920 1921 bpp = fimc_fmt_depth(ctrl, &cap->fmt); 1922 1923 switch (cap->fmt.pixelformat) { 1924 case V4L2_PIX_FMT_RGB32: /* fall through */ 1925 case V4L2_PIX_FMT_RGB565: /* fall through */ 1926 case V4L2_PIX_FMT_YUYV: /* fall through */ 1927 case V4L2_PIX_FMT_UYVY: /* fall through */ 1928 case V4L2_PIX_FMT_VYUY: /* fall through */ 1929 case V4L2_PIX_FMT_YVYU: /* fall through */ 1930 case V4L2_PIX_FMT_NV16: /* fall through */ 1931 case V4L2_PIX_FMT_NV61: /* fall through */ 1932 fimc_info1("%s : 1plane\n", __func__); 1933 ret = fimc_alloc_buffers(ctrl, 1, 1934 cap->fmt.width * cap->fmt.height, SZ_4K, bpp, cap->pktdata_enable, cap->pktdata_size); 1935 break; 1936 1937 case V4L2_PIX_FMT_NV21: 1938 fimc_info1("%s : 2plane for NV21 w %d h %d\n", __func__, 1939 cap->fmt.width, cap->fmt.height); 1940 ret = fimc_alloc_buffers(ctrl, 2, 1941 cap->fmt.width * cap->fmt.height, 0, bpp, cap->pktdata_enable, cap->pktdata_size); 1942 break; 1943 1944 case V4L2_PIX_FMT_NV12: 1945 fimc_info1("%s : 2plane for NV12\n", __func__); 1946 ret = fimc_alloc_buffers(ctrl, 2, 1947 cap->fmt.width * cap->fmt.height, SZ_64K, bpp, cap->pktdata_enable, cap->pktdata_size); 1948 break; 1949 1950 case V4L2_PIX_FMT_NV12T: 1951 fimc_info1("%s : 2plane for NV12T\n", __func__); 1952 ret = fimc_alloc_buffers(ctrl, 2, 1953 ALIGN(cap->fmt.width, 128) * ALIGN(cap->fmt.height, 32), 1954 SZ_64K, bpp, cap->pktdata_enable, cap->pktdata_size); 1955 break; 1956 1957 case V4L2_PIX_FMT_YUV422P: /* fall through */ 1958 case V4L2_PIX_FMT_YUV420: 1959 case V4L2_PIX_FMT_YVU420: 1960 fimc_info1("%s : 3plane\n", __func__); 1961 ret = fimc_alloc_buffers(ctrl, 3, 1962 cap->fmt.width * cap->fmt.height, 0, bpp, cap->pktdata_enable, cap->pktdata_size); 1963 break; 1964 1965 case V4L2_PIX_FMT_JPEG: 1966 fimc_info1("%s : JPEG 1plane\n", __func__); 1967 size = fimc_camera_get_jpeg_memsize(ctrl); 1968 fimc_info2("%s : JPEG 1plane size = %x\n", __func__, size); 1969 ret = fimc_alloc_buffers(ctrl, 1, size, 0, 8, cap->pktdata_enable, cap->pktdata_size); 1970 break; 1971 case V4L2_PIX_FMT_INTERLEAVED: 1972 fimc_info1("%s : Interleaved Format\n", __func__); 1973 size = fimc_camera_get_jpeg_memsize(ctrl); /*0xA00000*/ 1974 fimc_info2("%s : Interleaved size = %x\n", __func__, size); 1975 ret = fimc…
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