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/arch/mips/rb532/prom.c

https://bitbucket.org/cyanogenmod/android_kernel_asus_grouper
C | 146 lines | 93 code | 21 blank | 32 comment | 9 complexity | 48337afddb69e5a06dcd599d61c56cbf MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
  1. /*
  2. * RouterBoard 500 specific prom routines
  3. *
  4. * Copyright (C) 2003, Peter Sadik <peter.sadik@idt.com>
  5. * Copyright (C) 2005-2006, P.Christeas <p_christ@hol.gr>
  6. * Copyright (C) 2007, Gabor Juhos <juhosg@openwrt.org>
  7. * Felix Fietkau <nbd@openwrt.org>
  8. * Florian Fainelli <florian@openwrt.org>
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License
  12. * as published by the Free Software Foundation; either version 2
  13. * of the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the
  22. * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
  23. * Boston, MA 02110-1301, USA.
  24. *
  25. */
  26. #include <linux/init.h>
  27. #include <linux/mm.h>
  28. #include <linux/module.h>
  29. #include <linux/string.h>
  30. #include <linux/console.h>
  31. #include <linux/bootmem.h>
  32. #include <linux/ioport.h>
  33. #include <linux/blkdev.h>
  34. #include <asm/bootinfo.h>
  35. #include <asm/mach-rc32434/ddr.h>
  36. #include <asm/mach-rc32434/prom.h>
  37. unsigned int idt_cpu_freq = 132000000;
  38. EXPORT_SYMBOL(idt_cpu_freq);
  39. static struct resource ddr_reg[] = {
  40. {
  41. .name = "ddr-reg",
  42. .start = DDR0_PHYS_ADDR,
  43. .end = DDR0_PHYS_ADDR + sizeof(struct ddr_ram),
  44. .flags = IORESOURCE_MEM,
  45. }
  46. };
  47. void __init prom_free_prom_memory(void)
  48. {
  49. /* No prom memory to free */
  50. }
  51. static inline int match_tag(char *arg, const char *tag)
  52. {
  53. return strncmp(arg, tag, strlen(tag)) == 0;
  54. }
  55. static inline unsigned long tag2ul(char *arg, const char *tag)
  56. {
  57. char *num;
  58. num = arg + strlen(tag);
  59. return simple_strtoul(num, 0, 10);
  60. }
  61. void __init prom_setup_cmdline(void)
  62. {
  63. static char cmd_line[COMMAND_LINE_SIZE] __initdata;
  64. char *cp, *board;
  65. int prom_argc;
  66. char **prom_argv, **prom_envp;
  67. int i;
  68. prom_argc = fw_arg0;
  69. prom_argv = (char **) fw_arg1;
  70. prom_envp = (char **) fw_arg2;
  71. cp = cmd_line;
  72. /* Note: it is common that parameters start
  73. * at argv[1] and not argv[0],
  74. * however, our elf loader starts at [0] */
  75. for (i = 0; i < prom_argc; i++) {
  76. if (match_tag(prom_argv[i], FREQ_TAG)) {
  77. idt_cpu_freq = tag2ul(prom_argv[i], FREQ_TAG);
  78. continue;
  79. }
  80. #ifdef IGNORE_CMDLINE_MEM
  81. /* parses out the "mem=xx" arg */
  82. if (match_tag(prom_argv[i], MEM_TAG))
  83. continue;
  84. #endif
  85. if (i > 0)
  86. *(cp++) = ' ';
  87. if (match_tag(prom_argv[i], BOARD_TAG)) {
  88. board = prom_argv[i] + strlen(BOARD_TAG);
  89. if (match_tag(board, BOARD_RB532A))
  90. mips_machtype = MACH_MIKROTIK_RB532A;
  91. else
  92. mips_machtype = MACH_MIKROTIK_RB532;
  93. }
  94. strcpy(cp, prom_argv[i]);
  95. cp += strlen(prom_argv[i]);
  96. }
  97. *(cp++) = ' ';
  98. i = strlen(arcs_cmdline);
  99. if (i > 0) {
  100. *(cp++) = ' ';
  101. strcpy(cp, arcs_cmdline);
  102. cp += strlen(arcs_cmdline);
  103. }
  104. cmd_line[COMMAND_LINE_SIZE - 1] = '\0';
  105. strcpy(arcs_cmdline, cmd_line);
  106. }
  107. void __init prom_init(void)
  108. {
  109. struct ddr_ram __iomem *ddr;
  110. phys_t memsize;
  111. phys_t ddrbase;
  112. ddr = ioremap_nocache(ddr_reg[0].start,
  113. ddr_reg[0].end - ddr_reg[0].start);
  114. if (!ddr) {
  115. printk(KERN_ERR "Unable to remap DDR register\n");
  116. return;
  117. }
  118. ddrbase = (phys_t)&ddr->ddrbase;
  119. memsize = (phys_t)&ddr->ddrmask;
  120. memsize = 0 - memsize;
  121. prom_setup_cmdline();
  122. /* give all RAM to boot allocator,
  123. * except for the first 0x400 and the last 0x200 bytes */
  124. add_memory_region(ddrbase + 0x400, memsize - 0x600, BOOT_MEM_RAM);
  125. }