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/sound/pci/hda/patch_sigmatel.c

https://code.google.com/
C | 6318 lines | 5058 code | 749 blank | 511 comment | 689 complexity | 1dc7dc31c7f3ca7483ebe3402c279632 MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0

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  1. /*
  2. * Universal Interface for Intel High Definition Audio Codec
  3. *
  4. * HD audio interface patch for SigmaTel STAC92xx
  5. *
  6. * Copyright (c) 2005 Embedded Alley Solutions, Inc.
  7. * Matt Porter <mporter@embeddedalley.com>
  8. *
  9. * Based on patch_cmedia.c and patch_realtek.c
  10. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  11. *
  12. * This driver is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This driver is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/init.h>
  27. #include <linux/delay.h>
  28. #include <linux/slab.h>
  29. #include <linux/pci.h>
  30. #include <linux/dmi.h>
  31. #include <sound/core.h>
  32. #include <sound/asoundef.h>
  33. #include <sound/jack.h>
  34. #include "hda_codec.h"
  35. #include "hda_local.h"
  36. #include "hda_beep.h"
  37. enum {
  38. STAC_VREF_EVENT = 1,
  39. STAC_INSERT_EVENT,
  40. STAC_PWR_EVENT,
  41. STAC_HP_EVENT,
  42. STAC_LO_EVENT,
  43. STAC_MIC_EVENT,
  44. };
  45. enum {
  46. STAC_AUTO,
  47. STAC_REF,
  48. STAC_9200_OQO,
  49. STAC_9200_DELL_D21,
  50. STAC_9200_DELL_D22,
  51. STAC_9200_DELL_D23,
  52. STAC_9200_DELL_M21,
  53. STAC_9200_DELL_M22,
  54. STAC_9200_DELL_M23,
  55. STAC_9200_DELL_M24,
  56. STAC_9200_DELL_M25,
  57. STAC_9200_DELL_M26,
  58. STAC_9200_DELL_M27,
  59. STAC_9200_M4,
  60. STAC_9200_M4_2,
  61. STAC_9200_PANASONIC,
  62. STAC_9200_MODELS
  63. };
  64. enum {
  65. STAC_9205_AUTO,
  66. STAC_9205_REF,
  67. STAC_9205_DELL_M42,
  68. STAC_9205_DELL_M43,
  69. STAC_9205_DELL_M44,
  70. STAC_9205_EAPD,
  71. STAC_9205_MODELS
  72. };
  73. enum {
  74. STAC_92HD73XX_AUTO,
  75. STAC_92HD73XX_NO_JD, /* no jack-detection */
  76. STAC_92HD73XX_REF,
  77. STAC_92HD73XX_INTEL,
  78. STAC_DELL_M6_AMIC,
  79. STAC_DELL_M6_DMIC,
  80. STAC_DELL_M6_BOTH,
  81. STAC_DELL_EQ,
  82. STAC_ALIENWARE_M17X,
  83. STAC_92HD73XX_MODELS
  84. };
  85. enum {
  86. STAC_92HD83XXX_AUTO,
  87. STAC_92HD83XXX_REF,
  88. STAC_92HD83XXX_PWR_REF,
  89. STAC_DELL_S14,
  90. STAC_92HD83XXX_HP,
  91. STAC_92HD83XXX_MODELS
  92. };
  93. enum {
  94. STAC_92HD71BXX_AUTO,
  95. STAC_92HD71BXX_REF,
  96. STAC_DELL_M4_1,
  97. STAC_DELL_M4_2,
  98. STAC_DELL_M4_3,
  99. STAC_HP_M4,
  100. STAC_HP_DV4,
  101. STAC_HP_DV5,
  102. STAC_HP_HDX,
  103. STAC_HP_DV4_1222NR,
  104. STAC_92HD71BXX_MODELS
  105. };
  106. enum {
  107. STAC_925x_AUTO,
  108. STAC_925x_REF,
  109. STAC_M1,
  110. STAC_M1_2,
  111. STAC_M2,
  112. STAC_M2_2,
  113. STAC_M3,
  114. STAC_M5,
  115. STAC_M6,
  116. STAC_925x_MODELS
  117. };
  118. enum {
  119. STAC_922X_AUTO,
  120. STAC_D945_REF,
  121. STAC_D945GTP3,
  122. STAC_D945GTP5,
  123. STAC_INTEL_MAC_V1,
  124. STAC_INTEL_MAC_V2,
  125. STAC_INTEL_MAC_V3,
  126. STAC_INTEL_MAC_V4,
  127. STAC_INTEL_MAC_V5,
  128. STAC_INTEL_MAC_AUTO, /* This model is selected if no module parameter
  129. * is given, one of the above models will be
  130. * chosen according to the subsystem id. */
  131. /* for backward compatibility */
  132. STAC_MACMINI,
  133. STAC_MACBOOK,
  134. STAC_MACBOOK_PRO_V1,
  135. STAC_MACBOOK_PRO_V2,
  136. STAC_IMAC_INTEL,
  137. STAC_IMAC_INTEL_20,
  138. STAC_ECS_202,
  139. STAC_922X_DELL_D81,
  140. STAC_922X_DELL_D82,
  141. STAC_922X_DELL_M81,
  142. STAC_922X_DELL_M82,
  143. STAC_922X_MODELS
  144. };
  145. enum {
  146. STAC_927X_AUTO,
  147. STAC_D965_REF_NO_JD, /* no jack-detection */
  148. STAC_D965_REF,
  149. STAC_D965_3ST,
  150. STAC_D965_5ST,
  151. STAC_D965_5ST_NO_FP,
  152. STAC_DELL_3ST,
  153. STAC_DELL_BIOS,
  154. STAC_927X_VOLKNOB,
  155. STAC_927X_MODELS
  156. };
  157. enum {
  158. STAC_9872_AUTO,
  159. STAC_9872_VAIO,
  160. STAC_9872_MODELS
  161. };
  162. struct sigmatel_event {
  163. hda_nid_t nid;
  164. unsigned char type;
  165. unsigned char tag;
  166. int data;
  167. };
  168. struct sigmatel_jack {
  169. hda_nid_t nid;
  170. int type;
  171. struct snd_jack *jack;
  172. };
  173. struct sigmatel_mic_route {
  174. hda_nid_t pin;
  175. signed char mux_idx;
  176. signed char dmux_idx;
  177. };
  178. struct sigmatel_spec {
  179. struct snd_kcontrol_new *mixers[4];
  180. unsigned int num_mixers;
  181. int board_config;
  182. unsigned int eapd_switch: 1;
  183. unsigned int surr_switch: 1;
  184. unsigned int alt_switch: 1;
  185. unsigned int hp_detect: 1;
  186. unsigned int spdif_mute: 1;
  187. unsigned int check_volume_offset:1;
  188. unsigned int auto_mic:1;
  189. unsigned int linear_tone_beep:1;
  190. /* gpio lines */
  191. unsigned int eapd_mask;
  192. unsigned int gpio_mask;
  193. unsigned int gpio_dir;
  194. unsigned int gpio_data;
  195. unsigned int gpio_mute;
  196. unsigned int gpio_led;
  197. unsigned int gpio_led_polarity;
  198. /* stream */
  199. unsigned int stream_delay;
  200. /* analog loopback */
  201. struct snd_kcontrol_new *aloopback_ctl;
  202. unsigned char aloopback_mask;
  203. unsigned char aloopback_shift;
  204. /* power management */
  205. unsigned int num_pwrs;
  206. unsigned int *pwr_mapping;
  207. hda_nid_t *pwr_nids;
  208. hda_nid_t *dac_list;
  209. /* jack detection */
  210. struct snd_array jacks;
  211. /* events */
  212. struct snd_array events;
  213. /* playback */
  214. struct hda_input_mux *mono_mux;
  215. unsigned int cur_mmux;
  216. struct hda_multi_out multiout;
  217. hda_nid_t dac_nids[5];
  218. hda_nid_t hp_dacs[5];
  219. hda_nid_t speaker_dacs[5];
  220. int volume_offset;
  221. /* capture */
  222. hda_nid_t *adc_nids;
  223. unsigned int num_adcs;
  224. hda_nid_t *mux_nids;
  225. unsigned int num_muxes;
  226. hda_nid_t *dmic_nids;
  227. unsigned int num_dmics;
  228. hda_nid_t *dmux_nids;
  229. unsigned int num_dmuxes;
  230. hda_nid_t *smux_nids;
  231. unsigned int num_smuxes;
  232. unsigned int num_analog_muxes;
  233. unsigned long *capvols; /* amp-volume attr: HDA_COMPOSE_AMP_VAL() */
  234. unsigned long *capsws; /* amp-mute attr: HDA_COMPOSE_AMP_VAL() */
  235. unsigned int num_caps; /* number of capture volume/switch elements */
  236. struct sigmatel_mic_route ext_mic;
  237. struct sigmatel_mic_route int_mic;
  238. const char **spdif_labels;
  239. hda_nid_t dig_in_nid;
  240. hda_nid_t mono_nid;
  241. hda_nid_t anabeep_nid;
  242. hda_nid_t digbeep_nid;
  243. /* pin widgets */
  244. hda_nid_t *pin_nids;
  245. unsigned int num_pins;
  246. /* codec specific stuff */
  247. struct hda_verb *init;
  248. struct snd_kcontrol_new *mixer;
  249. /* capture source */
  250. struct hda_input_mux *dinput_mux;
  251. unsigned int cur_dmux[2];
  252. struct hda_input_mux *input_mux;
  253. unsigned int cur_mux[3];
  254. struct hda_input_mux *sinput_mux;
  255. unsigned int cur_smux[2];
  256. unsigned int cur_amux;
  257. hda_nid_t *amp_nids;
  258. unsigned int powerdown_adcs;
  259. /* i/o switches */
  260. unsigned int io_switch[2];
  261. unsigned int clfe_swap;
  262. hda_nid_t line_switch; /* shared line-in for input and output */
  263. hda_nid_t mic_switch; /* shared mic-in for input and output */
  264. hda_nid_t hp_switch; /* NID of HP as line-out */
  265. unsigned int aloopback;
  266. struct hda_pcm pcm_rec[2]; /* PCM information */
  267. /* dynamic controls and input_mux */
  268. struct auto_pin_cfg autocfg;
  269. struct snd_array kctls;
  270. struct hda_input_mux private_dimux;
  271. struct hda_input_mux private_imux;
  272. struct hda_input_mux private_smux;
  273. struct hda_input_mux private_mono_mux;
  274. };
  275. static hda_nid_t stac9200_adc_nids[1] = {
  276. 0x03,
  277. };
  278. static hda_nid_t stac9200_mux_nids[1] = {
  279. 0x0c,
  280. };
  281. static hda_nid_t stac9200_dac_nids[1] = {
  282. 0x02,
  283. };
  284. static hda_nid_t stac92hd73xx_pwr_nids[8] = {
  285. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  286. 0x0f, 0x10, 0x11
  287. };
  288. static hda_nid_t stac92hd73xx_slave_dig_outs[2] = {
  289. 0x26, 0,
  290. };
  291. static hda_nid_t stac92hd73xx_adc_nids[2] = {
  292. 0x1a, 0x1b
  293. };
  294. #define STAC92HD73XX_NUM_DMICS 2
  295. static hda_nid_t stac92hd73xx_dmic_nids[STAC92HD73XX_NUM_DMICS + 1] = {
  296. 0x13, 0x14, 0
  297. };
  298. #define STAC92HD73_DAC_COUNT 5
  299. static hda_nid_t stac92hd73xx_mux_nids[2] = {
  300. 0x20, 0x21,
  301. };
  302. static hda_nid_t stac92hd73xx_dmux_nids[2] = {
  303. 0x20, 0x21,
  304. };
  305. static hda_nid_t stac92hd73xx_smux_nids[2] = {
  306. 0x22, 0x23,
  307. };
  308. #define STAC92HD73XX_NUM_CAPS 2
  309. static unsigned long stac92hd73xx_capvols[] = {
  310. HDA_COMPOSE_AMP_VAL(0x20, 3, 0, HDA_OUTPUT),
  311. HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT),
  312. };
  313. #define stac92hd73xx_capsws stac92hd73xx_capvols
  314. #define STAC92HD83_DAC_COUNT 3
  315. static hda_nid_t stac92hd83xxx_mux_nids[2] = {
  316. 0x17, 0x18,
  317. };
  318. static hda_nid_t stac92hd83xxx_adc_nids[2] = {
  319. 0x15, 0x16,
  320. };
  321. static hda_nid_t stac92hd83xxx_pwr_nids[4] = {
  322. 0xa, 0xb, 0xd, 0xe,
  323. };
  324. static hda_nid_t stac92hd83xxx_slave_dig_outs[2] = {
  325. 0x1e, 0,
  326. };
  327. static unsigned int stac92hd83xxx_pwr_mapping[4] = {
  328. 0x03, 0x0c, 0x20, 0x40,
  329. };
  330. #define STAC92HD83XXX_NUM_CAPS 2
  331. static unsigned long stac92hd83xxx_capvols[] = {
  332. HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_OUTPUT),
  333. HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_OUTPUT),
  334. };
  335. #define stac92hd83xxx_capsws stac92hd83xxx_capvols
  336. static hda_nid_t stac92hd71bxx_pwr_nids[3] = {
  337. 0x0a, 0x0d, 0x0f
  338. };
  339. static hda_nid_t stac92hd71bxx_adc_nids[2] = {
  340. 0x12, 0x13,
  341. };
  342. static hda_nid_t stac92hd71bxx_mux_nids[2] = {
  343. 0x1a, 0x1b
  344. };
  345. static hda_nid_t stac92hd71bxx_dmux_nids[2] = {
  346. 0x1c, 0x1d,
  347. };
  348. static hda_nid_t stac92hd71bxx_smux_nids[2] = {
  349. 0x24, 0x25,
  350. };
  351. #define STAC92HD71BXX_NUM_DMICS 2
  352. static hda_nid_t stac92hd71bxx_dmic_nids[STAC92HD71BXX_NUM_DMICS + 1] = {
  353. 0x18, 0x19, 0
  354. };
  355. static hda_nid_t stac92hd71bxx_slave_dig_outs[2] = {
  356. 0x22, 0
  357. };
  358. #define STAC92HD71BXX_NUM_CAPS 2
  359. static unsigned long stac92hd71bxx_capvols[] = {
  360. HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
  361. HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
  362. };
  363. #define stac92hd71bxx_capsws stac92hd71bxx_capvols
  364. static hda_nid_t stac925x_adc_nids[1] = {
  365. 0x03,
  366. };
  367. static hda_nid_t stac925x_mux_nids[1] = {
  368. 0x0f,
  369. };
  370. static hda_nid_t stac925x_dac_nids[1] = {
  371. 0x02,
  372. };
  373. #define STAC925X_NUM_DMICS 1
  374. static hda_nid_t stac925x_dmic_nids[STAC925X_NUM_DMICS + 1] = {
  375. 0x15, 0
  376. };
  377. static hda_nid_t stac925x_dmux_nids[1] = {
  378. 0x14,
  379. };
  380. static unsigned long stac925x_capvols[] = {
  381. HDA_COMPOSE_AMP_VAL(0x09, 3, 0, HDA_OUTPUT),
  382. };
  383. static unsigned long stac925x_capsws[] = {
  384. HDA_COMPOSE_AMP_VAL(0x14, 3, 0, HDA_OUTPUT),
  385. };
  386. static hda_nid_t stac922x_adc_nids[2] = {
  387. 0x06, 0x07,
  388. };
  389. static hda_nid_t stac922x_mux_nids[2] = {
  390. 0x12, 0x13,
  391. };
  392. #define STAC922X_NUM_CAPS 2
  393. static unsigned long stac922x_capvols[] = {
  394. HDA_COMPOSE_AMP_VAL(0x17, 3, 0, HDA_INPUT),
  395. HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
  396. };
  397. #define stac922x_capsws stac922x_capvols
  398. static hda_nid_t stac927x_slave_dig_outs[2] = {
  399. 0x1f, 0,
  400. };
  401. static hda_nid_t stac927x_adc_nids[3] = {
  402. 0x07, 0x08, 0x09
  403. };
  404. static hda_nid_t stac927x_mux_nids[3] = {
  405. 0x15, 0x16, 0x17
  406. };
  407. static hda_nid_t stac927x_smux_nids[1] = {
  408. 0x21,
  409. };
  410. static hda_nid_t stac927x_dac_nids[6] = {
  411. 0x02, 0x03, 0x04, 0x05, 0x06, 0
  412. };
  413. static hda_nid_t stac927x_dmux_nids[1] = {
  414. 0x1b,
  415. };
  416. #define STAC927X_NUM_DMICS 2
  417. static hda_nid_t stac927x_dmic_nids[STAC927X_NUM_DMICS + 1] = {
  418. 0x13, 0x14, 0
  419. };
  420. #define STAC927X_NUM_CAPS 3
  421. static unsigned long stac927x_capvols[] = {
  422. HDA_COMPOSE_AMP_VAL(0x18, 3, 0, HDA_INPUT),
  423. HDA_COMPOSE_AMP_VAL(0x19, 3, 0, HDA_INPUT),
  424. HDA_COMPOSE_AMP_VAL(0x1a, 3, 0, HDA_INPUT),
  425. };
  426. static unsigned long stac927x_capsws[] = {
  427. HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_OUTPUT),
  428. HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_OUTPUT),
  429. HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
  430. };
  431. static const char *stac927x_spdif_labels[5] = {
  432. "Digital Playback", "ADAT", "Analog Mux 1",
  433. "Analog Mux 2", "Analog Mux 3"
  434. };
  435. static hda_nid_t stac9205_adc_nids[2] = {
  436. 0x12, 0x13
  437. };
  438. static hda_nid_t stac9205_mux_nids[2] = {
  439. 0x19, 0x1a
  440. };
  441. static hda_nid_t stac9205_dmux_nids[1] = {
  442. 0x1d,
  443. };
  444. static hda_nid_t stac9205_smux_nids[1] = {
  445. 0x21,
  446. };
  447. #define STAC9205_NUM_DMICS 2
  448. static hda_nid_t stac9205_dmic_nids[STAC9205_NUM_DMICS + 1] = {
  449. 0x17, 0x18, 0
  450. };
  451. #define STAC9205_NUM_CAPS 2
  452. static unsigned long stac9205_capvols[] = {
  453. HDA_COMPOSE_AMP_VAL(0x1b, 3, 0, HDA_INPUT),
  454. HDA_COMPOSE_AMP_VAL(0x1c, 3, 0, HDA_INPUT),
  455. };
  456. static unsigned long stac9205_capsws[] = {
  457. HDA_COMPOSE_AMP_VAL(0x1d, 3, 0, HDA_OUTPUT),
  458. HDA_COMPOSE_AMP_VAL(0x1e, 3, 0, HDA_OUTPUT),
  459. };
  460. static hda_nid_t stac9200_pin_nids[8] = {
  461. 0x08, 0x09, 0x0d, 0x0e,
  462. 0x0f, 0x10, 0x11, 0x12,
  463. };
  464. static hda_nid_t stac925x_pin_nids[8] = {
  465. 0x07, 0x08, 0x0a, 0x0b,
  466. 0x0c, 0x0d, 0x10, 0x11,
  467. };
  468. static hda_nid_t stac922x_pin_nids[10] = {
  469. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  470. 0x0f, 0x10, 0x11, 0x15, 0x1b,
  471. };
  472. static hda_nid_t stac92hd73xx_pin_nids[13] = {
  473. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  474. 0x0f, 0x10, 0x11, 0x12, 0x13,
  475. 0x14, 0x22, 0x23
  476. };
  477. static hda_nid_t stac92hd83xxx_pin_nids[10] = {
  478. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  479. 0x0f, 0x10, 0x11, 0x1f, 0x20,
  480. };
  481. static hda_nid_t stac92hd88xxx_pin_nids[10] = {
  482. 0x0a, 0x0b, 0x0c, 0x0d,
  483. 0x0f, 0x11, 0x1f, 0x20,
  484. };
  485. #define STAC92HD71BXX_NUM_PINS 13
  486. static hda_nid_t stac92hd71bxx_pin_nids_4port[STAC92HD71BXX_NUM_PINS] = {
  487. 0x0a, 0x0b, 0x0c, 0x0d, 0x00,
  488. 0x00, 0x14, 0x18, 0x19, 0x1e,
  489. 0x1f, 0x20, 0x27
  490. };
  491. static hda_nid_t stac92hd71bxx_pin_nids_6port[STAC92HD71BXX_NUM_PINS] = {
  492. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  493. 0x0f, 0x14, 0x18, 0x19, 0x1e,
  494. 0x1f, 0x20, 0x27
  495. };
  496. static hda_nid_t stac927x_pin_nids[14] = {
  497. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  498. 0x0f, 0x10, 0x11, 0x12, 0x13,
  499. 0x14, 0x21, 0x22, 0x23,
  500. };
  501. static hda_nid_t stac9205_pin_nids[12] = {
  502. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  503. 0x0f, 0x14, 0x16, 0x17, 0x18,
  504. 0x21, 0x22,
  505. };
  506. static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
  507. struct snd_ctl_elem_info *uinfo)
  508. {
  509. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  510. struct sigmatel_spec *spec = codec->spec;
  511. return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
  512. }
  513. static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
  514. struct snd_ctl_elem_value *ucontrol)
  515. {
  516. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  517. struct sigmatel_spec *spec = codec->spec;
  518. unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  519. ucontrol->value.enumerated.item[0] = spec->cur_dmux[dmux_idx];
  520. return 0;
  521. }
  522. static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
  523. struct snd_ctl_elem_value *ucontrol)
  524. {
  525. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  526. struct sigmatel_spec *spec = codec->spec;
  527. unsigned int dmux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  528. return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
  529. spec->dmux_nids[dmux_idx], &spec->cur_dmux[dmux_idx]);
  530. }
  531. static int stac92xx_smux_enum_info(struct snd_kcontrol *kcontrol,
  532. struct snd_ctl_elem_info *uinfo)
  533. {
  534. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  535. struct sigmatel_spec *spec = codec->spec;
  536. return snd_hda_input_mux_info(spec->sinput_mux, uinfo);
  537. }
  538. static int stac92xx_smux_enum_get(struct snd_kcontrol *kcontrol,
  539. struct snd_ctl_elem_value *ucontrol)
  540. {
  541. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  542. struct sigmatel_spec *spec = codec->spec;
  543. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  544. ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
  545. return 0;
  546. }
  547. static int stac92xx_smux_enum_put(struct snd_kcontrol *kcontrol,
  548. struct snd_ctl_elem_value *ucontrol)
  549. {
  550. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  551. struct sigmatel_spec *spec = codec->spec;
  552. struct hda_input_mux *smux = &spec->private_smux;
  553. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  554. int err, val;
  555. hda_nid_t nid;
  556. err = snd_hda_input_mux_put(codec, spec->sinput_mux, ucontrol,
  557. spec->smux_nids[smux_idx], &spec->cur_smux[smux_idx]);
  558. if (err < 0)
  559. return err;
  560. if (spec->spdif_mute) {
  561. if (smux_idx == 0)
  562. nid = spec->multiout.dig_out_nid;
  563. else
  564. nid = codec->slave_dig_outs[smux_idx - 1];
  565. if (spec->cur_smux[smux_idx] == smux->num_items - 1)
  566. val = HDA_AMP_MUTE;
  567. else
  568. val = 0;
  569. /* un/mute SPDIF out */
  570. snd_hda_codec_amp_stereo(codec, nid, HDA_OUTPUT, 0,
  571. HDA_AMP_MUTE, val);
  572. }
  573. return 0;
  574. }
  575. static unsigned int stac92xx_vref_set(struct hda_codec *codec,
  576. hda_nid_t nid, unsigned int new_vref)
  577. {
  578. int error;
  579. unsigned int pincfg;
  580. pincfg = snd_hda_codec_read(codec, nid, 0,
  581. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  582. pincfg &= 0xff;
  583. pincfg &= ~(AC_PINCTL_VREFEN | AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
  584. pincfg |= new_vref;
  585. if (new_vref == AC_PINCTL_VREF_HIZ)
  586. pincfg |= AC_PINCTL_OUT_EN;
  587. else
  588. pincfg |= AC_PINCTL_IN_EN;
  589. error = snd_hda_codec_write_cache(codec, nid, 0,
  590. AC_VERB_SET_PIN_WIDGET_CONTROL, pincfg);
  591. if (error < 0)
  592. return error;
  593. else
  594. return 1;
  595. }
  596. static unsigned int stac92xx_vref_get(struct hda_codec *codec, hda_nid_t nid)
  597. {
  598. unsigned int vref;
  599. vref = snd_hda_codec_read(codec, nid, 0,
  600. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  601. vref &= AC_PINCTL_VREFEN;
  602. return vref;
  603. }
  604. static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  605. {
  606. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  607. struct sigmatel_spec *spec = codec->spec;
  608. return snd_hda_input_mux_info(spec->input_mux, uinfo);
  609. }
  610. static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  611. {
  612. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  613. struct sigmatel_spec *spec = codec->spec;
  614. unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  615. ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
  616. return 0;
  617. }
  618. static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  619. {
  620. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  621. struct sigmatel_spec *spec = codec->spec;
  622. unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  623. const struct hda_input_mux *imux = spec->input_mux;
  624. unsigned int idx, prev_idx;
  625. idx = ucontrol->value.enumerated.item[0];
  626. if (idx >= imux->num_items)
  627. idx = imux->num_items - 1;
  628. prev_idx = spec->cur_mux[adc_idx];
  629. if (prev_idx == idx)
  630. return 0;
  631. if (idx < spec->num_analog_muxes) {
  632. snd_hda_codec_write_cache(codec, spec->mux_nids[adc_idx], 0,
  633. AC_VERB_SET_CONNECT_SEL,
  634. imux->items[idx].index);
  635. if (prev_idx >= spec->num_analog_muxes) {
  636. imux = spec->dinput_mux;
  637. /* 0 = analog */
  638. snd_hda_codec_write_cache(codec,
  639. spec->dmux_nids[adc_idx], 0,
  640. AC_VERB_SET_CONNECT_SEL,
  641. imux->items[0].index);
  642. }
  643. } else {
  644. imux = spec->dinput_mux;
  645. snd_hda_codec_write_cache(codec, spec->dmux_nids[adc_idx], 0,
  646. AC_VERB_SET_CONNECT_SEL,
  647. imux->items[idx - 1].index);
  648. }
  649. spec->cur_mux[adc_idx] = idx;
  650. return 1;
  651. }
  652. static int stac92xx_mono_mux_enum_info(struct snd_kcontrol *kcontrol,
  653. struct snd_ctl_elem_info *uinfo)
  654. {
  655. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  656. struct sigmatel_spec *spec = codec->spec;
  657. return snd_hda_input_mux_info(spec->mono_mux, uinfo);
  658. }
  659. static int stac92xx_mono_mux_enum_get(struct snd_kcontrol *kcontrol,
  660. struct snd_ctl_elem_value *ucontrol)
  661. {
  662. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  663. struct sigmatel_spec *spec = codec->spec;
  664. ucontrol->value.enumerated.item[0] = spec->cur_mmux;
  665. return 0;
  666. }
  667. static int stac92xx_mono_mux_enum_put(struct snd_kcontrol *kcontrol,
  668. struct snd_ctl_elem_value *ucontrol)
  669. {
  670. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  671. struct sigmatel_spec *spec = codec->spec;
  672. return snd_hda_input_mux_put(codec, spec->mono_mux, ucontrol,
  673. spec->mono_nid, &spec->cur_mmux);
  674. }
  675. #define stac92xx_aloopback_info snd_ctl_boolean_mono_info
  676. static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
  677. struct snd_ctl_elem_value *ucontrol)
  678. {
  679. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  680. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  681. struct sigmatel_spec *spec = codec->spec;
  682. ucontrol->value.integer.value[0] = !!(spec->aloopback &
  683. (spec->aloopback_mask << idx));
  684. return 0;
  685. }
  686. static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
  687. struct snd_ctl_elem_value *ucontrol)
  688. {
  689. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  690. struct sigmatel_spec *spec = codec->spec;
  691. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  692. unsigned int dac_mode;
  693. unsigned int val, idx_val;
  694. idx_val = spec->aloopback_mask << idx;
  695. if (ucontrol->value.integer.value[0])
  696. val = spec->aloopback | idx_val;
  697. else
  698. val = spec->aloopback & ~idx_val;
  699. if (spec->aloopback == val)
  700. return 0;
  701. spec->aloopback = val;
  702. /* Only return the bits defined by the shift value of the
  703. * first two bytes of the mask
  704. */
  705. dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
  706. kcontrol->private_value & 0xFFFF, 0x0);
  707. dac_mode >>= spec->aloopback_shift;
  708. if (spec->aloopback & idx_val) {
  709. snd_hda_power_up(codec);
  710. dac_mode |= idx_val;
  711. } else {
  712. snd_hda_power_down(codec);
  713. dac_mode &= ~idx_val;
  714. }
  715. snd_hda_codec_write_cache(codec, codec->afg, 0,
  716. kcontrol->private_value >> 16, dac_mode);
  717. return 1;
  718. }
  719. static struct hda_verb stac9200_core_init[] = {
  720. /* set dac0mux for dac converter */
  721. { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  722. {}
  723. };
  724. static struct hda_verb stac9200_eapd_init[] = {
  725. /* set dac0mux for dac converter */
  726. {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  727. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  728. {}
  729. };
  730. static struct hda_verb dell_eq_core_init[] = {
  731. /* set master volume to max value without distortion
  732. * and direct control */
  733. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
  734. {}
  735. };
  736. static struct hda_verb stac92hd73xx_core_init[] = {
  737. /* set master volume and direct control */
  738. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  739. {}
  740. };
  741. static struct hda_verb stac92hd83xxx_core_init[] = {
  742. /* power state controls amps */
  743. { 0x01, AC_VERB_SET_EAPD, 1 << 2},
  744. {}
  745. };
  746. static struct hda_verb stac92hd71bxx_core_init[] = {
  747. /* set master volume and direct control */
  748. { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  749. {}
  750. };
  751. static struct hda_verb stac92hd71bxx_unmute_core_init[] = {
  752. /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
  753. { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  754. { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  755. { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  756. {}
  757. };
  758. static struct hda_verb stac925x_core_init[] = {
  759. /* set dac0mux for dac converter */
  760. { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
  761. /* mute the master volume */
  762. { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
  763. {}
  764. };
  765. static struct hda_verb stac922x_core_init[] = {
  766. /* set master volume and direct control */
  767. { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  768. {}
  769. };
  770. static struct hda_verb d965_core_init[] = {
  771. /* set master volume and direct control */
  772. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  773. /* unmute node 0x1b */
  774. { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  775. /* select node 0x03 as DAC */
  776. { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  777. {}
  778. };
  779. static struct hda_verb dell_3st_core_init[] = {
  780. /* don't set delta bit */
  781. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  782. /* unmute node 0x1b */
  783. {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  784. /* select node 0x03 as DAC */
  785. {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  786. {}
  787. };
  788. static struct hda_verb stac927x_core_init[] = {
  789. /* set master volume and direct control */
  790. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  791. /* enable analog pc beep path */
  792. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  793. {}
  794. };
  795. static struct hda_verb stac927x_volknob_core_init[] = {
  796. /* don't set delta bit */
  797. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  798. /* enable analog pc beep path */
  799. {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  800. {}
  801. };
  802. static struct hda_verb stac9205_core_init[] = {
  803. /* set master volume and direct control */
  804. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  805. /* enable analog pc beep path */
  806. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  807. {}
  808. };
  809. #define STAC_MONO_MUX \
  810. { \
  811. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  812. .name = "Mono Mux", \
  813. .count = 1, \
  814. .info = stac92xx_mono_mux_enum_info, \
  815. .get = stac92xx_mono_mux_enum_get, \
  816. .put = stac92xx_mono_mux_enum_put, \
  817. }
  818. #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
  819. { \
  820. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  821. .name = "Analog Loopback", \
  822. .count = cnt, \
  823. .info = stac92xx_aloopback_info, \
  824. .get = stac92xx_aloopback_get, \
  825. .put = stac92xx_aloopback_put, \
  826. .private_value = verb_read | (verb_write << 16), \
  827. }
  828. #define DC_BIAS(xname, idx, nid) \
  829. { \
  830. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  831. .name = xname, \
  832. .index = idx, \
  833. .info = stac92xx_dc_bias_info, \
  834. .get = stac92xx_dc_bias_get, \
  835. .put = stac92xx_dc_bias_put, \
  836. .private_value = nid, \
  837. }
  838. static struct snd_kcontrol_new stac9200_mixer[] = {
  839. HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
  840. HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
  841. HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
  842. HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
  843. { } /* end */
  844. };
  845. static struct snd_kcontrol_new stac92hd73xx_6ch_loopback[] = {
  846. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3),
  847. {}
  848. };
  849. static struct snd_kcontrol_new stac92hd73xx_8ch_loopback[] = {
  850. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4),
  851. {}
  852. };
  853. static struct snd_kcontrol_new stac92hd73xx_10ch_loopback[] = {
  854. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5),
  855. {}
  856. };
  857. static struct snd_kcontrol_new stac92hd71bxx_loopback[] = {
  858. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2)
  859. };
  860. static struct snd_kcontrol_new stac925x_mixer[] = {
  861. HDA_CODEC_VOLUME("Master Playback Volume", 0x0e, 0, HDA_OUTPUT),
  862. HDA_CODEC_MUTE("Master Playback Switch", 0x0e, 0, HDA_OUTPUT),
  863. { } /* end */
  864. };
  865. static struct snd_kcontrol_new stac9205_loopback[] = {
  866. STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1),
  867. {}
  868. };
  869. static struct snd_kcontrol_new stac927x_loopback[] = {
  870. STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1),
  871. {}
  872. };
  873. static struct snd_kcontrol_new stac_dmux_mixer = {
  874. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  875. .name = "Digital Input Source",
  876. /* count set later */
  877. .info = stac92xx_dmux_enum_info,
  878. .get = stac92xx_dmux_enum_get,
  879. .put = stac92xx_dmux_enum_put,
  880. };
  881. static struct snd_kcontrol_new stac_smux_mixer = {
  882. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  883. .name = "IEC958 Playback Source",
  884. /* count set later */
  885. .info = stac92xx_smux_enum_info,
  886. .get = stac92xx_smux_enum_get,
  887. .put = stac92xx_smux_enum_put,
  888. };
  889. static const char *slave_vols[] = {
  890. "Front Playback Volume",
  891. "Surround Playback Volume",
  892. "Center Playback Volume",
  893. "LFE Playback Volume",
  894. "Side Playback Volume",
  895. "Headphone Playback Volume",
  896. "Speaker Playback Volume",
  897. NULL
  898. };
  899. static const char *slave_sws[] = {
  900. "Front Playback Switch",
  901. "Surround Playback Switch",
  902. "Center Playback Switch",
  903. "LFE Playback Switch",
  904. "Side Playback Switch",
  905. "Headphone Playback Switch",
  906. "Speaker Playback Switch",
  907. "IEC958 Playback Switch",
  908. NULL
  909. };
  910. static void stac92xx_free_kctls(struct hda_codec *codec);
  911. static int stac92xx_add_jack(struct hda_codec *codec, hda_nid_t nid, int type);
  912. static int stac92xx_build_controls(struct hda_codec *codec)
  913. {
  914. struct sigmatel_spec *spec = codec->spec;
  915. struct auto_pin_cfg *cfg = &spec->autocfg;
  916. hda_nid_t nid;
  917. int err;
  918. int i;
  919. if (spec->mixer) {
  920. err = snd_hda_add_new_ctls(codec, spec->mixer);
  921. if (err < 0)
  922. return err;
  923. }
  924. for (i = 0; i < spec->num_mixers; i++) {
  925. err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
  926. if (err < 0)
  927. return err;
  928. }
  929. if (!spec->auto_mic && spec->num_dmuxes > 0 &&
  930. snd_hda_get_bool_hint(codec, "separate_dmux") == 1) {
  931. stac_dmux_mixer.count = spec->num_dmuxes;
  932. err = snd_hda_ctl_add(codec, 0,
  933. snd_ctl_new1(&stac_dmux_mixer, codec));
  934. if (err < 0)
  935. return err;
  936. }
  937. if (spec->num_smuxes > 0) {
  938. int wcaps = get_wcaps(codec, spec->multiout.dig_out_nid);
  939. struct hda_input_mux *smux = &spec->private_smux;
  940. /* check for mute support on SPDIF out */
  941. if (wcaps & AC_WCAP_OUT_AMP) {
  942. smux->items[smux->num_items].label = "Off";
  943. smux->items[smux->num_items].index = 0;
  944. smux->num_items++;
  945. spec->spdif_mute = 1;
  946. }
  947. stac_smux_mixer.count = spec->num_smuxes;
  948. err = snd_hda_ctl_add(codec, 0,
  949. snd_ctl_new1(&stac_smux_mixer, codec));
  950. if (err < 0)
  951. return err;
  952. }
  953. if (spec->multiout.dig_out_nid) {
  954. err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
  955. if (err < 0)
  956. return err;
  957. err = snd_hda_create_spdif_share_sw(codec,
  958. &spec->multiout);
  959. if (err < 0)
  960. return err;
  961. spec->multiout.share_spdif = 1;
  962. }
  963. if (spec->dig_in_nid && !(spec->gpio_dir & 0x01)) {
  964. err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
  965. if (err < 0)
  966. return err;
  967. }
  968. /* if we have no master control, let's create it */
  969. if (!snd_hda_find_mixer_ctl(codec, "Master Playback Volume")) {
  970. unsigned int vmaster_tlv[4];
  971. snd_hda_set_vmaster_tlv(codec, spec->multiout.dac_nids[0],
  972. HDA_OUTPUT, vmaster_tlv);
  973. /* correct volume offset */
  974. vmaster_tlv[2] += vmaster_tlv[3] * spec->volume_offset;
  975. err = snd_hda_add_vmaster(codec, "Master Playback Volume",
  976. vmaster_tlv, slave_vols);
  977. if (err < 0)
  978. return err;
  979. }
  980. if (!snd_hda_find_mixer_ctl(codec, "Master Playback Switch")) {
  981. err = snd_hda_add_vmaster(codec, "Master Playback Switch",
  982. NULL, slave_sws);
  983. if (err < 0)
  984. return err;
  985. }
  986. if (spec->aloopback_ctl &&
  987. snd_hda_get_bool_hint(codec, "loopback") == 1) {
  988. err = snd_hda_add_new_ctls(codec, spec->aloopback_ctl);
  989. if (err < 0)
  990. return err;
  991. }
  992. stac92xx_free_kctls(codec); /* no longer needed */
  993. /* create jack input elements */
  994. if (spec->hp_detect) {
  995. for (i = 0; i < cfg->hp_outs; i++) {
  996. int type = SND_JACK_HEADPHONE;
  997. nid = cfg->hp_pins[i];
  998. /* jack detection */
  999. if (cfg->hp_outs == i)
  1000. type |= SND_JACK_LINEOUT;
  1001. err = stac92xx_add_jack(codec, nid, type);
  1002. if (err < 0)
  1003. return err;
  1004. }
  1005. }
  1006. for (i = 0; i < cfg->line_outs; i++) {
  1007. err = stac92xx_add_jack(codec, cfg->line_out_pins[i],
  1008. SND_JACK_LINEOUT);
  1009. if (err < 0)
  1010. return err;
  1011. }
  1012. for (i = 0; i < AUTO_PIN_LAST; i++) {
  1013. nid = cfg->input_pins[i];
  1014. if (nid) {
  1015. err = stac92xx_add_jack(codec, nid,
  1016. SND_JACK_MICROPHONE);
  1017. if (err < 0)
  1018. return err;
  1019. }
  1020. }
  1021. return 0;
  1022. }
  1023. static unsigned int ref9200_pin_configs[8] = {
  1024. 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
  1025. 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
  1026. };
  1027. static unsigned int gateway9200_m4_pin_configs[8] = {
  1028. 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
  1029. 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
  1030. };
  1031. static unsigned int gateway9200_m4_2_pin_configs[8] = {
  1032. 0x400000fe, 0x404500f4, 0x400100f0, 0x90110010,
  1033. 0x400100f1, 0x02a1902e, 0x500000f2, 0x500000f3,
  1034. };
  1035. /*
  1036. STAC 9200 pin configs for
  1037. 102801A8
  1038. 102801DE
  1039. 102801E8
  1040. */
  1041. static unsigned int dell9200_d21_pin_configs[8] = {
  1042. 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
  1043. 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
  1044. };
  1045. /*
  1046. STAC 9200 pin configs for
  1047. 102801C0
  1048. 102801C1
  1049. */
  1050. static unsigned int dell9200_d22_pin_configs[8] = {
  1051. 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
  1052. 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
  1053. };
  1054. /*
  1055. STAC 9200 pin configs for
  1056. 102801C4 (Dell Dimension E310)
  1057. 102801C5
  1058. 102801C7
  1059. 102801D9
  1060. 102801DA
  1061. 102801E3
  1062. */
  1063. static unsigned int dell9200_d23_pin_configs[8] = {
  1064. 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
  1065. 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
  1066. };
  1067. /*
  1068. STAC 9200-32 pin configs for
  1069. 102801B5 (Dell Inspiron 630m)
  1070. 102801D8 (Dell Inspiron 640m)
  1071. */
  1072. static unsigned int dell9200_m21_pin_configs[8] = {
  1073. 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
  1074. 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
  1075. };
  1076. /*
  1077. STAC 9200-32 pin configs for
  1078. 102801C2 (Dell Latitude D620)
  1079. 102801C8
  1080. 102801CC (Dell Latitude D820)
  1081. 102801D4
  1082. 102801D6
  1083. */
  1084. static unsigned int dell9200_m22_pin_configs[8] = {
  1085. 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
  1086. 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
  1087. };
  1088. /*
  1089. STAC 9200-32 pin configs for
  1090. 102801CE (Dell XPS M1710)
  1091. 102801CF (Dell Precision M90)
  1092. */
  1093. static unsigned int dell9200_m23_pin_configs[8] = {
  1094. 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
  1095. 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
  1096. };
  1097. /*
  1098. STAC 9200-32 pin configs for
  1099. 102801C9
  1100. 102801CA
  1101. 102801CB (Dell Latitude 120L)
  1102. 102801D3
  1103. */
  1104. static unsigned int dell9200_m24_pin_configs[8] = {
  1105. 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
  1106. 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
  1107. };
  1108. /*
  1109. STAC 9200-32 pin configs for
  1110. 102801BD (Dell Inspiron E1505n)
  1111. 102801EE
  1112. 102801EF
  1113. */
  1114. static unsigned int dell9200_m25_pin_configs[8] = {
  1115. 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
  1116. 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
  1117. };
  1118. /*
  1119. STAC 9200-32 pin configs for
  1120. 102801F5 (Dell Inspiron 1501)
  1121. 102801F6
  1122. */
  1123. static unsigned int dell9200_m26_pin_configs[8] = {
  1124. 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
  1125. 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
  1126. };
  1127. /*
  1128. STAC 9200-32
  1129. 102801CD (Dell Inspiron E1705/9400)
  1130. */
  1131. static unsigned int dell9200_m27_pin_configs[8] = {
  1132. 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
  1133. 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
  1134. };
  1135. static unsigned int oqo9200_pin_configs[8] = {
  1136. 0x40c000f0, 0x404000f1, 0x0221121f, 0x02211210,
  1137. 0x90170111, 0x90a70120, 0x400000f2, 0x400000f3,
  1138. };
  1139. static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
  1140. [STAC_REF] = ref9200_pin_configs,
  1141. [STAC_9200_OQO] = oqo9200_pin_configs,
  1142. [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
  1143. [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
  1144. [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
  1145. [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
  1146. [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
  1147. [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
  1148. [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
  1149. [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
  1150. [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
  1151. [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
  1152. [STAC_9200_M4] = gateway9200_m4_pin_configs,
  1153. [STAC_9200_M4_2] = gateway9200_m4_2_pin_configs,
  1154. [STAC_9200_PANASONIC] = ref9200_pin_configs,
  1155. };
  1156. static const char *stac9200_models[STAC_9200_MODELS] = {
  1157. [STAC_AUTO] = "auto",
  1158. [STAC_REF] = "ref",
  1159. [STAC_9200_OQO] = "oqo",
  1160. [STAC_9200_DELL_D21] = "dell-d21",
  1161. [STAC_9200_DELL_D22] = "dell-d22",
  1162. [STAC_9200_DELL_D23] = "dell-d23",
  1163. [STAC_9200_DELL_M21] = "dell-m21",
  1164. [STAC_9200_DELL_M22] = "dell-m22",
  1165. [STAC_9200_DELL_M23] = "dell-m23",
  1166. [STAC_9200_DELL_M24] = "dell-m24",
  1167. [STAC_9200_DELL_M25] = "dell-m25",
  1168. [STAC_9200_DELL_M26] = "dell-m26",
  1169. [STAC_9200_DELL_M27] = "dell-m27",
  1170. [STAC_9200_M4] = "gateway-m4",
  1171. [STAC_9200_M4_2] = "gateway-m4-2",
  1172. [STAC_9200_PANASONIC] = "panasonic",
  1173. };
  1174. static struct snd_pci_quirk stac9200_cfg_tbl[] = {
  1175. /* SigmaTel reference board */
  1176. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1177. "DFI LanParty", STAC_REF),
  1178. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1179. "DFI LanParty", STAC_REF),
  1180. /* Dell laptops have BIOS problem */
  1181. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
  1182. "unknown Dell", STAC_9200_DELL_D21),
  1183. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
  1184. "Dell Inspiron 630m", STAC_9200_DELL_M21),
  1185. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
  1186. "Dell Inspiron E1505n", STAC_9200_DELL_M25),
  1187. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
  1188. "unknown Dell", STAC_9200_DELL_D22),
  1189. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
  1190. "unknown Dell", STAC_9200_DELL_D22),
  1191. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
  1192. "Dell Latitude D620", STAC_9200_DELL_M22),
  1193. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
  1194. "unknown Dell", STAC_9200_DELL_D23),
  1195. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
  1196. "unknown Dell", STAC_9200_DELL_D23),
  1197. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
  1198. "unknown Dell", STAC_9200_DELL_M22),
  1199. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
  1200. "unknown Dell", STAC_9200_DELL_M24),
  1201. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
  1202. "unknown Dell", STAC_9200_DELL_M24),
  1203. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
  1204. "Dell Latitude 120L", STAC_9200_DELL_M24),
  1205. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
  1206. "Dell Latitude D820", STAC_9200_DELL_M22),
  1207. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
  1208. "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
  1209. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
  1210. "Dell XPS M1710", STAC_9200_DELL_M23),
  1211. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
  1212. "Dell Precision M90", STAC_9200_DELL_M23),
  1213. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
  1214. "unknown Dell", STAC_9200_DELL_M22),
  1215. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
  1216. "unknown Dell", STAC_9200_DELL_M22),
  1217. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
  1218. "unknown Dell", STAC_9200_DELL_M22),
  1219. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
  1220. "Dell Inspiron 640m", STAC_9200_DELL_M21),
  1221. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
  1222. "unknown Dell", STAC_9200_DELL_D23),
  1223. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
  1224. "unknown Dell", STAC_9200_DELL_D23),
  1225. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
  1226. "unknown Dell", STAC_9200_DELL_D21),
  1227. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
  1228. "unknown Dell", STAC_9200_DELL_D23),
  1229. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
  1230. "unknown Dell", STAC_9200_DELL_D21),
  1231. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
  1232. "unknown Dell", STAC_9200_DELL_M25),
  1233. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
  1234. "unknown Dell", STAC_9200_DELL_M25),
  1235. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
  1236. "Dell Inspiron 1501", STAC_9200_DELL_M26),
  1237. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
  1238. "unknown Dell", STAC_9200_DELL_M26),
  1239. /* Panasonic */
  1240. SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
  1241. /* Gateway machines needs EAPD to be set on resume */
  1242. SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
  1243. SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
  1244. SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
  1245. /* OQO Mobile */
  1246. SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
  1247. {} /* terminator */
  1248. };
  1249. static unsigned int ref925x_pin_configs[8] = {
  1250. 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
  1251. 0x90a70320, 0x02214210, 0x01019020, 0x9033032e,
  1252. };
  1253. static unsigned int stac925xM1_pin_configs[8] = {
  1254. 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
  1255. 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
  1256. };
  1257. static unsigned int stac925xM1_2_pin_configs[8] = {
  1258. 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
  1259. 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
  1260. };
  1261. static unsigned int stac925xM2_pin_configs[8] = {
  1262. 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
  1263. 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
  1264. };
  1265. static unsigned int stac925xM2_2_pin_configs[8] = {
  1266. 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
  1267. 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
  1268. };
  1269. static unsigned int stac925xM3_pin_configs[8] = {
  1270. 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
  1271. 0x40a000f0, 0x90100210, 0x400003f1, 0x503303f3,
  1272. };
  1273. static unsigned int stac925xM5_pin_configs[8] = {
  1274. 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
  1275. 0x40a000f0, 0x90100210, 0x400003f1, 0x9033032e,
  1276. };
  1277. static unsigned int stac925xM6_pin_configs[8] = {
  1278. 0x40c003f4, 0x424503f2, 0x400000f3, 0x02a19020,
  1279. 0x40a000f0, 0x90100210, 0x400003f1, 0x90330320,
  1280. };
  1281. static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
  1282. [STAC_REF] = ref925x_pin_configs,
  1283. [STAC_M1] = stac925xM1_pin_configs,
  1284. [STAC_M1_2] = stac925xM1_2_pin_configs,
  1285. [STAC_M2] = stac925xM2_pin_configs,
  1286. [STAC_M2_2] = stac925xM2_2_pin_configs,
  1287. [STAC_M3] = stac925xM3_pin_configs,
  1288. [STAC_M5] = stac925xM5_pin_configs,
  1289. [STAC_M6] = stac925xM6_pin_configs,
  1290. };
  1291. static const char *stac925x_models[STAC_925x_MODELS] = {
  1292. [STAC_925x_AUTO] = "auto",
  1293. [STAC_REF] = "ref",
  1294. [STAC_M1] = "m1",
  1295. [STAC_M1_2] = "m1-2",
  1296. [STAC_M2] = "m2",
  1297. [STAC_M2_2] = "m2-2",
  1298. [STAC_M3] = "m3",
  1299. [STAC_M5] = "m5",
  1300. [STAC_M6] = "m6",
  1301. };
  1302. static struct snd_pci_quirk stac925x_codec_id_cfg_tbl[] = {
  1303. SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
  1304. SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
  1305. SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
  1306. SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
  1307. SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
  1308. /* Not sure about the brand name for those */
  1309. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
  1310. SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
  1311. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
  1312. SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
  1313. {} /* terminator */
  1314. };
  1315. static struct snd_pci_quirk stac925x_cfg_tbl[] = {
  1316. /* SigmaTel reference board */
  1317. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
  1318. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
  1319. SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
  1320. /* Default table for unknown ID */
  1321. SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
  1322. {} /* terminator */
  1323. };
  1324. static unsigned int ref92hd73xx_pin_configs[13] = {
  1325. 0x02214030, 0x02a19040, 0x01a19020, 0x02214030,
  1326. 0x0181302e, 0x01014010, 0x01014020, 0x01014030,
  1327. 0x02319040, 0x90a000f0, 0x90a000f0, 0x01452050,
  1328. 0x01452050,
  1329. };
  1330. static unsigned int dell_m6_pin_configs[13] = {
  1331. 0x0321101f, 0x4f00000f, 0x4f0000f0, 0x90170110,
  1332. 0x03a11020, 0x0321101f, 0x4f0000f0, 0x4f0000f0,
  1333. 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
  1334. 0x4f0000f0,
  1335. };
  1336. static unsigned int alienware_m17x_pin_configs[13] = {
  1337. 0x0321101f, 0x0321101f, 0x03a11020, 0x03014020,
  1338. 0x90170110, 0x4f0000f0, 0x4f0000f0, 0x4f0000f0,
  1339. 0x4f0000f0, 0x90a60160, 0x4f0000f0, 0x4f0000f0,
  1340. 0x904601b0,
  1341. };
  1342. static unsigned int intel_dg45id_pin_configs[13] = {
  1343. 0x02214230, 0x02A19240, 0x01013214, 0x01014210,
  1344. 0x01A19250, 0x01011212, 0x01016211
  1345. };
  1346. static unsigned int *stac92hd73xx_brd_tbl[STAC_92HD73XX_MODELS] = {
  1347. [STAC_92HD73XX_REF] = ref92hd73xx_pin_configs,
  1348. [STAC_DELL_M6_AMIC] = dell_m6_pin_configs,
  1349. [STAC_DELL_M6_DMIC] = dell_m6_pin_configs,
  1350. [STAC_DELL_M6_BOTH] = dell_m6_pin_configs,
  1351. [STAC_DELL_EQ] = dell_m6_pin_configs,
  1352. [STAC_ALIENWARE_M17X] = alienware_m17x_pin_configs,
  1353. [STAC_92HD73XX_INTEL] = intel_dg45id_pin_configs,
  1354. };
  1355. static const char *stac92hd73xx_models[STAC_92HD73XX_MODELS] = {
  1356. [STAC_92HD73XX_AUTO] = "auto",
  1357. [STAC_92HD73XX_NO_JD] = "no-jd",
  1358. [STAC_92HD73XX_REF] = "ref",
  1359. [STAC_92HD73XX_INTEL] = "intel",
  1360. [STAC_DELL_M6_AMIC] = "dell-m6-amic",
  1361. [STAC_DELL_M6_DMIC] = "dell-m6-dmic",
  1362. [STAC_DELL_M6_BOTH] = "dell-m6",
  1363. [STAC_DELL_EQ] = "dell-eq",
  1364. [STAC_ALIENWARE_M17X] = "alienware",
  1365. };
  1366. static struct snd_pci_quirk stac92hd73xx_cfg_tbl[] = {
  1367. /* SigmaTel reference board */
  1368. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1369. "DFI LanParty", STAC_92HD73XX_REF),
  1370. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1371. "DFI LanParty", STAC_92HD73XX_REF),
  1372. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
  1373. "Intel DG45ID", STAC_92HD73XX_INTEL),
  1374. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
  1375. "Intel DG45FC", STAC_92HD73XX_INTEL),
  1376. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
  1377. "Dell Studio 1535", STAC_DELL_M6_DMIC),
  1378. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
  1379. "unknown Dell", STAC_DELL_M6_DMIC),
  1380. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
  1381. "unknown Dell", STAC_DELL_M6_BOTH),
  1382. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
  1383. "unknown Dell", STAC_DELL_M6_BOTH),
  1384. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
  1385. "unknown Dell", STAC_DELL_M6_AMIC),
  1386. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
  1387. "unknown Dell", STAC_DELL_M6_AMIC),
  1388. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
  1389. "unknown Dell", STAC_DELL_M6_DMIC),
  1390. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
  1391. "unknown Dell", STAC_DELL_M6_DMIC),
  1392. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
  1393. "Dell Studio 1537", STAC_DELL_M6_DMIC),
  1394. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
  1395. "Dell Studio 17", STAC_DELL_M6_DMIC),
  1396. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
  1397. "Dell Studio 1555", STAC_DELL_M6_DMIC),
  1398. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
  1399. "Dell Studio 1557", STAC_DELL_M6_DMIC),
  1400. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
  1401. "Dell Studio XPS 1645", STAC_DELL_M6_BOTH),
  1402. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
  1403. "Dell Studio 1558", STAC_DELL_M6_DMIC),
  1404. {} /* terminator */
  1405. };
  1406. static struct snd_pci_quirk stac92hd73xx_codec_id_cfg_tbl[] = {
  1407. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
  1408. "Alienware M17x", STAC_ALIENWARE_M17X),
  1409. {} /* terminator */
  1410. };
  1411. static unsigned int ref92hd83xxx_pin_configs[10] = {
  1412. 0x02214030, 0x02211010, 0x02a19020, 0x02170130,
  1413. 0x01014050, 0x01819040, 0x01014020, 0x90a3014e,
  1414. 0x01451160, 0x98560170,
  1415. };
  1416. static unsigned int dell_s14_pin_configs[10] = {
  1417. 0x0221403f, 0x0221101f, 0x02a19020, 0x90170110,
  1418. 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a60160,
  1419. 0x40f000f0, 0x40f000f0,
  1420. };
  1421. static unsigned int *stac92hd83xxx_brd_tbl[STAC_92HD83XXX_MODELS] = {
  1422. [STAC_92HD83XXX_REF] = ref92hd83xxx_pin_configs,
  1423. [STAC_92HD83XXX_PWR_REF] = ref92hd83xxx_pin_configs,
  1424. [STAC_DELL_S14] = dell_s14_pin_configs,
  1425. };
  1426. static const char *stac92hd83xxx_models[STAC_92HD83XXX_MODELS] = {
  1427. [STAC_92HD83XXX_AUTO] = "auto",
  1428. [STAC_92HD83XXX_REF] = "ref",
  1429. [STAC_92HD83XXX_PWR_REF] = "mic-ref",
  1430. [STAC_DELL_S14] = "dell-s14",
  1431. [STAC_92HD83XXX_HP] = "hp",
  1432. };
  1433. static struct snd_pci_quirk stac92hd83xxx_cfg_tbl[] = {
  1434. /* SigmaTel reference board */
  1435. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1436. "DFI LanParty", STAC_92HD83XXX_REF),
  1437. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1438. "DFI LanParty", STAC_92HD83XXX_REF),
  1439. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
  1440. "unknown Dell", STAC_DELL_S14),
  1441. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x3600,
  1442. "HP", STAC_92HD83XXX_HP),
  1443. {} /* terminator */
  1444. };
  1445. static unsigned int ref92hd71bxx_pin_configs[STAC92HD71BXX_NUM_PINS] = {
  1446. 0x02214030, 0x02a19040, 0x01a19020, 0x01014010,
  1447. 0x0181302e, 0x01014010, 0x01019020, 0x90a000f0,
  1448. 0x90a000f0, 0x01452050, 0x01452050, 0x00000000,
  1449. 0x00000000
  1450. };
  1451. static unsigned int dell_m4_1_pin_configs[STAC92HD71BXX_NUM_PINS] = {
  1452. 0x0421101f, 0x04a11221, 0x40f000f0, 0x90170110,
  1453. 0x23a1902e, 0x23014250, 0x40f000f0, 0x90a000f0,
  1454. 0x40f000f0, 0x4f0000f0, 0x4f0000f0, 0x00000000,
  1455. 0x00000000
  1456. };
  1457. static unsigned int dell_m4_2_pin_configs[STAC92HD71BXX_NUM_PINS] = {
  1458. 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
  1459. 0x23a1902e, 0x23014250, 0x40f000f0, 0x40f000f0,
  1460. 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
  1461. 0x00000000
  1462. };
  1463. static unsigned int dell_m4_3_pin_configs[STAC92HD71BXX_NUM_PINS] = {
  1464. 0x0421101f, 0x04a11221, 0x90a70330, 0x90170110,
  1465. 0x40f000f0, 0x40f000f0, 0x40f000f0, 0x90a000f0,
  1466. 0x40f000f0, 0x044413b0, 0x044413b0, 0x00000000,
  1467. 0x00000000
  1468. };
  1469. static unsigned int *stac92hd71bxx_brd_tbl[STAC_92HD71BXX_MODELS] = {
  1470. [STAC_92HD71BXX_REF] = ref92hd71bxx_pin_configs,
  1471. [STAC_DELL_M4_1] = dell_m4_1_pin_configs,
  1472. [STAC_DELL_M4_2] = dell_m4_2_pin_configs,
  1473. [STAC_DELL_M4_3] = dell_m4_3_pin_configs,
  1474. [STAC_HP_M4] = NULL,
  1475. [STAC_HP_DV4] = NULL,
  1476. [STAC_HP_DV5] = NULL,
  1477. [STAC_HP_HDX] = NULL,
  1478. [STAC_HP_DV4_1222NR] = NULL,
  1479. };
  1480. static const char *stac92hd71bxx_models[STAC_92HD71BXX_MODELS] = {
  1481. [STAC_92HD71BXX_AUTO] = "auto",
  1482. [STAC_92HD71BXX_REF] = "ref",
  1483. [STAC_DELL_M4_1] = "dell-m4-1",
  1484. [STAC_DELL_M4_2] = "dell-m4-2",
  1485. [STAC_DELL_M4_3] = "dell-m4-3",
  1486. [STAC_HP_M4] = "hp-m4",
  1487. [STAC_HP_DV4] = "hp-dv4",
  1488. [STAC_HP_DV5] = "hp-dv5",
  1489. [STAC_HP_HDX] = "hp-hdx",
  1490. [STAC_HP_DV4_1222NR] = "hp-dv4-1222nr",
  1491. };
  1492. static struct snd_pci_quirk stac92hd71bxx_cfg_tbl[] = {
  1493. /* SigmaTel reference board */
  1494. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1495. "DFI LanParty", STAC_92HD71BXX_REF),
  1496. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1497. "DFI LanParty", STAC_92HD71BXX_REF),
  1498. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x30fb,
  1499. "HP dv4-1222nr", STAC_HP_DV4_1222NR),
  1500. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
  1501. "HP", STAC_HP_DV5),
  1502. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
  1503. "HP", STAC_HP_DV5),
  1504. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
  1505. "HP dv4-7", STAC_HP_DV4),
  1506. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
  1507. "HP dv4-7", STAC_HP_DV5),
  1508. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
  1509. "HP HDX", STAC_HP_HDX), /* HDX18 */
  1510. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
  1511. "HP mini 1000", STAC_HP_M4),
  1512. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
  1513. "HP HDX", STAC_HP_HDX), /* HDX16 */
  1514. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
  1515. "HP dv6", STAC_HP_DV5),
  1516. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
  1517. "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
  1518. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
  1519. "HP", STAC_HP_DV5),
  1520. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
  1521. "unknown Dell", STAC_DELL_M4_1),
  1522. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
  1523. "unknown Dell", STAC_DELL_M4_1),
  1524. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
  1525. "unknown Dell", STAC_DELL_M4_1),
  1526. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
  1527. "unknown Dell", STAC_DELL_M4_1),
  1528. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
  1529. "unknown Dell", STAC_DELL_M4_1),
  1530. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
  1531. "unknown Dell", STAC_DELL_M4_1),
  1532. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
  1533. "unknown Dell", STAC_DELL_M4_1),
  1534. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
  1535. "unknown Dell", STAC_DELL_M4_2),
  1536. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
  1537. "unknown Dell", STAC_DELL_M4_2),
  1538. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
  1539. "unknown Dell", STAC_DELL_M4_2),
  1540. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
  1541. "unknown Dell", STAC_DELL_M4_2),
  1542. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
  1543. "unknown Dell", STAC_DELL_M4_3),
  1544. {} /* terminator */
  1545. };
  1546. static unsigned int ref922x_pin_configs[10] = {
  1547. 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
  1548. 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
  1549. 0x40000100, 0x40000100,
  1550. };
  1551. /*
  1552. STAC 922X pin configs for
  1553. 102801A7
  1554. 102801AB
  1555. 102801A9
  1556. 102801D1
  1557. 102801D2
  1558. */
  1559. static unsigned int dell_922x_d81_pin_configs[10] = {
  1560. 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
  1561. 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
  1562. 0x01813122, 0x400001f2,
  1563. };
  1564. /*
  1565. STAC 922X pin configs for
  1566. 102801AC
  1567. 102801D0
  1568. */
  1569. static unsigned int dell_922x_d82_pin_configs[10] = {
  1570. 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
  1571. 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
  1572. 0x01813122, 0x400001f1,
  1573. };
  1574. /*
  1575. STAC 922X pin configs for
  1576. 102801BF
  1577. */
  1578. static unsigned int dell_922x_m81_pin_configs[10] = {
  1579. 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
  1580. 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
  1581. 0x40C003f1, 0x405003f0,
  1582. };
  1583. /*
  1584. STAC 9221 A1 pin configs for
  1585. 102801D7 (Dell XPS M1210)
  1586. */
  1587. static unsigned int dell_922x_m82_pin_configs[10] = {
  1588. 0x02211211, 0x408103ff, 0x02a1123e, 0x90100310,
  1589. 0x408003f1, 0x0221121f, 0x03451340, 0x40c003f2,
  1590. 0x508003f3, 0x405003f4,
  1591. };
  1592. static unsigned int d945gtp3_pin_configs[10] = {
  1593. 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
  1594. 0x40000100, 0x40000100, 0x40000100, 0x40000100,
  1595. 0x02a19120, 0x40000100,

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