/kernel/2.6.32_froyo_photon_nightly/arch/arm/plat-s3c24xx/gpio.c

http://photon-android.googlecode.com/ · C · 202 lines · 134 code · 46 blank · 22 comment · 15 complexity · 63ff4f45d941c00d80bfb7efb3a67a71 MD5 · raw file

  1. /* linux/arch/arm/plat-s3c24xx/gpio.c
  2. *
  3. * Copyright (c) 2004-2005 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C24XX GPIO support
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/init.h>
  24. #include <linux/module.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/ioport.h>
  27. #include <linux/io.h>
  28. #include <mach/hardware.h>
  29. #include <mach/gpio-fns.h>
  30. #include <asm/irq.h>
  31. #include <mach/regs-gpio.h>
  32. void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
  33. {
  34. void __iomem *base = S3C24XX_GPIO_BASE(pin);
  35. unsigned long mask;
  36. unsigned long con;
  37. unsigned long flags;
  38. if (pin < S3C2410_GPIO_BANKB) {
  39. mask = 1 << S3C2410_GPIO_OFFSET(pin);
  40. } else {
  41. mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
  42. }
  43. switch (function) {
  44. case S3C2410_GPIO_LEAVE:
  45. mask = 0;
  46. function = 0;
  47. break;
  48. case S3C2410_GPIO_INPUT:
  49. case S3C2410_GPIO_OUTPUT:
  50. case S3C2410_GPIO_SFN2:
  51. case S3C2410_GPIO_SFN3:
  52. if (pin < S3C2410_GPIO_BANKB) {
  53. function -= 1;
  54. function &= 1;
  55. function <<= S3C2410_GPIO_OFFSET(pin);
  56. } else {
  57. function &= 3;
  58. function <<= S3C2410_GPIO_OFFSET(pin)*2;
  59. }
  60. }
  61. /* modify the specified register wwith IRQs off */
  62. local_irq_save(flags);
  63. con = __raw_readl(base + 0x00);
  64. con &= ~mask;
  65. con |= function;
  66. __raw_writel(con, base + 0x00);
  67. local_irq_restore(flags);
  68. }
  69. EXPORT_SYMBOL(s3c2410_gpio_cfgpin);
  70. unsigned int s3c2410_gpio_getcfg(unsigned int pin)
  71. {
  72. void __iomem *base = S3C24XX_GPIO_BASE(pin);
  73. unsigned long val = __raw_readl(base);
  74. if (pin < S3C2410_GPIO_BANKB) {
  75. val >>= S3C2410_GPIO_OFFSET(pin);
  76. val &= 1;
  77. val += 1;
  78. } else {
  79. val >>= S3C2410_GPIO_OFFSET(pin)*2;
  80. val &= 3;
  81. }
  82. return val | S3C2410_GPIO_INPUT;
  83. }
  84. EXPORT_SYMBOL(s3c2410_gpio_getcfg);
  85. void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
  86. {
  87. void __iomem *base = S3C24XX_GPIO_BASE(pin);
  88. unsigned long offs = S3C2410_GPIO_OFFSET(pin);
  89. unsigned long flags;
  90. unsigned long up;
  91. if (pin < S3C2410_GPIO_BANKB)
  92. return;
  93. local_irq_save(flags);
  94. up = __raw_readl(base + 0x08);
  95. up &= ~(1L << offs);
  96. up |= to << offs;
  97. __raw_writel(up, base + 0x08);
  98. local_irq_restore(flags);
  99. }
  100. EXPORT_SYMBOL(s3c2410_gpio_pullup);
  101. int s3c2410_gpio_getpull(unsigned int pin)
  102. {
  103. void __iomem *base = S3C24XX_GPIO_BASE(pin);
  104. unsigned long offs = S3C2410_GPIO_OFFSET(pin);
  105. if (pin < S3C2410_GPIO_BANKB)
  106. return -EINVAL;
  107. return (__raw_readl(base + 0x08) & (1L << offs)) ? 1 : 0;
  108. }
  109. EXPORT_SYMBOL(s3c2410_gpio_getpull);
  110. void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
  111. {
  112. void __iomem *base = S3C24XX_GPIO_BASE(pin);
  113. unsigned long offs = S3C2410_GPIO_OFFSET(pin);
  114. unsigned long flags;
  115. unsigned long dat;
  116. local_irq_save(flags);
  117. dat = __raw_readl(base + 0x04);
  118. dat &= ~(1 << offs);
  119. dat |= to << offs;
  120. __raw_writel(dat, base + 0x04);
  121. local_irq_restore(flags);
  122. }
  123. EXPORT_SYMBOL(s3c2410_gpio_setpin);
  124. unsigned int s3c2410_gpio_getpin(unsigned int pin)
  125. {
  126. void __iomem *base = S3C24XX_GPIO_BASE(pin);
  127. unsigned long offs = S3C2410_GPIO_OFFSET(pin);
  128. return __raw_readl(base + 0x04) & (1<< offs);
  129. }
  130. EXPORT_SYMBOL(s3c2410_gpio_getpin);
  131. unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change)
  132. {
  133. unsigned long flags;
  134. unsigned long misccr;
  135. local_irq_save(flags);
  136. misccr = __raw_readl(S3C24XX_MISCCR);
  137. misccr &= ~clear;
  138. misccr ^= change;
  139. __raw_writel(misccr, S3C24XX_MISCCR);
  140. local_irq_restore(flags);
  141. return misccr;
  142. }
  143. EXPORT_SYMBOL(s3c2410_modify_misccr);
  144. int s3c2410_gpio_getirq(unsigned int pin)
  145. {
  146. if (pin < S3C2410_GPF(0) || pin > S3C2410_GPG(15))
  147. return -EINVAL; /* not valid interrupts */
  148. if (pin < S3C2410_GPG(0) && pin > S3C2410_GPF(7))
  149. return -EINVAL; /* not valid pin */
  150. if (pin < S3C2410_GPF(4))
  151. return (pin - S3C2410_GPF(0)) + IRQ_EINT0;
  152. if (pin < S3C2410_GPG(0))
  153. return (pin - S3C2410_GPF(4)) + IRQ_EINT4;
  154. return (pin - S3C2410_GPG(0)) + IRQ_EINT8;
  155. }
  156. EXPORT_SYMBOL(s3c2410_gpio_getirq);