/kernel/2.6.32_froyo_photon_nightly/drivers/staging/comedi/drivers/addi-data/hwdrv_APCI1710.c

http://photon-android.googlecode.com/ · C · 1266 lines · 784 code · 207 blank · 275 comment · 69 complexity · f8d4d37666f5165c8ab6fbce859f6de4 MD5 · raw file

  1. //**
  2. @verbatim
  3. Copyright (C) 2004,2005 ADDI-DATA GmbH for the source code of this module.
  4. ADDI-DATA GmbH
  5. Dieselstrasse 3
  6. D-77833 Ottersweier
  7. Tel: +19(0)7223/9493-0
  8. Fax: +49(0)7223/9493-92
  9. http://www.addi-data-com
  10. info@addi-data.com
  11. This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.
  12. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  14. You shoud also find the complete GPL in the COPYING file accompanying this source code.
  15. @endverbatim
  16. */
  17. /*
  18. +-----------------------------------------------------------------------+
  19. | (C) ADDI-DATA GmbH Dieselstra?&#x;e 3 D-77833 Ottersweier |
  20. +-----------------------------------------------------------------------+
  21. | Tel : +49 (0) 7223/9493-0 | email : info@addi-data.com |
  22. | Fax : +49 (0) 7223/9493-92 | Internet : http://www.addi-data.com |
  23. +-------------------------------+---------------------------------------+
  24. | Project : APCI-1710 | Compiler : GCC |
  25. | Module name : hwdrv_apci1710.c| Version : 2.96 |
  26. +-------------------------------+---------------------------------------+
  27. | Project manager: Eric Stolz | Date : 02/12/2002 |
  28. +-------------------------------+---------------------------------------+
  29. | Description : Hardware Layer Acces For APCI-1710 |
  30. +-----------------------------------------------------------------------+
  31. | UPDATES |
  32. +----------+-----------+------------------------------------------------+
  33. | Date | Author | Description of updates |
  34. +----------+-----------+------------------------------------------------+
  35. | | | |
  36. | | | |
  37. | | | |
  38. +----------+-----------+------------------------------------------------+
  39. */
  40. #include "hwdrv_APCI1710.h"
  41. #include "APCI1710_Inp_cpt.c"
  42. #include "APCI1710_Ssi.c"
  43. #include "APCI1710_Tor.c"
  44. #include "APCI1710_Ttl.c"
  45. #include "APCI1710_Dig_io.c"
  46. #include "APCI1710_82x54.c"
  47. #include "APCI1710_Chrono.c"
  48. #include "APCI1710_Pwm.c"
  49. #include "APCI1710_INCCPT.c"
  50. void i_ADDI_AttachPCI1710(struct comedi_device *dev)
  51. {
  52. struct comedi_subdevice *s;
  53. int ret = 0;
  54. int n_subdevices = 9;
  55. /* Update-0.7.57->0.7.68dev->n_subdevices = 9; */
  56. ret = alloc_subdevices(dev, n_subdevices);
  57. if (ret < 0)
  58. return;
  59. /* Allocate and Initialise Timer Subdevice Structures */
  60. s = dev->subdevices + 0;
  61. s->type = COMEDI_SUBD_TIMER;
  62. s->subdev_flags = SDF_WRITEABLE | SDF_GROUND | SDF_COMMON;
  63. s->n_chan = 3;
  64. s->maxdata = 0;
  65. s->len_chanlist = 3;
  66. s->range_table = &range_digital;
  67. s->insn_write = i_APCI1710_InsnWriteEnableDisableTimer;
  68. s->insn_read = i_APCI1710_InsnReadAllTimerValue;
  69. s->insn_config = i_APCI1710_InsnConfigInitTimer;
  70. s->insn_bits = i_APCI1710_InsnBitsTimer;
  71. /* Allocate and Initialise DIO Subdevice Structures */
  72. s = dev->subdevices + 1;
  73. s->type = COMEDI_SUBD_DIO;
  74. s->subdev_flags =
  75. SDF_WRITEABLE | SDF_READABLE | SDF_GROUND | SDF_COMMON;
  76. s->n_chan = 7;
  77. s->maxdata = 1;
  78. s->len_chanlist = 7;
  79. s->range_table = &range_digital;
  80. s->insn_config = i_APCI1710_InsnConfigDigitalIO;
  81. s->insn_read = i_APCI1710_InsnReadDigitalIOChlValue;
  82. s->insn_bits = i_APCI1710_InsnBitsDigitalIOPortOnOff;
  83. s->insn_write = i_APCI1710_InsnWriteDigitalIOChlOnOff;
  84. /* Allocate and Initialise Chrono Subdevice Structures */
  85. s = dev->subdevices + 2;
  86. s->type = COMEDI_SUBD_CHRONO;
  87. s->subdev_flags = SDF_WRITEABLE | SDF_GROUND | SDF_COMMON;
  88. s->n_chan = 4;
  89. s->maxdata = 0;
  90. s->len_chanlist = 4;
  91. s->range_table = &range_digital;
  92. s->insn_write = i_APCI1710_InsnWriteEnableDisableChrono;
  93. s->insn_read = i_APCI1710_InsnReadChrono;
  94. s->insn_config = i_APCI1710_InsnConfigInitChrono;
  95. s->insn_bits = i_APCI1710_InsnBitsChronoDigitalIO;
  96. /* Allocate and Initialise PWM Subdevice Structures */
  97. s = dev->subdevices + 3;
  98. s->type = COMEDI_SUBD_PWM;
  99. s->subdev_flags =
  100. SDF_WRITEABLE | SDF_READABLE | SDF_GROUND | SDF_COMMON;
  101. s->n_chan = 3;
  102. s->maxdata = 1;
  103. s->len_chanlist = 3;
  104. s->range_table = &range_digital;
  105. s->io_bits = 0; /* all bits input */
  106. s->insn_config = i_APCI1710_InsnConfigPWM;
  107. s->insn_read = i_APCI1710_InsnReadGetPWMStatus;
  108. s->insn_write = i_APCI1710_InsnWritePWM;
  109. s->insn_bits = i_APCI1710_InsnBitsReadPWMInterrupt;
  110. /* Allocate and Initialise TTLIO Subdevice Structures */
  111. s = dev->subdevices + 4;
  112. s->type = COMEDI_SUBD_TTLIO;
  113. s->subdev_flags =
  114. SDF_WRITEABLE | SDF_READABLE | SDF_GROUND | SDF_COMMON;
  115. s->n_chan = 8;
  116. s->maxdata = 1;
  117. s->len_chanlist = 8;
  118. s->range_table = &range_apci1710_ttl; /* to pass arguments in range */
  119. s->insn_config = i_APCI1710_InsnConfigInitTTLIO;
  120. s->insn_bits = i_APCI1710_InsnBitsReadTTLIO;
  121. s->insn_write = i_APCI1710_InsnWriteSetTTLIOChlOnOff;
  122. s->insn_read = i_APCI1710_InsnReadTTLIOAllPortValue;
  123. /* Allocate and Initialise TOR Subdevice Structures */
  124. s = dev->subdevices + 5;
  125. s->type = COMEDI_SUBD_TOR;
  126. s->subdev_flags =
  127. SDF_WRITEABLE | SDF_READABLE | SDF_GROUND | SDF_COMMON;
  128. s->n_chan = 8;
  129. s->maxdata = 1;
  130. s->len_chanlist = 8;
  131. s->range_table = &range_digital;
  132. s->io_bits = 0; /* all bits input */
  133. s->insn_config = i_APCI1710_InsnConfigInitTorCounter;
  134. s->insn_read = i_APCI1710_InsnReadGetTorCounterInitialisation;
  135. s->insn_write = i_APCI1710_InsnWriteEnableDisableTorCounter;
  136. s->insn_bits = i_APCI1710_InsnBitsGetTorCounterProgressStatusAndValue;
  137. /* Allocate and Initialise SSI Subdevice Structures */
  138. s = dev->subdevices + 6;
  139. s->type = COMEDI_SUBD_SSI;
  140. s->subdev_flags =
  141. SDF_WRITEABLE | SDF_READABLE | SDF_GROUND | SDF_COMMON;
  142. s->n_chan = 4;
  143. s->maxdata = 1;
  144. s->len_chanlist = 4;
  145. s->range_table = &range_apci1710_ssi;
  146. s->insn_config = i_APCI1710_InsnConfigInitSSI;
  147. s->insn_read = i_APCI1710_InsnReadSSIValue;
  148. s->insn_bits = i_APCI1710_InsnBitsSSIDigitalIO;
  149. /* Allocate and Initialise PULSEENCODER Subdevice Structures */
  150. s = dev->subdevices + 7;
  151. s->type = COMEDI_SUBD_PULSEENCODER;
  152. s->subdev_flags =
  153. SDF_WRITEABLE | SDF_READABLE | SDF_GROUND | SDF_COMMON;
  154. s->n_chan = 4;
  155. s->maxdata = 1;
  156. s->len_chanlist = 4;
  157. s->range_table = &range_digital;
  158. s->insn_config = i_APCI1710_InsnConfigInitPulseEncoder;
  159. s->insn_write = i_APCI1710_InsnWriteEnableDisablePulseEncoder;
  160. s->insn_bits = i_APCI1710_InsnBitsReadWritePulseEncoder;
  161. s->insn_read = i_APCI1710_InsnReadInterruptPulseEncoder;
  162. /* Allocate and Initialise INCREMENTALCOUNTER Subdevice Structures */
  163. s = dev->subdevices + 8;
  164. s->type = COMEDI_SUBD_INCREMENTALCOUNTER;
  165. s->subdev_flags =
  166. SDF_WRITEABLE | SDF_READABLE | SDF_GROUND | SDF_COMMON;
  167. s->n_chan = 500;
  168. s->maxdata = 1;
  169. s->len_chanlist = 500;
  170. s->range_table = &range_apci1710_inccpt;
  171. s->insn_config = i_APCI1710_InsnConfigINCCPT;
  172. s->insn_write = i_APCI1710_InsnWriteINCCPT;
  173. s->insn_read = i_APCI1710_InsnReadINCCPT;
  174. s->insn_bits = i_APCI1710_InsnBitsINCCPT;
  175. }
  176. int i_APCI1710_Reset(struct comedi_device *dev);
  177. void v_APCI1710_Interrupt(int irq, void *d);
  178. /* for 1710 */
  179. int i_APCI1710_Reset(struct comedi_device *dev)
  180. {
  181. int ret;
  182. unsigned int dw_Dummy;
  183. /*********************************/
  184. /* Read all module configuration */
  185. /*********************************/
  186. ret = inl(devpriv->s_BoardInfos.ui_Address + 60);
  187. devpriv->s_BoardInfos.dw_MolduleConfiguration[0] = ret;
  188. ret = inl(devpriv->s_BoardInfos.ui_Address + 124);
  189. devpriv->s_BoardInfos.dw_MolduleConfiguration[1] = ret;
  190. ret = inl(devpriv->s_BoardInfos.ui_Address + 188);
  191. devpriv->s_BoardInfos.dw_MolduleConfiguration[2] = ret;
  192. ret = inl(devpriv->s_BoardInfos.ui_Address + 252);
  193. devpriv->s_BoardInfos.dw_MolduleConfiguration[3] = ret;
  194. /* outl(0x80808082,devpriv->s_BoardInfos.ui_Address+0x60); */
  195. outl(0x83838383, devpriv->s_BoardInfos.ui_Address + 0x60);
  196. devpriv->s_BoardInfos.b_BoardVersion = 1;
  197. /* Enable the interrupt for the controler */
  198. dw_Dummy = inl(devpriv->s_BoardInfos.ui_Address + 0x38);
  199. outl(dw_Dummy | 0x2000, devpriv->s_BoardInfos.ui_Address + 0x38);
  200. return 0;
  201. }
  202. /*
  203. +----------------------------------------------------------------------------+
  204. | Function's Name : __void__ v_APCI1710_InterruptFunction |
  205. | (unsigned char b_Interrupt, __CPPARGS) |
  206. +----------------------------------------------------------------------------+
  207. | Task : APCI-1710 interrupt function |
  208. +----------------------------------------------------------------------------+
  209. | Input Parameters : unsigned char b_Interrupt : Interrupt number |
  210. +----------------------------------------------------------------------------+
  211. | Output Parameters : - |
  212. +----------------------------------------------------------------------------+
  213. | Return Value : 0 : OK |
  214. | -1 : Error |
  215. +----------------------------------------------------------------------------+
  216. */
  217. void v_APCI1710_Interrupt(int irq, void *d)
  218. {
  219. struct comedi_device *dev = d;
  220. unsigned char b_ModuleCpt = 0;
  221. unsigned char b_InterruptFlag = 0;
  222. unsigned char b_PWMCpt = 0;
  223. unsigned char b_TorCounterCpt = 0;
  224. unsigned char b_PulseIncoderCpt = 0;
  225. unsigned int ui_16BitValue;
  226. unsigned int ul_InterruptLatchReg = 0;
  227. unsigned int ul_LatchRegisterValue = 0;
  228. unsigned int ul_82X54InterruptStatus;
  229. unsigned int ul_StatusRegister;
  230. union str_ModuleInfo *ps_ModuleInfo;
  231. printk("APCI1710 Interrupt\n");
  232. for (b_ModuleCpt = 0; b_ModuleCpt < 4; b_ModuleCpt++, ps_ModuleInfo++) {
  233. /**************************/
  234. /* 1199/0225 to 0100/0226 */
  235. /**************************/
  236. ps_ModuleInfo = &devpriv->s_ModuleInfo[b_ModuleCpt];
  237. /***********************/
  238. /* Test if 82X54 timer */
  239. /***********************/
  240. if ((devpriv->s_BoardInfos.
  241. dw_MolduleConfiguration[b_ModuleCpt] &
  242. 0xFFFF0000UL) == APCI1710_82X54_TIMER) {
  243. /* printk("TIMER Interrupt Occurred\n"); */
  244. ul_82X54InterruptStatus = inl(devpriv->s_BoardInfos.
  245. ui_Address + 12 + (64 * b_ModuleCpt));
  246. /***************************/
  247. /* Test if interrupt occur */
  248. /***************************/
  249. if ((ul_82X54InterruptStatus & ps_ModuleInfo->
  250. s_82X54ModuleInfo.
  251. b_InterruptMask) != 0) {
  252. devpriv->
  253. s_InterruptParameters.
  254. s_FIFOInterruptParameters[devpriv->
  255. s_InterruptParameters.
  256. ui_Write].
  257. ul_OldInterruptMask =
  258. (ul_82X54InterruptStatus &
  259. ps_ModuleInfo->s_82X54ModuleInfo.
  260. b_InterruptMask) << 4;
  261. devpriv->
  262. s_InterruptParameters.
  263. s_FIFOInterruptParameters[devpriv->
  264. s_InterruptParameters.
  265. ui_Write].
  266. b_OldModuleMask = 1 << b_ModuleCpt;
  267. devpriv->
  268. s_InterruptParameters.
  269. s_FIFOInterruptParameters[devpriv->
  270. s_InterruptParameters.
  271. ui_Write].ul_OldCounterLatchValue = 0;
  272. devpriv->
  273. s_InterruptParameters.
  274. ul_InterruptOccur++;
  275. /****************************/
  276. /* Increment the write FIFO */
  277. /****************************/
  278. devpriv->
  279. s_InterruptParameters.
  280. ui_Write = (devpriv->
  281. s_InterruptParameters.
  282. ui_Write + 1) % APCI1710_SAVE_INTERRUPT;
  283. b_InterruptFlag = 1;
  284. /**********************/
  285. /* Call user function */
  286. /**********************/
  287. /* Send a signal to from kernel to user space */
  288. send_sig(SIGIO, devpriv->tsk_Current, 0);
  289. } /* if ((ul_82X54InterruptStatus & 0x7) != 0) */
  290. } /* 82X54 timer */
  291. /***************************/
  292. /* Test if increm. counter */
  293. /***************************/
  294. if ((devpriv->s_BoardInfos.
  295. dw_MolduleConfiguration[b_ModuleCpt] &
  296. 0xFFFF0000UL) == APCI1710_INCREMENTAL_COUNTER) {
  297. ul_InterruptLatchReg = inl(devpriv->s_BoardInfos.
  298. ui_Address + (64 * b_ModuleCpt));
  299. /*********************/
  300. /* Test if interrupt */
  301. /*********************/
  302. if ((ul_InterruptLatchReg & 0x22) && (ps_ModuleInfo->
  303. s_SiemensCounterInfo.
  304. s_ModeRegister.
  305. s_ByteModeRegister.
  306. b_ModeRegister2 & 0x80)) {
  307. /************************************/
  308. /* Test if strobe latch I interrupt */
  309. /************************************/
  310. if (ul_InterruptLatchReg & 2) {
  311. ul_LatchRegisterValue =
  312. inl(devpriv->s_BoardInfos.
  313. ui_Address + 4 +
  314. (64 * b_ModuleCpt));
  315. devpriv->
  316. s_InterruptParameters.
  317. s_FIFOInterruptParameters
  318. [devpriv->s_InterruptParameters.
  319. ui_Write].ul_OldInterruptMask =
  320. 1UL;
  321. devpriv->
  322. s_InterruptParameters.
  323. s_FIFOInterruptParameters
  324. [devpriv->s_InterruptParameters.
  325. ui_Write].b_OldModuleMask =
  326. 1 << b_ModuleCpt;
  327. devpriv->
  328. s_InterruptParameters.
  329. s_FIFOInterruptParameters
  330. [devpriv->s_InterruptParameters.
  331. ui_Write].
  332. ul_OldCounterLatchValue =
  333. ul_LatchRegisterValue;
  334. devpriv->
  335. s_InterruptParameters.
  336. ul_InterruptOccur++;
  337. /****************************/
  338. /* 0899/0224 to 1199/0225 */
  339. /****************************/
  340. /* Increment the write FIFO */
  341. /****************************/
  342. devpriv->
  343. s_InterruptParameters.
  344. ui_Write = (devpriv->
  345. s_InterruptParameters.
  346. ui_Write +
  347. 1) % APCI1710_SAVE_INTERRUPT;
  348. b_InterruptFlag = 1;
  349. /**********************/
  350. /* Call user function */
  351. /**********************/
  352. /* Send a signal to from kernel to user space */
  353. send_sig(SIGIO, devpriv->tsk_Current,
  354. 0);
  355. }
  356. /*************************************/
  357. /* Test if strobe latch II interrupt */
  358. /*************************************/
  359. if (ul_InterruptLatchReg & 0x20) {
  360. ul_LatchRegisterValue =
  361. inl(devpriv->s_BoardInfos.
  362. ui_Address + 8 +
  363. (64 * b_ModuleCpt));
  364. devpriv->
  365. s_InterruptParameters.
  366. s_FIFOInterruptParameters
  367. [devpriv->s_InterruptParameters.
  368. ui_Write].ul_OldInterruptMask =
  369. 2UL;
  370. devpriv->
  371. s_InterruptParameters.
  372. s_FIFOInterruptParameters
  373. [devpriv->s_InterruptParameters.
  374. ui_Write].b_OldModuleMask =
  375. 1 << b_ModuleCpt;
  376. devpriv->
  377. s_InterruptParameters.
  378. s_FIFOInterruptParameters
  379. [devpriv->s_InterruptParameters.
  380. ui_Write].
  381. ul_OldCounterLatchValue =
  382. ul_LatchRegisterValue;
  383. devpriv->
  384. s_InterruptParameters.
  385. ul_InterruptOccur++;
  386. /****************************/
  387. /* 0899/0224 to 1199/0225 */
  388. /****************************/
  389. /* Increment the write FIFO */
  390. /****************************/
  391. devpriv->
  392. s_InterruptParameters.
  393. ui_Write = (devpriv->
  394. s_InterruptParameters.
  395. ui_Write +
  396. 1) % APCI1710_SAVE_INTERRUPT;
  397. b_InterruptFlag = 1;
  398. /**********************/
  399. /* Call user function */
  400. /**********************/
  401. /* Send a signal to from kernel to user space */
  402. send_sig(SIGIO, devpriv->tsk_Current,
  403. 0);
  404. }
  405. }
  406. ul_InterruptLatchReg = inl(devpriv->s_BoardInfos.
  407. ui_Address + 24 + (64 * b_ModuleCpt));
  408. /***************************/
  409. /* Test if index interrupt */
  410. /***************************/
  411. if (ul_InterruptLatchReg & 0x8) {
  412. ps_ModuleInfo->
  413. s_SiemensCounterInfo.
  414. s_InitFlag.b_IndexInterruptOccur = 1;
  415. if (ps_ModuleInfo->
  416. s_SiemensCounterInfo.
  417. s_ModeRegister.
  418. s_ByteModeRegister.
  419. b_ModeRegister2 &
  420. APCI1710_INDEX_AUTO_MODE) {
  421. outl(ps_ModuleInfo->
  422. s_SiemensCounterInfo.
  423. s_ModeRegister.
  424. dw_ModeRegister1_2_3_4,
  425. devpriv->s_BoardInfos.
  426. ui_Address + 20 +
  427. (64 * b_ModuleCpt));
  428. }
  429. /*****************************/
  430. /* Test if interrupt enabled */
  431. /*****************************/
  432. if ((ps_ModuleInfo->
  433. s_SiemensCounterInfo.
  434. s_ModeRegister.
  435. s_ByteModeRegister.
  436. b_ModeRegister3 &
  437. APCI1710_ENABLE_INDEX_INT) ==
  438. APCI1710_ENABLE_INDEX_INT) {
  439. devpriv->s_InterruptParameters.
  440. s_FIFOInterruptParameters
  441. [devpriv->s_InterruptParameters.
  442. ui_Write].ul_OldInterruptMask =
  443. 4UL;
  444. devpriv->
  445. s_InterruptParameters.
  446. s_FIFOInterruptParameters
  447. [devpriv->s_InterruptParameters.
  448. ui_Write].b_OldModuleMask =
  449. 1 << b_ModuleCpt;
  450. devpriv->
  451. s_InterruptParameters.
  452. s_FIFOInterruptParameters
  453. [devpriv->s_InterruptParameters.
  454. ui_Write].
  455. ul_OldCounterLatchValue =
  456. ul_LatchRegisterValue;
  457. devpriv->
  458. s_InterruptParameters.
  459. ul_InterruptOccur++;
  460. /****************************/
  461. /* 0899/0224 to 1199/0225 */
  462. /****************************/
  463. /* Increment the write FIFO */
  464. /****************************/
  465. devpriv->
  466. s_InterruptParameters.
  467. ui_Write = (devpriv->
  468. s_InterruptParameters.
  469. ui_Write +
  470. 1) % APCI1710_SAVE_INTERRUPT;
  471. b_InterruptFlag = 1;
  472. /**********************/
  473. /* Call user function */
  474. /**********************/
  475. /* Send a signal to from kernel to user space */
  476. send_sig(SIGIO, devpriv->tsk_Current,
  477. 0);
  478. }
  479. }
  480. /*****************************/
  481. /* Test if compare interrupt */
  482. /*****************************/
  483. if (ul_InterruptLatchReg & 0x10) {
  484. /*****************************/
  485. /* Test if interrupt enabled */
  486. /*****************************/
  487. if ((ps_ModuleInfo->
  488. s_SiemensCounterInfo.
  489. s_ModeRegister.
  490. s_ByteModeRegister.
  491. b_ModeRegister3 &
  492. APCI1710_ENABLE_COMPARE_INT) ==
  493. APCI1710_ENABLE_COMPARE_INT) {
  494. devpriv->s_InterruptParameters.
  495. s_FIFOInterruptParameters
  496. [devpriv->s_InterruptParameters.
  497. ui_Write].ul_OldInterruptMask =
  498. 8UL;
  499. devpriv->
  500. s_InterruptParameters.
  501. s_FIFOInterruptParameters
  502. [devpriv->s_InterruptParameters.
  503. ui_Write].b_OldModuleMask =
  504. 1 << b_ModuleCpt;
  505. devpriv->
  506. s_InterruptParameters.
  507. s_FIFOInterruptParameters
  508. [devpriv->s_InterruptParameters.
  509. ui_Write].
  510. ul_OldCounterLatchValue =
  511. ul_LatchRegisterValue;
  512. devpriv->
  513. s_InterruptParameters.
  514. ul_InterruptOccur++;
  515. /****************************/
  516. /* 0899/0224 to 1199/0225 */
  517. /****************************/
  518. /* Increment the write FIFO */
  519. /****************************/
  520. devpriv->
  521. s_InterruptParameters.
  522. ui_Write = (devpriv->
  523. s_InterruptParameters.
  524. ui_Write +
  525. 1) % APCI1710_SAVE_INTERRUPT;
  526. b_InterruptFlag = 1;
  527. /**********************/
  528. /* Call user function */
  529. /**********************/
  530. /* Send a signal to from kernel to user space */
  531. send_sig(SIGIO, devpriv->tsk_Current,
  532. 0);
  533. }
  534. }
  535. /*******************************************/
  536. /* Test if frequency measurement interrupt */
  537. /*******************************************/
  538. if (ul_InterruptLatchReg & 0x20) {
  539. /*******************/
  540. /* Read the status */
  541. /*******************/
  542. ul_StatusRegister = inl(devpriv->s_BoardInfos.
  543. ui_Address + 32 + (64 * b_ModuleCpt));
  544. /******************/
  545. /* Read the value */
  546. /******************/
  547. ul_LatchRegisterValue =
  548. inl(devpriv->s_BoardInfos.ui_Address +
  549. 28 + (64 * b_ModuleCpt));
  550. switch ((ul_StatusRegister >> 1) & 3) {
  551. case 0:
  552. /*************************/
  553. /* Test the counter mode */
  554. /*************************/
  555. if ((devpriv->s_ModuleInfo[b_ModuleCpt].
  556. s_SiemensCounterInfo.
  557. s_ModeRegister.
  558. s_ByteModeRegister.
  559. b_ModeRegister1 &
  560. APCI1710_16BIT_COUNTER)
  561. == APCI1710_16BIT_COUNTER) {
  562. /****************************************/
  563. /* Test if 16-bit counter 1 pulse occur */
  564. /****************************************/
  565. if ((ul_LatchRegisterValue &
  566. 0xFFFFU) != 0) {
  567. ui_16BitValue =
  568. (unsigned int)
  569. ul_LatchRegisterValue
  570. & 0xFFFFU;
  571. ul_LatchRegisterValue =
  572. (ul_LatchRegisterValue
  573. & 0xFFFF0000UL)
  574. | (0xFFFFU -
  575. ui_16BitValue);
  576. }
  577. /****************************************/
  578. /* Test if 16-bit counter 2 pulse occur */
  579. /****************************************/
  580. if ((ul_LatchRegisterValue &
  581. 0xFFFF0000UL) !=
  582. 0) {
  583. ui_16BitValue =
  584. (unsigned int) (
  585. (ul_LatchRegisterValue
  586. >> 16) &
  587. 0xFFFFU);
  588. ul_LatchRegisterValue =
  589. (ul_LatchRegisterValue
  590. & 0xFFFFUL) |
  591. ((0xFFFFU -
  592. ui_16BitValue)
  593. << 16);
  594. }
  595. } else {
  596. if (ul_LatchRegisterValue != 0) {
  597. ul_LatchRegisterValue =
  598. 0xFFFFFFFFUL -
  599. ul_LatchRegisterValue;
  600. }
  601. }
  602. break;
  603. case 1:
  604. /****************************************/
  605. /* Test if 16-bit counter 2 pulse occur */
  606. /****************************************/
  607. if ((ul_LatchRegisterValue &
  608. 0xFFFF0000UL) != 0) {
  609. ui_16BitValue =
  610. (unsigned int) (
  611. (ul_LatchRegisterValue
  612. >> 16) &
  613. 0xFFFFU);
  614. ul_LatchRegisterValue =
  615. (ul_LatchRegisterValue &
  616. 0xFFFFUL) | ((0xFFFFU -
  617. ui_16BitValue)
  618. << 16);
  619. }
  620. break;
  621. case 2:
  622. /****************************************/
  623. /* Test if 16-bit counter 1 pulse occur */
  624. /****************************************/
  625. if ((ul_LatchRegisterValue & 0xFFFFU) !=
  626. 0) {
  627. ui_16BitValue =
  628. (unsigned int)
  629. ul_LatchRegisterValue &
  630. 0xFFFFU;
  631. ul_LatchRegisterValue =
  632. (ul_LatchRegisterValue &
  633. 0xFFFF0000UL) | (0xFFFFU
  634. - ui_16BitValue);
  635. }
  636. break;
  637. }
  638. devpriv->
  639. s_InterruptParameters.
  640. s_FIFOInterruptParameters[devpriv->
  641. s_InterruptParameters.
  642. ui_Write].
  643. ul_OldInterruptMask = 0x10000UL;
  644. devpriv->
  645. s_InterruptParameters.
  646. s_FIFOInterruptParameters[devpriv->
  647. s_InterruptParameters.
  648. ui_Write].
  649. b_OldModuleMask = 1 << b_ModuleCpt;
  650. devpriv->
  651. s_InterruptParameters.
  652. s_FIFOInterruptParameters[devpriv->
  653. s_InterruptParameters.
  654. ui_Write].
  655. ul_OldCounterLatchValue =
  656. ul_LatchRegisterValue;
  657. devpriv->
  658. s_InterruptParameters.
  659. ul_InterruptOccur++;
  660. /****************************/
  661. /* 0899/0224 to 1199/0225 */
  662. /****************************/
  663. /* Increment the write FIFO */
  664. /****************************/
  665. devpriv->
  666. s_InterruptParameters.
  667. ui_Write = (devpriv->
  668. s_InterruptParameters.
  669. ui_Write + 1) % APCI1710_SAVE_INTERRUPT;
  670. b_InterruptFlag = 1;
  671. /**********************/
  672. /* Call user function */
  673. /**********************/
  674. /* Send a signal to from kernel to user space */
  675. send_sig(SIGIO, devpriv->tsk_Current, 0);
  676. }
  677. } /* Incremental counter */
  678. /***************/
  679. /* Test if CDA */
  680. /***************/
  681. if ((devpriv->s_BoardInfos.
  682. dw_MolduleConfiguration[b_ModuleCpt] &
  683. 0xFFFF0000UL) == APCI1710_CDA) {
  684. /******************************************/
  685. /* Test if CDA enable and functionality 0 */
  686. /******************************************/
  687. if ((devpriv->s_ModuleInfo[b_ModuleCpt].
  688. s_CDAModuleInfo.
  689. b_CDAEnable == APCI1710_ENABLE)
  690. && (devpriv->s_ModuleInfo[b_ModuleCpt].
  691. s_CDAModuleInfo.b_FctSelection == 0)) {
  692. /****************************/
  693. /* Get the interrupt status */
  694. /****************************/
  695. ul_StatusRegister = inl(devpriv->s_BoardInfos.
  696. ui_Address + 16 + (64 * b_ModuleCpt));
  697. /***************************/
  698. /* Test if interrupt occur */
  699. /***************************/
  700. if (ul_StatusRegister & 1) {
  701. devpriv->
  702. s_InterruptParameters.
  703. s_FIFOInterruptParameters
  704. [devpriv->s_InterruptParameters.
  705. ui_Write].ul_OldInterruptMask =
  706. 0x80000UL;
  707. devpriv->
  708. s_InterruptParameters.
  709. s_FIFOInterruptParameters
  710. [devpriv->s_InterruptParameters.
  711. ui_Write].b_OldModuleMask =
  712. 1 << b_ModuleCpt;
  713. devpriv->
  714. s_InterruptParameters.
  715. s_FIFOInterruptParameters
  716. [devpriv->s_InterruptParameters.
  717. ui_Write].
  718. ul_OldCounterLatchValue = 0;
  719. devpriv->
  720. s_InterruptParameters.
  721. ul_InterruptOccur++;
  722. /****************************/
  723. /* Increment the write FIFO */
  724. /****************************/
  725. devpriv->
  726. s_InterruptParameters.
  727. ui_Write = (devpriv->
  728. s_InterruptParameters.
  729. ui_Write +
  730. 1) % APCI1710_SAVE_INTERRUPT;
  731. b_InterruptFlag = 1;
  732. /**********************/
  733. /* Call user function */
  734. /**********************/
  735. /* Send a signal to from kernel to user space */
  736. send_sig(SIGIO, devpriv->tsk_Current,
  737. 0);
  738. } /* if (ul_StatusRegister & 1) */
  739. }
  740. } /* CDA */
  741. /***********************/
  742. /* Test if PWM counter */
  743. /***********************/
  744. if ((devpriv->s_BoardInfos.
  745. dw_MolduleConfiguration[b_ModuleCpt] &
  746. 0xFFFF0000UL) == APCI1710_PWM) {
  747. for (b_PWMCpt = 0; b_PWMCpt < 2; b_PWMCpt++) {
  748. /*************************************/
  749. /* Test if PWM interrupt initialised */
  750. /*************************************/
  751. if (devpriv->
  752. s_ModuleInfo[b_ModuleCpt].
  753. s_PWMModuleInfo.
  754. s_PWMInfo[b_PWMCpt].
  755. b_InterruptEnable == APCI1710_ENABLE) {
  756. /*****************************/
  757. /* Read the interrupt status */
  758. /*****************************/
  759. ul_StatusRegister =
  760. inl(devpriv->s_BoardInfos.
  761. ui_Address + 16 +
  762. (20 * b_PWMCpt) +
  763. (64 * b_ModuleCpt));
  764. /***************************/
  765. /* Test if interrupt occur */
  766. /***************************/
  767. if (ul_StatusRegister & 0x1) {
  768. devpriv->
  769. s_InterruptParameters.
  770. s_FIFOInterruptParameters
  771. [devpriv->
  772. s_InterruptParameters.
  773. ui_Write].
  774. ul_OldInterruptMask =
  775. 0x4000UL << b_PWMCpt;
  776. devpriv->
  777. s_InterruptParameters.
  778. s_FIFOInterruptParameters
  779. [devpriv->
  780. s_InterruptParameters.
  781. ui_Write].
  782. b_OldModuleMask =
  783. 1 << b_ModuleCpt;
  784. devpriv->
  785. s_InterruptParameters.
  786. ul_InterruptOccur++;
  787. /****************************/
  788. /* Increment the write FIFO */
  789. /****************************/
  790. devpriv->
  791. s_InterruptParameters.
  792. ui_Write = (devpriv->
  793. s_InterruptParameters.
  794. ui_Write +
  795. 1) %
  796. APCI1710_SAVE_INTERRUPT;
  797. b_InterruptFlag = 1;
  798. /**********************/
  799. /* Call user function */
  800. /**********************/
  801. /* Send a signal to from kernel to user space */
  802. send_sig(SIGIO,
  803. devpriv->tsk_Current,
  804. 0);
  805. } /* if (ul_StatusRegister & 0x1) */
  806. } /* if (APCI1710_ENABLE) */
  807. } /* for (b_PWMCpt == 0; b_PWMCpt < 0; b_PWMCpt ++) */
  808. } /* PWM counter */
  809. /***********************/
  810. /* Test if tor counter */
  811. /***********************/
  812. if ((devpriv->s_BoardInfos.
  813. dw_MolduleConfiguration[b_ModuleCpt] &
  814. 0xFFFF0000UL) == APCI1710_TOR_COUNTER) {
  815. for (b_TorCounterCpt = 0; b_TorCounterCpt < 2;
  816. b_TorCounterCpt++) {
  817. /*************************************/
  818. /* Test if tor interrupt initialised */
  819. /*************************************/
  820. if (devpriv->
  821. s_ModuleInfo[b_ModuleCpt].
  822. s_TorCounterModuleInfo.
  823. s_TorCounterInfo[b_TorCounterCpt].
  824. b_InterruptEnable == APCI1710_ENABLE) {
  825. /*****************************/
  826. /* Read the interrupt status */
  827. /*****************************/
  828. ul_StatusRegister =
  829. inl(devpriv->s_BoardInfos.
  830. ui_Address + 12 +
  831. (16 * b_TorCounterCpt) +
  832. (64 * b_ModuleCpt));
  833. /***************************/
  834. /* Test if interrupt occur */
  835. /***************************/
  836. if (ul_StatusRegister & 0x1) {
  837. /******************************/
  838. /* Read the tor counter value */
  839. /******************************/
  840. ul_LatchRegisterValue =
  841. inl(devpriv->
  842. s_BoardInfos.
  843. ui_Address + 0 +
  844. (16 * b_TorCounterCpt) +
  845. (64 * b_ModuleCpt));
  846. devpriv->
  847. s_InterruptParameters.
  848. s_FIFOInterruptParameters
  849. [devpriv->
  850. s_InterruptParameters.
  851. ui_Write].
  852. ul_OldInterruptMask =
  853. 0x1000UL <<
  854. b_TorCounterCpt;
  855. devpriv->
  856. s_InterruptParameters.
  857. s_FIFOInterruptParameters
  858. [devpriv->
  859. s_InterruptParameters.
  860. ui_Write].
  861. b_OldModuleMask =
  862. 1 << b_ModuleCpt;
  863. devpriv->
  864. s_InterruptParameters.
  865. s_FIFOInterruptParameters
  866. [devpriv->
  867. s_InterruptParameters.
  868. ui_Write].
  869. ul_OldCounterLatchValue
  870. = ul_LatchRegisterValue;
  871. devpriv->
  872. s_InterruptParameters.
  873. ul_InterruptOccur++;
  874. /****************************/
  875. /* Increment the write FIFO */
  876. /****************************/
  877. devpriv->
  878. s_InterruptParameters.
  879. ui_Write = (devpriv->
  880. s_InterruptParameters.
  881. ui_Write +
  882. 1) %
  883. APCI1710_SAVE_INTERRUPT;
  884. b_InterruptFlag = 1;
  885. /**********************/
  886. /* Call user function */
  887. /**********************/
  888. /* Send a signal to from kernel to user space */
  889. send_sig(SIGIO,
  890. devpriv->tsk_Current,
  891. 0);
  892. } /* if (ul_StatusRegister & 0x1) */
  893. } /* if (APCI1710_ENABLE) */
  894. } /* for (b_TorCounterCpt == 0; b_TorCounterCpt < 0; b_TorCounterCpt ++) */
  895. } /* Tor counter */
  896. /***********************/
  897. /* Test if chronometer */
  898. /***********************/
  899. if ((devpriv->s_BoardInfos.
  900. dw_MolduleConfiguration[b_ModuleCpt] &
  901. 0xFFFF0000UL) == APCI1710_CHRONOMETER) {
  902. /* printk("APCI1710 Chrono Interrupt\n"); */
  903. /*****************************/
  904. /* Read the interrupt status */
  905. /*****************************/
  906. ul_InterruptLatchReg = inl(devpriv->s_BoardInfos.
  907. ui_Address + 12 + (64 * b_ModuleCpt));
  908. /***************************/
  909. /* Test if interrupt occur */
  910. /***************************/
  911. if ((ul_InterruptLatchReg & 0x8) == 0x8) {
  912. /****************************/
  913. /* Clear the interrupt flag */
  914. /****************************/
  915. outl(0, devpriv->s_BoardInfos.
  916. ui_Address + 32 + (64 * b_ModuleCpt));
  917. /***************************/
  918. /* Test if continuous mode */
  919. /***************************/
  920. if (ps_ModuleInfo->
  921. s_ChronoModuleInfo.
  922. b_CycleMode == APCI1710_ENABLE) {
  923. /********************/
  924. /* Clear the status */
  925. /********************/
  926. outl(0, devpriv->s_BoardInfos.
  927. ui_Address + 36 +
  928. (64 * b_ModuleCpt));
  929. }
  930. /*************************/
  931. /* Read the timing value */
  932. /*************************/
  933. ul_LatchRegisterValue =
  934. inl(devpriv->s_BoardInfos.ui_Address +
  935. 4 + (64 * b_ModuleCpt));
  936. /*****************************/
  937. /* Test if interrupt enabled */
  938. /*****************************/
  939. if (ps_ModuleInfo->
  940. s_ChronoModuleInfo.b_InterruptMask) {
  941. devpriv->
  942. s_InterruptParameters.
  943. s_FIFOInterruptParameters
  944. [devpriv->s_InterruptParameters.
  945. ui_Write].ul_OldInterruptMask =
  946. 0x80;
  947. devpriv->
  948. s_InterruptParameters.
  949. s_FIFOInterruptParameters
  950. [devpriv->s_InterruptParameters.
  951. ui_Write].b_OldModuleMask =
  952. 1 << b_ModuleCpt;
  953. devpriv->
  954. s_InterruptParameters.
  955. s_FIFOInterruptParameters
  956. [devpriv->s_InterruptParameters.
  957. ui_Write].
  958. ul_OldCounterLatchValue =
  959. ul_LatchRegisterValue;
  960. devpriv->
  961. s_InterruptParameters.
  962. ul_InterruptOccur++;
  963. /****************************/
  964. /* Increment the write FIFO */
  965. /****************************/
  966. devpriv->
  967. s_InterruptParameters.
  968. ui_Write = (devpriv->
  969. s_InterruptParameters.
  970. ui_Write +
  971. 1) % APCI1710_SAVE_INTERRUPT;
  972. b_InterruptFlag = 1;
  973. /**********************/
  974. /* Call user function */
  975. /**********************/
  976. /* Send a signal to from kernel to user space */
  977. send_sig(SIGIO, devpriv->tsk_Current,
  978. 0);
  979. }
  980. }
  981. } /* Chronometer */
  982. /*************************/
  983. /* Test if pulse encoder */
  984. /*************************/
  985. if ((devpriv->s_BoardInfos.
  986. dw_MolduleConfiguration[b_ModuleCpt] &
  987. 0xFFFF0000UL) == APCI1710_PULSE_ENCODER) {
  988. /****************************/
  989. /* Read the status register */
  990. /****************************/
  991. ul_StatusRegister = inl(devpriv->s_BoardInfos.
  992. ui_Address + 20 + (64 * b_ModuleCpt));
  993. if (ul_StatusRegister & 0xF) {
  994. for (b_PulseIncoderCpt = 0;
  995. b_PulseIncoderCpt < 4;
  996. b_PulseIncoderCpt++) {
  997. /*************************************/
  998. /* Test if pulse encoder initialised */
  999. /*************************************/
  1000. if ((ps_ModuleInfo->
  1001. s_PulseEncoderModuleInfo.
  1002. s_PulseEncoderInfo
  1003. [b_PulseIncoderCpt].
  1004. b_PulseEncoderInit == 1)
  1005. && (((ps_ModuleInfo->s_PulseEncoderModuleInfo.dw_SetRegister >> b_PulseIncoderCpt) & 1) == 1) && (((ul_StatusRegister >> (b_PulseIncoderCpt)) & 1) == 1)) {
  1006. devpriv->s_InterruptParameters.
  1007. s_FIFOInterruptParameters
  1008. [devpriv->
  1009. s_InterruptParameters.
  1010. ui_Write].
  1011. ul_OldInterruptMask =
  1012. 0x100UL <<
  1013. b_PulseIncoderCpt;
  1014. devpriv->
  1015. s_InterruptParameters.
  1016. s_FIFOInterruptParameters
  1017. [devpriv->
  1018. s_InterruptParameters.
  1019. ui_Write].
  1020. b_OldModuleMask =
  1021. 1 << b_ModuleCpt;
  1022. devpriv->
  1023. s_InterruptParameters.
  1024. s_FIFOInterruptParameters
  1025. [devpriv->
  1026. s_InterruptParameters.
  1027. ui_Write].
  1028. ul_OldCounterLatchValue
  1029. = ul_LatchRegisterValue;
  1030. devpriv->
  1031. s_InterruptParameters.
  1032. ul_InterruptOccur++;
  1033. /****************************/
  1034. /* 0899/0224 to 1199/0225 */
  1035. /****************************/
  1036. /* Increment the write FIFO */
  1037. /****************************/
  1038. devpriv->
  1039. s_InterruptParameters.
  1040. ui_Write = (devpriv->
  1041. s_InterruptParameters.
  1042. ui_Write +
  1043. 1) %
  1044. APCI1710_SAVE_INTERRUPT;
  1045. b_InterruptFlag = 1;
  1046. /**********************/
  1047. /* Call user function */
  1048. /**********************/
  1049. /* Send a signal to from kernel to user space */
  1050. send_sig(SIGIO,
  1051. devpriv->tsk_Current,
  1052. 0);
  1053. }
  1054. }
  1055. }
  1056. } /* pulse encoder */
  1057. }
  1058. return;
  1059. }