/kernel/2.6.32_froyo_photon_nightly/drivers/video/omap/blizzard.c

http://photon-android.googlecode.com/ · C · 1649 lines · 1286 code · 256 blank · 107 comment · 165 complexity · 9416b0e7301c4ab0d84c55a85c802458 MD5 · raw file

  1. /*
  2. * Epson Blizzard LCD controller driver
  3. *
  4. * Copyright (C) 2004-2005 Nokia Corporation
  5. * Authors: Juha Yrjola <juha.yrjola@nokia.com>
  6. * Imre Deak <imre.deak@nokia.com>
  7. * YUV support: Jussi Laako <jussi.laako@nokia.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along
  20. * with this program; if not, write to the Free Software Foundation, Inc.,
  21. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/mm.h>
  25. #include <linux/fb.h>
  26. #include <linux/delay.h>
  27. #include <linux/clk.h>
  28. #include <mach/dma.h>
  29. #include <mach/omapfb.h>
  30. #include <mach/blizzard.h>
  31. #include "dispc.h"
  32. #define MODULE_NAME "blizzard"
  33. #define BLIZZARD_REV_CODE 0x00
  34. #define BLIZZARD_CONFIG 0x02
  35. #define BLIZZARD_PLL_DIV 0x04
  36. #define BLIZZARD_PLL_LOCK_RANGE 0x06
  37. #define BLIZZARD_PLL_CLOCK_SYNTH_0 0x08
  38. #define BLIZZARD_PLL_CLOCK_SYNTH_1 0x0a
  39. #define BLIZZARD_PLL_MODE 0x0c
  40. #define BLIZZARD_CLK_SRC 0x0e
  41. #define BLIZZARD_MEM_BANK0_ACTIVATE 0x10
  42. #define BLIZZARD_MEM_BANK0_STATUS 0x14
  43. #define BLIZZARD_PANEL_CONFIGURATION 0x28
  44. #define BLIZZARD_HDISP 0x2a
  45. #define BLIZZARD_HNDP 0x2c
  46. #define BLIZZARD_VDISP0 0x2e
  47. #define BLIZZARD_VDISP1 0x30
  48. #define BLIZZARD_VNDP 0x32
  49. #define BLIZZARD_HSW 0x34
  50. #define BLIZZARD_VSW 0x38
  51. #define BLIZZARD_DISPLAY_MODE 0x68
  52. #define BLIZZARD_INPUT_WIN_X_START_0 0x6c
  53. #define BLIZZARD_DATA_SOURCE_SELECT 0x8e
  54. #define BLIZZARD_DISP_MEM_DATA_PORT 0x90
  55. #define BLIZZARD_DISP_MEM_READ_ADDR0 0x92
  56. #define BLIZZARD_POWER_SAVE 0xE6
  57. #define BLIZZARD_NDISP_CTRL_STATUS 0xE8
  58. /* Data source select */
  59. /* For S1D13745 */
  60. #define BLIZZARD_SRC_WRITE_LCD_BACKGROUND 0x00
  61. #define BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE 0x01
  62. #define BLIZZARD_SRC_WRITE_OVERLAY_ENABLE 0x04
  63. #define BLIZZARD_SRC_DISABLE_OVERLAY 0x05
  64. /* For S1D13744 */
  65. #define BLIZZARD_SRC_WRITE_LCD 0x00
  66. #define BLIZZARD_SRC_BLT_LCD 0x06
  67. #define BLIZZARD_COLOR_RGB565 0x01
  68. #define BLIZZARD_COLOR_YUV420 0x09
  69. #define BLIZZARD_VERSION_S1D13745 0x01 /* Hailstorm */
  70. #define BLIZZARD_VERSION_S1D13744 0x02 /* Blizzard */
  71. #define BLIZZARD_AUTO_UPDATE_TIME (HZ / 20)
  72. /* Reserve 4 request slots for requests in irq context */
  73. #define REQ_POOL_SIZE 24
  74. #define IRQ_REQ_POOL_SIZE 4
  75. #define REQ_FROM_IRQ_POOL 0x01
  76. #define REQ_COMPLETE 0
  77. #define REQ_PENDING 1
  78. struct blizzard_reg_list {
  79. int start;
  80. int end;
  81. };
  82. /* These need to be saved / restored separately from the rest. */
  83. static const struct blizzard_reg_list blizzard_pll_regs[] = {
  84. {
  85. .start = 0x04, /* Don't save PLL ctrl (0x0C) */
  86. .end = 0x0a,
  87. },
  88. {
  89. .start = 0x0e, /* Clock configuration */
  90. .end = 0x0e,
  91. },
  92. };
  93. static const struct blizzard_reg_list blizzard_gen_regs[] = {
  94. {
  95. .start = 0x18, /* SDRAM control */
  96. .end = 0x20,
  97. },
  98. {
  99. .start = 0x28, /* LCD Panel configuration */
  100. .end = 0x5a, /* HSSI interface, TV configuration */
  101. },
  102. };
  103. static u8 blizzard_reg_cache[0x5a / 2];
  104. struct update_param {
  105. int plane;
  106. int x, y, width, height;
  107. int out_x, out_y;
  108. int out_width, out_height;
  109. int color_mode;
  110. int bpp;
  111. int flags;
  112. };
  113. struct blizzard_request {
  114. struct list_head entry;
  115. unsigned int flags;
  116. int (*handler)(struct blizzard_request *req);
  117. void (*complete)(void *data);
  118. void *complete_data;
  119. union {
  120. struct update_param update;
  121. struct completion *sync;
  122. } par;
  123. };
  124. struct plane_info {
  125. unsigned long offset;
  126. int pos_x, pos_y;
  127. int width, height;
  128. int out_width, out_height;
  129. int scr_width;
  130. int color_mode;
  131. int bpp;
  132. };
  133. struct blizzard_struct {
  134. enum omapfb_update_mode update_mode;
  135. enum omapfb_update_mode update_mode_before_suspend;
  136. struct timer_list auto_update_timer;
  137. int stop_auto_update;
  138. struct omapfb_update_window auto_update_window;
  139. int enabled_planes;
  140. int vid_nonstd_color;
  141. int vid_scaled;
  142. int last_color_mode;
  143. int zoom_on;
  144. int zoom_area_gx1;
  145. int zoom_area_gx2;
  146. int zoom_area_gy1;
  147. int zoom_area_gy2;
  148. int screen_width;
  149. int screen_height;
  150. unsigned te_connected:1;
  151. unsigned vsync_only:1;
  152. struct plane_info plane[OMAPFB_PLANE_NUM];
  153. struct blizzard_request req_pool[REQ_POOL_SIZE];
  154. struct list_head pending_req_list;
  155. struct list_head free_req_list;
  156. struct semaphore req_sema;
  157. spinlock_t req_lock;
  158. unsigned long sys_ck_rate;
  159. struct extif_timings reg_timings, lut_timings;
  160. u32 max_transmit_size;
  161. u32 extif_clk_period;
  162. int extif_clk_div;
  163. unsigned long pix_tx_time;
  164. unsigned long line_upd_time;
  165. struct omapfb_device *fbdev;
  166. struct lcd_ctrl_extif *extif;
  167. const struct lcd_ctrl *int_ctrl;
  168. void (*power_up)(struct device *dev);
  169. void (*power_down)(struct device *dev);
  170. int version;
  171. } blizzard;
  172. struct lcd_ctrl blizzard_ctrl;
  173. static u8 blizzard_read_reg(u8 reg)
  174. {
  175. u8 data;
  176. blizzard.extif->set_bits_per_cycle(8);
  177. blizzard.extif->write_command(&reg, 1);
  178. blizzard.extif->read_data(&data, 1);
  179. return data;
  180. }
  181. static void blizzard_write_reg(u8 reg, u8 val)
  182. {
  183. blizzard.extif->set_bits_per_cycle(8);
  184. blizzard.extif->write_command(&reg, 1);
  185. blizzard.extif->write_data(&val, 1);
  186. }
  187. static void blizzard_restart_sdram(void)
  188. {
  189. unsigned long tmo;
  190. blizzard_write_reg(BLIZZARD_MEM_BANK0_ACTIVATE, 0);
  191. udelay(50);
  192. blizzard_write_reg(BLIZZARD_MEM_BANK0_ACTIVATE, 1);
  193. tmo = jiffies + msecs_to_jiffies(200);
  194. while (!(blizzard_read_reg(BLIZZARD_MEM_BANK0_STATUS) & 0x01)) {
  195. if (time_after(jiffies, tmo)) {
  196. dev_err(blizzard.fbdev->dev,
  197. "s1d1374x: SDRAM not ready\n");
  198. break;
  199. }
  200. msleep(1);
  201. }
  202. }
  203. static void blizzard_stop_sdram(void)
  204. {
  205. blizzard_write_reg(BLIZZARD_MEM_BANK0_ACTIVATE, 0);
  206. }
  207. /* Wait until the last window was completely written into the controllers
  208. * SDRAM and we can start transferring the next window.
  209. */
  210. static void blizzard_wait_line_buffer(void)
  211. {
  212. unsigned long tmo = jiffies + msecs_to_jiffies(30);
  213. while (blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS) & (1 << 7)) {
  214. if (time_after(jiffies, tmo)) {
  215. if (printk_ratelimit())
  216. dev_err(blizzard.fbdev->dev,
  217. "s1d1374x: line buffer not ready\n");
  218. break;
  219. }
  220. }
  221. }
  222. /* Wait until the YYC color space converter is idle. */
  223. static void blizzard_wait_yyc(void)
  224. {
  225. unsigned long tmo = jiffies + msecs_to_jiffies(30);
  226. while (blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS) & (1 << 4)) {
  227. if (time_after(jiffies, tmo)) {
  228. if (printk_ratelimit())
  229. dev_err(blizzard.fbdev->dev,
  230. "s1d1374x: YYC not ready\n");
  231. break;
  232. }
  233. }
  234. }
  235. static void disable_overlay(void)
  236. {
  237. blizzard_write_reg(BLIZZARD_DATA_SOURCE_SELECT,
  238. BLIZZARD_SRC_DISABLE_OVERLAY);
  239. }
  240. static void set_window_regs(int x_start, int y_start, int x_end, int y_end,
  241. int x_out_start, int y_out_start,
  242. int x_out_end, int y_out_end, int color_mode,
  243. int zoom_off, int flags)
  244. {
  245. u8 tmp[18];
  246. u8 cmd;
  247. x_end--;
  248. y_end--;
  249. tmp[0] = x_start;
  250. tmp[1] = x_start >> 8;
  251. tmp[2] = y_start;
  252. tmp[3] = y_start >> 8;
  253. tmp[4] = x_end;
  254. tmp[5] = x_end >> 8;
  255. tmp[6] = y_end;
  256. tmp[7] = y_end >> 8;
  257. x_out_end--;
  258. y_out_end--;
  259. tmp[8] = x_out_start;
  260. tmp[9] = x_out_start >> 8;
  261. tmp[10] = y_out_start;
  262. tmp[11] = y_out_start >> 8;
  263. tmp[12] = x_out_end;
  264. tmp[13] = x_out_end >> 8;
  265. tmp[14] = y_out_end;
  266. tmp[15] = y_out_end >> 8;
  267. tmp[16] = color_mode;
  268. if (zoom_off && blizzard.version == BLIZZARD_VERSION_S1D13745)
  269. tmp[17] = BLIZZARD_SRC_WRITE_LCD_BACKGROUND;
  270. else if (flags & OMAPFB_FORMAT_FLAG_ENABLE_OVERLAY)
  271. tmp[17] = BLIZZARD_SRC_WRITE_OVERLAY_ENABLE;
  272. else
  273. tmp[17] = blizzard.version == BLIZZARD_VERSION_S1D13744 ?
  274. BLIZZARD_SRC_WRITE_LCD :
  275. BLIZZARD_SRC_WRITE_LCD_DESTRUCTIVE;
  276. blizzard.extif->set_bits_per_cycle(8);
  277. cmd = BLIZZARD_INPUT_WIN_X_START_0;
  278. blizzard.extif->write_command(&cmd, 1);
  279. blizzard.extif->write_data(tmp, 18);
  280. }
  281. static void enable_tearsync(int y, int width, int height, int screen_height,
  282. int out_height, int force_vsync)
  283. {
  284. u8 b;
  285. b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
  286. b |= 1 << 3;
  287. blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b);
  288. if (likely(blizzard.vsync_only || force_vsync)) {
  289. blizzard.extif->enable_tearsync(1, 0);
  290. return;
  291. }
  292. if (width * blizzard.pix_tx_time < blizzard.line_upd_time) {
  293. blizzard.extif->enable_tearsync(1, 0);
  294. return;
  295. }
  296. if ((width * blizzard.pix_tx_time / 1000) * height <
  297. (y + out_height) * (blizzard.line_upd_time / 1000)) {
  298. blizzard.extif->enable_tearsync(1, 0);
  299. return;
  300. }
  301. blizzard.extif->enable_tearsync(1, y + 1);
  302. }
  303. static void disable_tearsync(void)
  304. {
  305. u8 b;
  306. blizzard.extif->enable_tearsync(0, 0);
  307. b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
  308. b &= ~(1 << 3);
  309. blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b);
  310. b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
  311. }
  312. static inline void set_extif_timings(const struct extif_timings *t);
  313. static inline struct blizzard_request *alloc_req(void)
  314. {
  315. unsigned long flags;
  316. struct blizzard_request *req;
  317. int req_flags = 0;
  318. if (!in_interrupt())
  319. down(&blizzard.req_sema);
  320. else
  321. req_flags = REQ_FROM_IRQ_POOL;
  322. spin_lock_irqsave(&blizzard.req_lock, flags);
  323. BUG_ON(list_empty(&blizzard.free_req_list));
  324. req = list_entry(blizzard.free_req_list.next,
  325. struct blizzard_request, entry);
  326. list_del(&req->entry);
  327. spin_unlock_irqrestore(&blizzard.req_lock, flags);
  328. INIT_LIST_HEAD(&req->entry);
  329. req->flags = req_flags;
  330. return req;
  331. }
  332. static inline void free_req(struct blizzard_request *req)
  333. {
  334. unsigned long flags;
  335. spin_lock_irqsave(&blizzard.req_lock, flags);
  336. list_del(&req->entry);
  337. list_add(&req->entry, &blizzard.free_req_list);
  338. if (!(req->flags & REQ_FROM_IRQ_POOL))
  339. up(&blizzard.req_sema);
  340. spin_unlock_irqrestore(&blizzard.req_lock, flags);
  341. }
  342. static void process_pending_requests(void)
  343. {
  344. unsigned long flags;
  345. spin_lock_irqsave(&blizzard.req_lock, flags);
  346. while (!list_empty(&blizzard.pending_req_list)) {
  347. struct blizzard_request *req;
  348. void (*complete)(void *);
  349. void *complete_data;
  350. req = list_entry(blizzard.pending_req_list.next,
  351. struct blizzard_request, entry);
  352. spin_unlock_irqrestore(&blizzard.req_lock, flags);
  353. if (req->handler(req) == REQ_PENDING)
  354. return;
  355. complete = req->complete;
  356. complete_data = req->complete_data;
  357. free_req(req);
  358. if (complete)
  359. complete(complete_data);
  360. spin_lock_irqsave(&blizzard.req_lock, flags);
  361. }
  362. spin_unlock_irqrestore(&blizzard.req_lock, flags);
  363. }
  364. static void submit_req_list(struct list_head *head)
  365. {
  366. unsigned long flags;
  367. int process = 1;
  368. spin_lock_irqsave(&blizzard.req_lock, flags);
  369. if (likely(!list_empty(&blizzard.pending_req_list)))
  370. process = 0;
  371. list_splice_init(head, blizzard.pending_req_list.prev);
  372. spin_unlock_irqrestore(&blizzard.req_lock, flags);
  373. if (process)
  374. process_pending_requests();
  375. }
  376. static void request_complete(void *data)
  377. {
  378. struct blizzard_request *req = (struct blizzard_request *)data;
  379. void (*complete)(void *);
  380. void *complete_data;
  381. complete = req->complete;
  382. complete_data = req->complete_data;
  383. free_req(req);
  384. if (complete)
  385. complete(complete_data);
  386. process_pending_requests();
  387. }
  388. static int do_full_screen_update(struct blizzard_request *req)
  389. {
  390. int i;
  391. int flags;
  392. for (i = 0; i < 3; i++) {
  393. struct plane_info *p = &blizzard.plane[i];
  394. if (!(blizzard.enabled_planes & (1 << i))) {
  395. blizzard.int_ctrl->enable_plane(i, 0);
  396. continue;
  397. }
  398. dev_dbg(blizzard.fbdev->dev, "pw %d ph %d\n",
  399. p->width, p->height);
  400. blizzard.int_ctrl->setup_plane(i,
  401. OMAPFB_CHANNEL_OUT_LCD, p->offset,
  402. p->scr_width, p->pos_x, p->pos_y,
  403. p->width, p->height,
  404. p->color_mode);
  405. blizzard.int_ctrl->enable_plane(i, 1);
  406. }
  407. dev_dbg(blizzard.fbdev->dev, "sw %d sh %d\n",
  408. blizzard.screen_width, blizzard.screen_height);
  409. blizzard_wait_line_buffer();
  410. flags = req->par.update.flags;
  411. if (flags & OMAPFB_FORMAT_FLAG_TEARSYNC)
  412. enable_tearsync(0, blizzard.screen_width,
  413. blizzard.screen_height,
  414. blizzard.screen_height,
  415. blizzard.screen_height,
  416. flags & OMAPFB_FORMAT_FLAG_FORCE_VSYNC);
  417. else
  418. disable_tearsync();
  419. set_window_regs(0, 0, blizzard.screen_width, blizzard.screen_height,
  420. 0, 0, blizzard.screen_width, blizzard.screen_height,
  421. BLIZZARD_COLOR_RGB565, blizzard.zoom_on, flags);
  422. blizzard.zoom_on = 0;
  423. blizzard.extif->set_bits_per_cycle(16);
  424. /* set_window_regs has left the register index at the right
  425. * place, so no need to set it here.
  426. */
  427. blizzard.extif->transfer_area(blizzard.screen_width,
  428. blizzard.screen_height,
  429. request_complete, req);
  430. return REQ_PENDING;
  431. }
  432. static int check_1d_intersect(int a1, int a2, int b1, int b2)
  433. {
  434. if (a2 <= b1 || b2 <= a1)
  435. return 0;
  436. return 1;
  437. }
  438. /* Setup all planes with an overlapping area with the update window. */
  439. static int do_partial_update(struct blizzard_request *req, int plane,
  440. int x, int y, int w, int h,
  441. int x_out, int y_out, int w_out, int h_out,
  442. int wnd_color_mode, int bpp)
  443. {
  444. int i;
  445. int gx1, gy1, gx2, gy2;
  446. int gx1_out, gy1_out, gx2_out, gy2_out;
  447. int color_mode;
  448. int flags;
  449. int zoom_off;
  450. int have_zoom_for_this_update = 0;
  451. /* Global coordinates, relative to pixel 0,0 of the LCD */
  452. gx1 = x + blizzard.plane[plane].pos_x;
  453. gy1 = y + blizzard.plane[plane].pos_y;
  454. gx2 = gx1 + w;
  455. gy2 = gy1 + h;
  456. flags = req->par.update.flags;
  457. if (flags & OMAPFB_FORMAT_FLAG_DOUBLE) {
  458. gx1_out = gx1;
  459. gy1_out = gy1;
  460. gx2_out = gx1 + w * 2;
  461. gy2_out = gy1 + h * 2;
  462. } else {
  463. gx1_out = x_out + blizzard.plane[plane].pos_x;
  464. gy1_out = y_out + blizzard.plane[plane].pos_y;
  465. gx2_out = gx1_out + w_out;
  466. gy2_out = gy1_out + h_out;
  467. }
  468. for (i = 0; i < OMAPFB_PLANE_NUM; i++) {
  469. struct plane_info *p = &blizzard.plane[i];
  470. int px1, py1;
  471. int px2, py2;
  472. int pw, ph;
  473. int pposx, pposy;
  474. unsigned long offset;
  475. if (!(blizzard.enabled_planes & (1 << i)) ||
  476. (wnd_color_mode && i != plane)) {
  477. blizzard.int_ctrl->enable_plane(i, 0);
  478. continue;
  479. }
  480. /* Plane coordinates */
  481. if (i == plane) {
  482. /* Plane in which we are doing the update.
  483. * Local coordinates are the one in the update
  484. * request.
  485. */
  486. px1 = x;
  487. py1 = y;
  488. px2 = x + w;
  489. py2 = y + h;
  490. pposx = 0;
  491. pposy = 0;
  492. } else {
  493. /* Check if this plane has an overlapping part */
  494. px1 = gx1 - p->pos_x;
  495. py1 = gy1 - p->pos_y;
  496. px2 = gx2 - p->pos_x;
  497. py2 = gy2 - p->pos_y;
  498. if (px1 >= p->width || py1 >= p->height ||
  499. px2 <= 0 || py2 <= 0) {
  500. blizzard.int_ctrl->enable_plane(i, 0);
  501. continue;
  502. }
  503. /* Calculate the coordinates for the overlapping
  504. * part in the plane's local coordinates.
  505. */
  506. pposx = -px1;
  507. pposy = -py1;
  508. if (px1 < 0)
  509. px1 = 0;
  510. if (py1 < 0)
  511. py1 = 0;
  512. if (px2 > p->width)
  513. px2 = p->width;
  514. if (py2 > p->height)
  515. py2 = p->height;
  516. if (pposx < 0)
  517. pposx = 0;
  518. if (pposy < 0)
  519. pposy = 0;
  520. }
  521. pw = px2 - px1;
  522. ph = py2 - py1;
  523. offset = p->offset + (p->scr_width * py1 + px1) * p->bpp / 8;
  524. if (wnd_color_mode)
  525. /* Window embedded in the plane with a differing
  526. * color mode / bpp. Calculate the number of DMA
  527. * transfer elements in terms of the plane's bpp.
  528. */
  529. pw = (pw + 1) * bpp / p->bpp;
  530. #ifdef VERBOSE
  531. dev_dbg(blizzard.fbdev->dev,
  532. "plane %d offset %#08lx pposx %d pposy %d "
  533. "px1 %d py1 %d pw %d ph %d\n",
  534. i, offset, pposx, pposy, px1, py1, pw, ph);
  535. #endif
  536. blizzard.int_ctrl->setup_plane(i,
  537. OMAPFB_CHANNEL_OUT_LCD, offset,
  538. p->scr_width,
  539. pposx, pposy, pw, ph,
  540. p->color_mode);
  541. blizzard.int_ctrl->enable_plane(i, 1);
  542. }
  543. switch (wnd_color_mode) {
  544. case OMAPFB_COLOR_YUV420:
  545. color_mode = BLIZZARD_COLOR_YUV420;
  546. /* Currently only the 16 bits/pixel cycle format is
  547. * supported on the external interface. Adjust the number
  548. * of transfer elements per line for 12bpp format.
  549. */
  550. w = (w + 1) * 3 / 4;
  551. break;
  552. default:
  553. color_mode = BLIZZARD_COLOR_RGB565;
  554. break;
  555. }
  556. blizzard_wait_line_buffer();
  557. if (blizzard.last_color_mode == BLIZZARD_COLOR_YUV420)
  558. blizzard_wait_yyc();
  559. blizzard.last_color_mode = color_mode;
  560. if (flags & OMAPFB_FORMAT_FLAG_TEARSYNC)
  561. enable_tearsync(gy1, w, h,
  562. blizzard.screen_height,
  563. h_out,
  564. flags & OMAPFB_FORMAT_FLAG_FORCE_VSYNC);
  565. else
  566. disable_tearsync();
  567. if ((gx2_out - gx1_out) != (gx2 - gx1) ||
  568. (gy2_out - gy1_out) != (gy2 - gy1))
  569. have_zoom_for_this_update = 1;
  570. /* 'background' type of screen update (as opposed to 'destructive')
  571. can be used to disable scaling if scaling is active */
  572. zoom_off = blizzard.zoom_on && !have_zoom_for_this_update &&
  573. (gx1_out == 0) && (gx2_out == blizzard.screen_width) &&
  574. (gy1_out == 0) && (gy2_out == blizzard.screen_height) &&
  575. (gx1 == 0) && (gy1 == 0);
  576. if (blizzard.zoom_on && !have_zoom_for_this_update && !zoom_off &&
  577. check_1d_intersect(blizzard.zoom_area_gx1, blizzard.zoom_area_gx2,
  578. gx1_out, gx2_out) &&
  579. check_1d_intersect(blizzard.zoom_area_gy1, blizzard.zoom_area_gy2,
  580. gy1_out, gy2_out)) {
  581. /* Previous screen update was using scaling, current update
  582. * is not using it. Additionally, current screen update is
  583. * going to overlap with the scaled area. Scaling needs to be
  584. * disabled in order to avoid 'magnifying glass' effect.
  585. * Dummy setup of background window can be used for this.
  586. */
  587. set_window_regs(0, 0, blizzard.screen_width,
  588. blizzard.screen_height,
  589. 0, 0, blizzard.screen_width,
  590. blizzard.screen_height,
  591. BLIZZARD_COLOR_RGB565, 1, flags);
  592. blizzard.zoom_on = 0;
  593. }
  594. /* remember scaling settings if we have scaled update */
  595. if (have_zoom_for_this_update) {
  596. blizzard.zoom_on = 1;
  597. blizzard.zoom_area_gx1 = gx1_out;
  598. blizzard.zoom_area_gx2 = gx2_out;
  599. blizzard.zoom_area_gy1 = gy1_out;
  600. blizzard.zoom_area_gy2 = gy2_out;
  601. }
  602. set_window_regs(gx1, gy1, gx2, gy2, gx1_out, gy1_out, gx2_out, gy2_out,
  603. color_mode, zoom_off, flags);
  604. if (zoom_off)
  605. blizzard.zoom_on = 0;
  606. blizzard.extif->set_bits_per_cycle(16);
  607. /* set_window_regs has left the register index at the right
  608. * place, so no need to set it here.
  609. */
  610. blizzard.extif->transfer_area(w, h, request_complete, req);
  611. return REQ_PENDING;
  612. }
  613. static int send_frame_handler(struct blizzard_request *req)
  614. {
  615. struct update_param *par = &req->par.update;
  616. int plane = par->plane;
  617. #ifdef VERBOSE
  618. dev_dbg(blizzard.fbdev->dev,
  619. "send_frame: x %d y %d w %d h %d "
  620. "x_out %d y_out %d w_out %d h_out %d "
  621. "color_mode %04x flags %04x planes %01x\n",
  622. par->x, par->y, par->width, par->height,
  623. par->out_x, par->out_y, par->out_width, par->out_height,
  624. par->color_mode, par->flags, blizzard.enabled_planes);
  625. #endif
  626. if (par->flags & OMAPFB_FORMAT_FLAG_DISABLE_OVERLAY)
  627. disable_overlay();
  628. if ((blizzard.enabled_planes & blizzard.vid_nonstd_color) ||
  629. (blizzard.enabled_planes & blizzard.vid_scaled))
  630. return do_full_screen_update(req);
  631. return do_partial_update(req, plane, par->x, par->y,
  632. par->width, par->height,
  633. par->out_x, par->out_y,
  634. par->out_width, par->out_height,
  635. par->color_mode, par->bpp);
  636. }
  637. static void send_frame_complete(void *data)
  638. {
  639. }
  640. #define ADD_PREQ(_x, _y, _w, _h, _x_out, _y_out, _w_out, _h_out) do { \
  641. req = alloc_req(); \
  642. req->handler = send_frame_handler; \
  643. req->complete = send_frame_complete; \
  644. req->par.update.plane = plane_idx; \
  645. req->par.update.x = _x; \
  646. req->par.update.y = _y; \
  647. req->par.update.width = _w; \
  648. req->par.update.height = _h; \
  649. req->par.update.out_x = _x_out; \
  650. req->par.update.out_y = _y_out; \
  651. req->par.update.out_width = _w_out; \
  652. req->par.update.out_height = _h_out; \
  653. req->par.update.bpp = bpp; \
  654. req->par.update.color_mode = color_mode;\
  655. req->par.update.flags = flags; \
  656. list_add_tail(&req->entry, req_head); \
  657. } while(0)
  658. static void create_req_list(int plane_idx,
  659. struct omapfb_update_window *win,
  660. struct list_head *req_head)
  661. {
  662. struct blizzard_request *req;
  663. int x = win->x;
  664. int y = win->y;
  665. int width = win->width;
  666. int height = win->height;
  667. int x_out = win->out_x;
  668. int y_out = win->out_y;
  669. int width_out = win->out_width;
  670. int height_out = win->out_height;
  671. int color_mode;
  672. int bpp;
  673. int flags;
  674. unsigned int ystart = y;
  675. unsigned int yspan = height;
  676. unsigned int ystart_out = y_out;
  677. unsigned int yspan_out = height_out;
  678. flags = win->format & ~OMAPFB_FORMAT_MASK;
  679. color_mode = win->format & OMAPFB_FORMAT_MASK;
  680. switch (color_mode) {
  681. case OMAPFB_COLOR_YUV420:
  682. /* Embedded window with different color mode */
  683. bpp = 12;
  684. /* X, Y, height must be aligned at 2, width at 4 pixels */
  685. x &= ~1;
  686. y &= ~1;
  687. height = yspan = height & ~1;
  688. width = width & ~3;
  689. break;
  690. default:
  691. /* Same as the plane color mode */
  692. bpp = blizzard.plane[plane_idx].bpp;
  693. break;
  694. }
  695. if (width * height * bpp / 8 > blizzard.max_transmit_size) {
  696. yspan = blizzard.max_transmit_size / (width * bpp / 8);
  697. yspan_out = yspan * height_out / height;
  698. ADD_PREQ(x, ystart, width, yspan, x_out, ystart_out,
  699. width_out, yspan_out);
  700. ystart += yspan;
  701. ystart_out += yspan_out;
  702. yspan = height - yspan;
  703. yspan_out = height_out - yspan_out;
  704. flags &= ~OMAPFB_FORMAT_FLAG_TEARSYNC;
  705. }
  706. ADD_PREQ(x, ystart, width, yspan, x_out, ystart_out,
  707. width_out, yspan_out);
  708. }
  709. static void auto_update_complete(void *data)
  710. {
  711. if (!blizzard.stop_auto_update)
  712. mod_timer(&blizzard.auto_update_timer,
  713. jiffies + BLIZZARD_AUTO_UPDATE_TIME);
  714. }
  715. static void blizzard_update_window_auto(unsigned long arg)
  716. {
  717. LIST_HEAD(req_list);
  718. struct blizzard_request *last;
  719. struct omapfb_plane_struct *plane;
  720. plane = blizzard.fbdev->fb_info[0]->par;
  721. create_req_list(plane->idx,
  722. &blizzard.auto_update_window, &req_list);
  723. last = list_entry(req_list.prev, struct blizzard_request, entry);
  724. last->complete = auto_update_complete;
  725. last->complete_data = NULL;
  726. submit_req_list(&req_list);
  727. }
  728. int blizzard_update_window_async(struct fb_info *fbi,
  729. struct omapfb_update_window *win,
  730. void (*complete_callback)(void *arg),
  731. void *complete_callback_data)
  732. {
  733. LIST_HEAD(req_list);
  734. struct blizzard_request *last;
  735. struct omapfb_plane_struct *plane = fbi->par;
  736. if (unlikely(blizzard.update_mode != OMAPFB_MANUAL_UPDATE))
  737. return -EINVAL;
  738. if (unlikely(!blizzard.te_connected &&
  739. (win->format & OMAPFB_FORMAT_FLAG_TEARSYNC)))
  740. return -EINVAL;
  741. create_req_list(plane->idx, win, &req_list);
  742. last = list_entry(req_list.prev, struct blizzard_request, entry);
  743. last->complete = complete_callback;
  744. last->complete_data = (void *)complete_callback_data;
  745. submit_req_list(&req_list);
  746. return 0;
  747. }
  748. EXPORT_SYMBOL(blizzard_update_window_async);
  749. static int update_full_screen(void)
  750. {
  751. return blizzard_update_window_async(blizzard.fbdev->fb_info[0],
  752. &blizzard.auto_update_window, NULL, NULL);
  753. }
  754. static int blizzard_setup_plane(int plane, int channel_out,
  755. unsigned long offset, int screen_width,
  756. int pos_x, int pos_y, int width, int height,
  757. int color_mode)
  758. {
  759. struct plane_info *p;
  760. #ifdef VERBOSE
  761. dev_dbg(blizzard.fbdev->dev,
  762. "plane %d ch_out %d offset %#08lx scr_width %d "
  763. "pos_x %d pos_y %d width %d height %d color_mode %d\n",
  764. plane, channel_out, offset, screen_width,
  765. pos_x, pos_y, width, height, color_mode);
  766. #endif
  767. if ((unsigned)plane > OMAPFB_PLANE_NUM)
  768. return -EINVAL;
  769. p = &blizzard.plane[plane];
  770. switch (color_mode) {
  771. case OMAPFB_COLOR_YUV422:
  772. case OMAPFB_COLOR_YUY422:
  773. p->bpp = 16;
  774. blizzard.vid_nonstd_color &= ~(1 << plane);
  775. break;
  776. case OMAPFB_COLOR_YUV420:
  777. p->bpp = 12;
  778. blizzard.vid_nonstd_color |= 1 << plane;
  779. break;
  780. case OMAPFB_COLOR_RGB565:
  781. p->bpp = 16;
  782. blizzard.vid_nonstd_color &= ~(1 << plane);
  783. break;
  784. default:
  785. return -EINVAL;
  786. }
  787. p->offset = offset;
  788. p->pos_x = pos_x;
  789. p->pos_y = pos_y;
  790. p->width = width;
  791. p->height = height;
  792. p->scr_width = screen_width;
  793. if (!p->out_width)
  794. p->out_width = width;
  795. if (!p->out_height)
  796. p->out_height = height;
  797. p->color_mode = color_mode;
  798. return 0;
  799. }
  800. static int blizzard_set_scale(int plane, int orig_w, int orig_h,
  801. int out_w, int out_h)
  802. {
  803. struct plane_info *p = &blizzard.plane[plane];
  804. int r;
  805. dev_dbg(blizzard.fbdev->dev,
  806. "plane %d orig_w %d orig_h %d out_w %d out_h %d\n",
  807. plane, orig_w, orig_h, out_w, out_h);
  808. if ((unsigned)plane > OMAPFB_PLANE_NUM)
  809. return -ENODEV;
  810. r = blizzard.int_ctrl->set_scale(plane, orig_w, orig_h, out_w, out_h);
  811. if (r < 0)
  812. return r;
  813. p->width = orig_w;
  814. p->height = orig_h;
  815. p->out_width = out_w;
  816. p->out_height = out_h;
  817. if (orig_w == out_w && orig_h == out_h)
  818. blizzard.vid_scaled &= ~(1 << plane);
  819. else
  820. blizzard.vid_scaled |= 1 << plane;
  821. return 0;
  822. }
  823. static int blizzard_set_rotate(int angle)
  824. {
  825. u32 l;
  826. l = blizzard_read_reg(BLIZZARD_PANEL_CONFIGURATION);
  827. l &= ~0x03;
  828. switch (angle) {
  829. case 0:
  830. l = l | 0x00;
  831. break;
  832. case 90:
  833. l = l | 0x03;
  834. break;
  835. case 180:
  836. l = l | 0x02;
  837. break;
  838. case 270:
  839. l = l | 0x01;
  840. break;
  841. default:
  842. return -EINVAL;
  843. }
  844. blizzard_write_reg(BLIZZARD_PANEL_CONFIGURATION, l);
  845. return 0;
  846. }
  847. static int blizzard_enable_plane(int plane, int enable)
  848. {
  849. if (enable)
  850. blizzard.enabled_planes |= 1 << plane;
  851. else
  852. blizzard.enabled_planes &= ~(1 << plane);
  853. return 0;
  854. }
  855. static int sync_handler(struct blizzard_request *req)
  856. {
  857. complete(req->par.sync);
  858. return REQ_COMPLETE;
  859. }
  860. static void blizzard_sync(void)
  861. {
  862. LIST_HEAD(req_list);
  863. struct blizzard_request *req;
  864. struct completion comp;
  865. req = alloc_req();
  866. req->handler = sync_handler;
  867. req->complete = NULL;
  868. init_completion(&comp);
  869. req->par.sync = &comp;
  870. list_add(&req->entry, &req_list);
  871. submit_req_list(&req_list);
  872. wait_for_completion(&comp);
  873. }
  874. static void blizzard_bind_client(struct omapfb_notifier_block *nb)
  875. {
  876. if (blizzard.update_mode == OMAPFB_MANUAL_UPDATE) {
  877. omapfb_notify_clients(blizzard.fbdev, OMAPFB_EVENT_READY);
  878. }
  879. }
  880. static int blizzard_set_update_mode(enum omapfb_update_mode mode)
  881. {
  882. if (unlikely(mode != OMAPFB_MANUAL_UPDATE &&
  883. mode != OMAPFB_AUTO_UPDATE &&
  884. mode != OMAPFB_UPDATE_DISABLED))
  885. return -EINVAL;
  886. if (mode == blizzard.update_mode)
  887. return 0;
  888. dev_info(blizzard.fbdev->dev, "s1d1374x: setting update mode to %s\n",
  889. mode == OMAPFB_UPDATE_DISABLED ? "disabled" :
  890. (mode == OMAPFB_AUTO_UPDATE ? "auto" : "manual"));
  891. switch (blizzard.update_mode) {
  892. case OMAPFB_MANUAL_UPDATE:
  893. omapfb_notify_clients(blizzard.fbdev, OMAPFB_EVENT_DISABLED);
  894. break;
  895. case OMAPFB_AUTO_UPDATE:
  896. blizzard.stop_auto_update = 1;
  897. del_timer_sync(&blizzard.auto_update_timer);
  898. break;
  899. case OMAPFB_UPDATE_DISABLED:
  900. break;
  901. }
  902. blizzard.update_mode = mode;
  903. blizzard_sync();
  904. blizzard.stop_auto_update = 0;
  905. switch (mode) {
  906. case OMAPFB_MANUAL_UPDATE:
  907. omapfb_notify_clients(blizzard.fbdev, OMAPFB_EVENT_READY);
  908. break;
  909. case OMAPFB_AUTO_UPDATE:
  910. blizzard_update_window_auto(0);
  911. break;
  912. case OMAPFB_UPDATE_DISABLED:
  913. break;
  914. }
  915. return 0;
  916. }
  917. static enum omapfb_update_mode blizzard_get_update_mode(void)
  918. {
  919. return blizzard.update_mode;
  920. }
  921. static inline void set_extif_timings(const struct extif_timings *t)
  922. {
  923. blizzard.extif->set_timings(t);
  924. }
  925. static inline unsigned long round_to_extif_ticks(unsigned long ps, int div)
  926. {
  927. int bus_tick = blizzard.extif_clk_period * div;
  928. return (ps + bus_tick - 1) / bus_tick * bus_tick;
  929. }
  930. static int calc_reg_timing(unsigned long sysclk, int div)
  931. {
  932. struct extif_timings *t;
  933. unsigned long systim;
  934. /* CSOnTime 0, WEOnTime 2 ns, REOnTime 2 ns,
  935. * AccessTime 2 ns + 12.2 ns (regs),
  936. * WEOffTime = WEOnTime + 1 ns,
  937. * REOffTime = REOnTime + 12 ns (regs),
  938. * CSOffTime = REOffTime + 1 ns
  939. * ReadCycle = 2ns + 2*SYSCLK (regs),
  940. * WriteCycle = 2*SYSCLK + 2 ns,
  941. * CSPulseWidth = 10 ns */
  942. systim = 1000000000 / (sysclk / 1000);
  943. dev_dbg(blizzard.fbdev->dev,
  944. "Blizzard systim %lu ps extif_clk_period %u div %d\n",
  945. systim, blizzard.extif_clk_period, div);
  946. t = &blizzard.reg_timings;
  947. memset(t, 0, sizeof(*t));
  948. t->clk_div = div;
  949. t->cs_on_time = 0;
  950. t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
  951. t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
  952. t->access_time = round_to_extif_ticks(t->re_on_time + 12200, div);
  953. t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div);
  954. t->re_off_time = round_to_extif_ticks(t->re_on_time + 13000, div);
  955. t->cs_off_time = round_to_extif_ticks(t->re_off_time + 1000, div);
  956. t->we_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
  957. if (t->we_cycle_time < t->we_off_time)
  958. t->we_cycle_time = t->we_off_time;
  959. t->re_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
  960. if (t->re_cycle_time < t->re_off_time)
  961. t->re_cycle_time = t->re_off_time;
  962. t->cs_pulse_width = 0;
  963. dev_dbg(blizzard.fbdev->dev, "[reg]cson %d csoff %d reon %d reoff %d\n",
  964. t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
  965. dev_dbg(blizzard.fbdev->dev, "[reg]weon %d weoff %d recyc %d wecyc %d\n",
  966. t->we_on_time, t->we_off_time, t->re_cycle_time,
  967. t->we_cycle_time);
  968. dev_dbg(blizzard.fbdev->dev, "[reg]rdaccess %d cspulse %d\n",
  969. t->access_time, t->cs_pulse_width);
  970. return blizzard.extif->convert_timings(t);
  971. }
  972. static int calc_lut_timing(unsigned long sysclk, int div)
  973. {
  974. struct extif_timings *t;
  975. unsigned long systim;
  976. /* CSOnTime 0, WEOnTime 2 ns, REOnTime 2 ns,
  977. * AccessTime 2 ns + 4 * SYSCLK + 26 (lut),
  978. * WEOffTime = WEOnTime + 1 ns,
  979. * REOffTime = REOnTime + 4*SYSCLK + 26 ns (lut),
  980. * CSOffTime = REOffTime + 1 ns
  981. * ReadCycle = 2ns + 4*SYSCLK + 26 ns (lut),
  982. * WriteCycle = 2*SYSCLK + 2 ns,
  983. * CSPulseWidth = 10 ns */
  984. systim = 1000000000 / (sysclk / 1000);
  985. dev_dbg(blizzard.fbdev->dev,
  986. "Blizzard systim %lu ps extif_clk_period %u div %d\n",
  987. systim, blizzard.extif_clk_period, div);
  988. t = &blizzard.lut_timings;
  989. memset(t, 0, sizeof(*t));
  990. t->clk_div = div;
  991. t->cs_on_time = 0;
  992. t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
  993. t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div);
  994. t->access_time = round_to_extif_ticks(t->re_on_time + 4 * systim +
  995. 26000, div);
  996. t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div);
  997. t->re_off_time = round_to_extif_ticks(t->re_on_time + 4 * systim +
  998. 26000, div);
  999. t->cs_off_time = round_to_extif_ticks(t->re_off_time + 1000, div);
  1000. t->we_cycle_time = round_to_extif_ticks(2 * systim + 2000, div);
  1001. if (t->we_cycle_time < t->we_off_time)
  1002. t->we_cycle_time = t->we_off_time;
  1003. t->re_cycle_time = round_to_extif_ticks(2000 + 4 * systim + 26000, div);
  1004. if (t->re_cycle_time < t->re_off_time)
  1005. t->re_cycle_time = t->re_off_time;
  1006. t->cs_pulse_width = 0;
  1007. dev_dbg(blizzard.fbdev->dev,
  1008. "[lut]cson %d csoff %d reon %d reoff %d\n",
  1009. t->cs_on_time, t->cs_off_time, t->re_on_time, t->re_off_time);
  1010. dev_dbg(blizzard.fbdev->dev,
  1011. "[lut]weon %d weoff %d recyc %d wecyc %d\n",
  1012. t->we_on_time, t->we_off_time, t->re_cycle_time,
  1013. t->we_cycle_time);
  1014. dev_dbg(blizzard.fbdev->dev, "[lut]rdaccess %d cspulse %d\n",
  1015. t->access_time, t->cs_pulse_width);
  1016. return blizzard.extif->convert_timings(t);
  1017. }
  1018. static int calc_extif_timings(unsigned long sysclk, int *extif_mem_div)
  1019. {
  1020. int max_clk_div;
  1021. int div;
  1022. blizzard.extif->get_clk_info(&blizzard.extif_clk_period, &max_clk_div);
  1023. for (div = 1; div <= max_clk_div; div++) {
  1024. if (calc_reg_timing(sysclk, div) == 0)
  1025. break;
  1026. }
  1027. if (div > max_clk_div) {
  1028. dev_dbg(blizzard.fbdev->dev, "reg timing failed\n");
  1029. goto err;
  1030. }
  1031. *extif_mem_div = div;
  1032. for (div = 1; div <= max_clk_div; div++) {
  1033. if (calc_lut_timing(sysclk, div) == 0)
  1034. break;
  1035. }
  1036. if (div > max_clk_div)
  1037. goto err;
  1038. blizzard.extif_clk_div = div;
  1039. return 0;
  1040. err:
  1041. dev_err(blizzard.fbdev->dev, "can't setup timings\n");
  1042. return -1;
  1043. }
  1044. static void calc_blizzard_clk_rates(unsigned long ext_clk,
  1045. unsigned long *sys_clk, unsigned long *pix_clk)
  1046. {
  1047. int pix_clk_src;
  1048. int sys_div = 0, sys_mul = 0;
  1049. int pix_div;
  1050. pix_clk_src = blizzard_read_reg(BLIZZARD_CLK_SRC);
  1051. pix_div = ((pix_clk_src >> 3) & 0x1f) + 1;
  1052. if ((pix_clk_src & (0x3 << 1)) == 0) {
  1053. /* Source is the PLL */
  1054. sys_div = (blizzard_read_reg(BLIZZARD_PLL_DIV) & 0x3f) + 1;
  1055. sys_mul = blizzard_read_reg(BLIZZARD_PLL_CLOCK_SYNTH_0);
  1056. sys_mul |= ((blizzard_read_reg(BLIZZARD_PLL_CLOCK_SYNTH_1)
  1057. & 0x0f) << 11);
  1058. *sys_clk = ext_clk * sys_mul / sys_div;
  1059. } else /* else source is ext clk, or oscillator */
  1060. *sys_clk = ext_clk;
  1061. *pix_clk = *sys_clk / pix_div; /* HZ */
  1062. dev_dbg(blizzard.fbdev->dev,
  1063. "ext_clk %ld pix_src %d pix_div %d sys_div %d sys_mul %d\n",
  1064. ext_clk, pix_clk_src & (0x3 << 1), pix_div, sys_div, sys_mul);
  1065. dev_dbg(blizzard.fbdev->dev, "sys_clk %ld pix_clk %ld\n",
  1066. *sys_clk, *pix_clk);
  1067. }
  1068. static int setup_tearsync(unsigned long pix_clk, int extif_div)
  1069. {
  1070. int hdisp, vdisp;
  1071. int hndp, vndp;
  1072. int hsw, vsw;
  1073. int hs, vs;
  1074. int hs_pol_inv, vs_pol_inv;
  1075. int use_hsvs, use_ndp;
  1076. u8 b;
  1077. hsw = blizzard_read_reg(BLIZZARD_HSW);
  1078. vsw = blizzard_read_reg(BLIZZARD_VSW);
  1079. hs_pol_inv = !(hsw & 0x80);
  1080. vs_pol_inv = !(vsw & 0x80);
  1081. hsw = hsw & 0x7f;
  1082. vsw = vsw & 0x3f;
  1083. hdisp = blizzard_read_reg(BLIZZARD_HDISP) * 8;
  1084. vdisp = blizzard_read_reg(BLIZZARD_VDISP0) +
  1085. ((blizzard_read_reg(BLIZZARD_VDISP1) & 0x3) << 8);
  1086. hndp = blizzard_read_reg(BLIZZARD_HNDP) & 0x3f;
  1087. vndp = blizzard_read_reg(BLIZZARD_VNDP);
  1088. /* time to transfer one pixel (16bpp) in ps */
  1089. blizzard.pix_tx_time = blizzard.reg_timings.we_cycle_time;
  1090. if (blizzard.extif->get_max_tx_rate != NULL) {
  1091. /* The external interface might have a rate limitation,
  1092. * if so, we have to maximize our transfer rate.
  1093. */
  1094. unsigned long min_tx_time;
  1095. unsigned long max_tx_rate = blizzard.extif->get_max_tx_rate();
  1096. dev_dbg(blizzard.fbdev->dev, "max_tx_rate %ld HZ\n",
  1097. max_tx_rate);
  1098. min_tx_time = 1000000000 / (max_tx_rate / 1000); /* ps */
  1099. if (blizzard.pix_tx_time < min_tx_time)
  1100. blizzard.pix_tx_time = min_tx_time;
  1101. }
  1102. /* time to update one line in ps */
  1103. blizzard.line_upd_time = (hdisp + hndp) * 1000000 / (pix_clk / 1000);
  1104. blizzard.line_upd_time *= 1000;
  1105. if (hdisp * blizzard.pix_tx_time > blizzard.line_upd_time)
  1106. /* transfer speed too low, we might have to use both
  1107. * HS and VS */
  1108. use_hsvs = 1;
  1109. else
  1110. /* decent transfer speed, we'll always use only VS */
  1111. use_hsvs = 0;
  1112. if (use_hsvs && (hs_pol_inv || vs_pol_inv)) {
  1113. /* HS or'ed with VS doesn't work, use the active high
  1114. * TE signal based on HNDP / VNDP */
  1115. use_ndp = 1;
  1116. hs_pol_inv = 0;
  1117. vs_pol_inv = 0;
  1118. hs = hndp;
  1119. vs = vndp;
  1120. } else {
  1121. /* Use HS or'ed with VS as a TE signal if both are needed
  1122. * or VNDP if only vsync is needed. */
  1123. use_ndp = 0;
  1124. hs = hsw;
  1125. vs = vsw;
  1126. if (!use_hsvs) {
  1127. hs_pol_inv = 0;
  1128. vs_pol_inv = 0;
  1129. }
  1130. }
  1131. hs = hs * 1000000 / (pix_clk / 1000); /* ps */
  1132. hs *= 1000;
  1133. vs = vs * (hdisp + hndp) * 1000000 / (pix_clk / 1000); /* ps */
  1134. vs *= 1000;
  1135. if (vs <= hs)
  1136. return -EDOM;
  1137. /* set VS to 120% of HS to minimize VS detection time */
  1138. vs = hs * 12 / 10;
  1139. /* minimize HS too */
  1140. if (hs > 10000)
  1141. hs = 10000;
  1142. b = blizzard_read_reg(BLIZZARD_NDISP_CTRL_STATUS);
  1143. b &= ~0x3;
  1144. b |= use_hsvs ? 1 : 0;
  1145. b |= (use_ndp && use_hsvs) ? 0 : 2;
  1146. blizzard_write_reg(BLIZZARD_NDISP_CTRL_STATUS, b);
  1147. blizzard.vsync_only = !use_hsvs;
  1148. dev_dbg(blizzard.fbdev->dev,
  1149. "pix_clk %ld HZ pix_tx_time %ld ps line_upd_time %ld ps\n",
  1150. pix_clk, blizzard.pix_tx_time, blizzard.line_upd_time);
  1151. dev_dbg(blizzard.fbdev->dev,
  1152. "hs %d ps vs %d ps mode %d vsync_only %d\n",
  1153. hs, vs, b & 0x3, !use_hsvs);
  1154. return blizzard.extif->setup_tearsync(1, hs, vs,
  1155. hs_pol_inv, vs_pol_inv,
  1156. extif_div);
  1157. }
  1158. static void blizzard_get_caps(int plane, struct omapfb_caps *caps)
  1159. {
  1160. blizzard.int_ctrl->get_caps(plane, caps);
  1161. caps->ctrl |= OMAPFB_CAPS_MANUAL_UPDATE |
  1162. OMAPFB_CAPS_WINDOW_PIXEL_DOUBLE |
  1163. OMAPFB_CAPS_WINDOW_SCALE |
  1164. OMAPFB_CAPS_WINDOW_OVERLAY |
  1165. OMAPFB_CAPS_WINDOW_ROTATE;
  1166. if (blizzard.te_connected)
  1167. caps->ctrl |= OMAPFB_CAPS_TEARSYNC;
  1168. caps->wnd_color |= (1 << OMAPFB_COLOR_RGB565) |
  1169. (1 << OMAPFB_COLOR_YUV420);
  1170. }
  1171. static void _save_regs(const struct blizzard_reg_list *list, int cnt)
  1172. {
  1173. int i;
  1174. for (i = 0; i < cnt; i++, list++) {
  1175. int reg;
  1176. for (reg = list->start; reg <= list->end; reg += 2)
  1177. blizzard_reg_cache[reg / 2] = blizzard_read_reg(reg);
  1178. }
  1179. }
  1180. static void _restore_regs(const struct blizzard_reg_list *list, int cnt)
  1181. {
  1182. int i;
  1183. for (i = 0; i < cnt; i++, list++) {
  1184. int reg;
  1185. for (reg = list->start; reg <= list->end; reg += 2)
  1186. blizzard_write_reg(reg, blizzard_reg_cache[reg / 2]);
  1187. }
  1188. }
  1189. static void blizzard_save_all_regs(void)
  1190. {
  1191. _save_regs(blizzard_pll_regs, ARRAY_SIZE(blizzard_pll_regs));
  1192. _save_regs(blizzard_gen_regs, ARRAY_SIZE(blizzard_gen_regs));
  1193. }
  1194. static void blizzard_restore_pll_regs(void)
  1195. {
  1196. _restore_regs(blizzard_pll_regs, ARRAY_SIZE(blizzard_pll_regs));
  1197. }
  1198. static void blizzard_restore_gen_regs(void)
  1199. {
  1200. _restore_regs(blizzard_gen_regs, ARRAY_SIZE(blizzard_gen_regs));
  1201. }
  1202. static void blizzard_suspend(void)
  1203. {
  1204. u32 l;
  1205. unsigned long tmo;
  1206. if (blizzard.last_color_mode) {
  1207. update_full_screen();
  1208. blizzard_sync();
  1209. }
  1210. blizzard.update_mode_before_suspend = blizzard.update_mode;
  1211. /* the following will disable clocks as well */
  1212. blizzard_set_update_mode(OMAPFB_UPDATE_DISABLED);
  1213. blizzard_save_all_regs();
  1214. blizzard_stop_sdram();
  1215. l = blizzard_read_reg(BLIZZARD_POWER_SAVE);
  1216. /* Standby, Sleep. We assume we use an external clock. */
  1217. l |= 0x03;
  1218. blizzard_write_reg(BLIZZARD_POWER_SAVE, l);
  1219. tmo = jiffies + msecs_to_jiffies(100);
  1220. while (!(blizzard_read_reg(BLIZZARD_PLL_MODE) & (1 << 1))) {
  1221. if (time_after(jiffies, tmo)) {
  1222. dev_err(blizzard.fbdev->dev,
  1223. "s1d1374x: sleep timeout, stopping PLL manually\n");
  1224. l = blizzard_read_reg(BLIZZARD_PLL_MODE);
  1225. l &= ~0x03;
  1226. /* Disable PLL, counter function */
  1227. l |= 0x2;
  1228. blizzard_write_reg(BLIZZARD_PLL_MODE, l);
  1229. break;
  1230. }
  1231. msleep(1);
  1232. }
  1233. if (blizzard.power_down != NULL)
  1234. blizzard.power_down(blizzard.fbdev->dev);
  1235. }
  1236. static void blizzard_resume(void)
  1237. {
  1238. u32 l;
  1239. if (blizzard.power_up != NULL)
  1240. blizzard.power_up(blizzard.fbdev->dev);
  1241. l = blizzard_read_reg(BLIZZARD_POWER_SAVE);
  1242. /* Standby, Sleep */
  1243. l &= ~0x03;
  1244. blizzard_write_reg(BLIZZARD_POWER_SAVE, l);
  1245. blizzard_restore_pll_regs();
  1246. l = blizzard_read_reg(BLIZZARD_PLL_MODE);
  1247. l &= ~0x03;
  1248. /* Enable PLL, counter function */
  1249. l |= 0x1;
  1250. blizzard_write_reg(BLIZZARD_PLL_MODE, l);
  1251. while (!(blizzard_read_reg(BLIZZARD_PLL_DIV) & (1 << 7)))
  1252. msleep(1);
  1253. blizzard_restart_sdram();
  1254. blizzard_restore_gen_regs();
  1255. /* Enable display */
  1256. blizzard_write_reg(BLIZZARD_DISPLAY_MODE, 0x01);
  1257. /* the following will enable clocks as necessary */
  1258. blizzard_set_update_mode(blizzard.update_mode_before_suspend);
  1259. /* Force a background update */
  1260. blizzard.zoom_on = 1;
  1261. update_full_screen();
  1262. blizzard_sync();
  1263. }
  1264. static int blizzard_init(struct omapfb_device *fbdev, int ext_mode,
  1265. struct omapfb_mem_desc *req_vram)
  1266. {
  1267. int r = 0, i;
  1268. u8 rev, conf;
  1269. unsigned long ext_clk;
  1270. int extif_div;
  1271. unsigned long sys_clk, pix_clk;
  1272. struct omapfb_platform_data *omapfb_conf;
  1273. struct blizzard_platform_data *ctrl_conf;
  1274. blizzard.fbdev = fbdev;
  1275. BUG_ON(!fbdev->ext_if || !fbdev->int_ctrl);
  1276. blizzard.fbdev = fbdev;
  1277. blizzard.extif = fbdev->ext_if;
  1278. blizzard.int_ctrl = fbdev->int_ctrl;
  1279. omapfb_conf = fbdev->dev->platform_data;
  1280. ctrl_conf = omapfb_conf->ctrl_platform_data;
  1281. if (ctrl_conf == NULL || ctrl_conf->get_clock_rate == NULL) {
  1282. dev_err(fbdev->dev, "s1d1374x: missing platform data\n");
  1283. r = -ENOENT;
  1284. goto err1;
  1285. }
  1286. blizzard.power_down = ctrl_conf->power_down;
  1287. blizzard.power_up = ctrl_conf->power_up;
  1288. spin_lock_init(&blizzard.req_lock);
  1289. if ((r = blizzard.int_ctrl->init(fbdev, 1, req_vram)) < 0)
  1290. goto err1;
  1291. if ((r = blizzard.extif->init(fbdev)) < 0)
  1292. goto err2;
  1293. blizzard_ctrl.set_color_key = blizzard.int_ctrl->set_color_key;
  1294. blizzard_ctrl.get_color_key = blizzard.int_ctrl->get_color_key;
  1295. blizzard_ctrl.setup_mem = blizzard.int_ctrl->setup_mem;
  1296. blizzard_ctrl.mmap = blizzard.int_ctrl->mmap;
  1297. ext_clk = ctrl_conf->get_clock_rate(fbdev->dev);
  1298. if ((r = calc_extif_timings(ext_clk, &extif_div)) < 0)
  1299. goto err3;
  1300. set_extif_timings(&blizzard.reg_timings);
  1301. if (blizzard.power_up != NULL)
  1302. blizzard.power_up(fbdev->dev);
  1303. calc_blizzard_clk_rates(ext_clk, &sys_clk, &pix_clk);
  1304. if ((r = calc_extif_timings(sys_clk, &extif_div)) < 0)
  1305. goto err3;
  1306. set_extif_timings(&blizzard.reg_timings);
  1307. if (!(blizzard_read_reg(BLIZZARD_PLL_DIV) & 0x80)) {
  1308. dev_err(fbdev->dev,
  1309. "controller not initialized by the bootloader\n");
  1310. r = -ENODEV;
  1311. goto err3;
  1312. }
  1313. if (ctrl_conf->te_connected) {
  1314. if ((r = setup_tearsync(pix_clk, extif_div)) < 0)
  1315. goto err3;
  1316. blizzard.te_connected = 1;
  1317. }
  1318. rev = blizzard_read_reg(BLIZZARD_REV_CODE);
  1319. conf = blizzard_read_reg(BLIZZARD_CONFIG);
  1320. switch (rev & 0xfc) {
  1321. case 0x9c:
  1322. blizzard.version = BLIZZARD_VERSION_S1D13744;
  1323. pr_info("omapfb: s1d13744 LCD controller rev %d "
  1324. "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
  1325. break;
  1326. case 0xa4:
  1327. blizzard.version = BLIZZARD_VERSION_S1D13745;
  1328. pr_info("omapfb: s1d13745 LCD controller rev %d "
  1329. "initialized (CNF pins %x)\n", rev & 0x03, conf & 0x07);
  1330. break;
  1331. default:
  1332. dev_err(fbdev->dev, "invalid s1d1374x revision %02x\n",
  1333. rev);
  1334. r = -ENODEV;
  1335. goto err3;
  1336. }
  1337. blizzard.max_transmit_size = blizzard.extif->max_transmit_size;
  1338. blizzard.update_mode = OMAPFB_UPDATE_DISABLED;
  1339. blizzard.auto_update_window.x = 0;
  1340. blizzard.auto_update_window.y = 0;
  1341. blizzard.auto_update_window.width = fbdev->panel->x_res;
  1342. blizzard.auto_update_window.height = fbdev->panel->y_res;
  1343. blizzard.auto_update_window.out_x = 0;
  1344. blizzard.auto_update_window.out_x = 0;
  1345. blizzard.auto_update_window.out_width = fbdev->panel->x_res;
  1346. blizzard.auto_update_window.out_height = fbdev->panel->y_res;
  1347. blizzard.auto_update_window.format = 0;
  1348. blizzard.screen_width = fbdev->panel->x_res;
  1349. blizzard.screen_height = fbdev->panel->y_res;
  1350. init_timer(&blizzard.auto_update_timer);
  1351. blizzard.auto_update_timer.function = blizzard_update_window_auto;
  1352. blizzard.auto_update_timer.data = 0;
  1353. INIT_LIST_HEAD(&blizzard.free_req_list);
  1354. INIT_LIST_HEAD(&blizzard.pending_req_list);
  1355. for (i = 0; i < ARRAY_SIZE(blizzard.req_pool); i++)
  1356. list_add(&blizzard.req_pool[i].entry, &blizzard.free_req_list);
  1357. BUG_ON(i <= IRQ_REQ_POOL_SIZE);
  1358. sema_init(&blizzard.req_sema, i - IRQ_REQ_POOL_SIZE);
  1359. return 0;
  1360. err3:
  1361. if (blizzard.power_down != NULL)
  1362. blizzard.power_down(fbdev->dev);
  1363. blizzard.extif->cleanup();
  1364. err2:
  1365. blizzard.int_ctrl->cleanup();
  1366. err1:
  1367. return r;
  1368. }
  1369. static void blizzard_cleanup(void)
  1370. {
  1371. blizzard_set_update_mode(OMAPFB_UPDATE_DISABLED);
  1372. blizzard.extif->cleanup();
  1373. blizzard.int_ctrl->cleanup();
  1374. if (blizzard.power_down != NULL)
  1375. blizzard.power_down(blizzard.fbdev->dev);
  1376. }
  1377. struct lcd_ctrl blizzard_ctrl = {
  1378. .name = "blizzard",
  1379. .init = blizzard_init,
  1380. .cleanup = blizzard_cleanup,
  1381. .bind_client = blizzard_bind_client,
  1382. .get_caps = blizzard_get_caps,
  1383. .set_update_mode = blizzard_set_update_mode,
  1384. .get_update_mode = blizzard_get_update_mode,
  1385. .setup_plane = blizzard_setup_plane,
  1386. .set_scale = blizzard_set_scale,
  1387. .enable_plane = blizzard_enable_plane,
  1388. .set_rotate = blizzard_set_rotate,
  1389. .update_window = blizzard_update_window_async,
  1390. .sync = blizzard_sync,
  1391. .suspend = blizzard_suspend,
  1392. .resume = blizzard_resume,
  1393. };