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/MSP-EXP430FR5969/MSP-EXP430FR5969_I2CF_SoftM_to_LCD_2x20.4th

https://gitlab.com/Jean-Michel/FastForthForMSP430fr5xxx
Forth | 673 lines | 614 code | 59 blank | 0 comment | 24 complexity | f2239982a2b867dafadcac6e17ffeea8 MD5 | raw file
Possible License(s): GPL-3.0
  1. ; -------------------------------------------
  2. ; MSP-EXP430FR5969_I2CF_SoftM_to_LCD_2x20.4th
  3. ; -------------------------------------------
  4. STOP ; to stop any interrupt in progress
  5. WIPE ;
  6. NOECHO ; comment to debug
  7. ; FORTH source file
  8. ; Copyright (C) <2016> <J.M. THOORENS>
  9. ;
  10. ; This program is free software: you can redistribute it and/or modify
  11. ; it under the terms of the GNU General Public License as published by
  12. ; the Free Software Foundation, either version 3 of the License, or
  13. ; (at your option) any later version.
  14. ;
  15. ; This program is distributed in the hope that it will be useful,
  16. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. ; GNU General Public License for more details.
  19. ;
  20. ; You should have received a copy of the GNU General Public License
  21. ; along with this program. If not, see <http://www.gnu.org/licenses/>.
  22. ; ========================================
  23. ; DEMO : I2C_SLAVE WRITE & I2C_MASTER READ
  24. ; I2C_MASTER PART
  25. ; ========================================
  26. ; load this MSP-EXP430FR5969_I2C_Soft_Master_to_LCD_2x20.4th file on the first LAUNCHPAD
  27. ; load MSP-EXP430FR5969_RC5_to_I2C_Slave.4th on the other LAUNCHPAD
  28. ; target : MSP-EXP430fr5969 LAUNCHPAD
  29. ; ===================================================================================
  30. ; in case of 3.3V powered by UARTtoUSB bridge, open J13 straps {RST,TST,V+,5V} BEFORE
  31. ; ===================================================================================
  32. ; -----------------------------------------------
  33. ; MSP - MSP-EXP430fr5969 <--> OUTPUT WORLD
  34. ; -----------------------------------------------
  35. ; P4.6 - J6 - LED1 red
  36. ; P1.0 - LED2 green
  37. ; P4.5 - Switch S1 <--- LCD contrast + (finger :-)
  38. ; P1.1 - Switch S2 <--- LCD contrast - (finger ;-)
  39. ; GND - J1.2 <-------+---0V0----------> 1 LCD_Vss
  40. ; VCC - J1.3 >------ | --3V6-----+----> 2 LCD_Vdd
  41. ; | |
  42. ; |___ 470n ---
  43. ; ^ | ---
  44. ; / \ BAT54 |
  45. ; --- |
  46. ; 100n | 2k2 |
  47. ; P2.2 - J4.7 UCB0 CLK TB0.2 >---||--+--^/\/\/v--+----> 3 LCD_Vo (=0V6 without modulation)
  48. ; P3.4 - J4.8 -------------------------> 4 LCD_RS
  49. ; P3.5 - J4.9 -------------------------> 5 LCD_R/W
  50. ; P3.6 - J4.10 -------------------------> 6 LCD_EN0
  51. ; PJ.0 - J3.1 <------------------------> 11 LCD_DB4
  52. ; PJ.1 - J3.3 <------------------------> 12 LCD_DB5
  53. ; PJ.2 - J3.5 <------------------------> 13 LCD_DB5
  54. ; PJ.3 - J3.7 <------------------------> 14 LCD_DB7
  55. ; P2.0 - J13.8 UCA0 TXD ---> RX UARTtoUSB bridge
  56. ; P2.1 - J13.10 UCA0 RXD <--- TX UARTtoUSB bridge
  57. ; P4.1 - J13.14 RTS ---> CTS UARTtoUSB bridge (optional hardware control flow)
  58. ; VCC - J13.16 <--- VCC (optional supply from UARTtoUSB bridge - WARNING ! 3.3V !)
  59. ; GND - J13.20 <--> GND (optional supply from UARTtoUSB bridge)
  60. ; VCC - J11.1 ---> VCC SD_CardAdapter
  61. ; GND - J12.3 <--> GND SD_CardAdapter
  62. ; P2.4 - J4.6 UCA1 CLK ---> CLK SD_CardAdapter (SCK)
  63. ; P4.3 - J4.5 ---> CS SD_CardAdapter (Card Select)
  64. ; P2.5 - J4.4 UCA1 TXD/SIMO ---> SDI SD_CardAdapter (MOSI)
  65. ; P2.6 - J4.3 UCA1 RXD/SOMI <--- SDO SD_CardAdapter (MISO)
  66. ; P4.2 - J4.2 <--- CD SD_CardAdapter (Card Detect)
  67. ; P4.0 - J3.10 \\\<--- OUT IR_Receiver (1 TSOP32236)
  68. ; VCC - J3.2 \\\---> VCC IR_Receiver (2 TSOP32236)
  69. ; GND - J3.9 \\\<--> GND IR_Receiver (3 TSOP32236)
  70. ; PJ.4 - LFXI 32768Hz quartz
  71. ; PJ.5 - LFXO 32768Hz quartz
  72. ; PJ.6 - HFXI
  73. ; PJ.7 - HFXO
  74. ; P1.2 - J5.19 Soft I2C_Master <--> SDA <--------------------------------------------------> SDA other LAUNCHPAD
  75. ; P1.3 - J5.11 Soft I2C_Master ---> SCL ---------------------------------------------------> SCL other LAUNCHPAD
  76. ; P1.4 - J5.12 TB0.1 <--> free
  77. ; P1.5 - J5.13 UCA0 CLK TB0.2 <--> free
  78. ; P1.6 - J5.15 UCB0 SDA/SIMO <--> SDA
  79. ; P1.7 - J5.14 UCB0 SCL/SOMI ---> SCL
  80. ; P3.0 - J5.7 <--- free
  81. ; P2.3 - NC
  82. ; P2.7 - NC
  83. ; P3.1 - NC
  84. ; P3.2 - NC
  85. ; P3.3 - NC
  86. ; P3.7 - NC
  87. ; P4.4 - NC
  88. ; P4.7 - NC
  89. ; HERE ; general minidump, part 1
  90. ; ******************************;
  91. CODE INT_P1 ; PORT1 interrupt routine, warning : not FORTH executable !
  92. ; ******************************;
  93. BIC #0xF8,0(RSP) ; CPU on, GIE off in retSR
  94. ; ------------------------------;
  95. BIT.B #0x02,&0x200 ; test P1IN.1 = switch S2
  96. BIC.B #0x02,&0x21C ; P1IFG.1 clear
  97. 0= IF ; case of switch S2 pressed
  98. CMP #34,&0x3D6 ; TB0CCR2 ; maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
  99. U< IF
  100. ADD #1,&0x3D6 ; TB0CCR2 ; action for switch S2 (P1.1) : 78 mV / increment
  101. THEN
  102. THEN
  103. RETI ;
  104. ENDCODE
  105. ; ******************************;
  106. CODE INT_P4 ; PORT4 interrupt routine, warning : not FORTH executable !
  107. ; ******************************;
  108. BIC #0xF8,0(RSP) ; CPU on, GIE off in retSR
  109. ; ------------------------------;
  110. BIT.B #0x20,&0x220 ; test P4IN.5 = switch S1
  111. BIC.B #0x20,&0x23D ; P4IFG.5 clear
  112. 0= IF ; case of Switch S1 pressed
  113. CMP #7,&0x3D6 ; TB0CCR2 ; mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
  114. U>= IF ;
  115. SUB #1,&0x3D6 ; TB0CCR2 ; action for switch S1 (P4.5) : -78 mV / decrement
  116. THEN ;
  117. THEN ;
  118. RETI ;
  119. ENDCODE
  120. ; ------------------------------;
  121. CODE 20_us ; n -- n * 20 us
  122. ; ------------------------------;
  123. BEGIN ; 3 cycles loop + 6~
  124. ; MOV #5,W ; 3 MCLK = 1 MHz
  125. ; MOV #23,W ; 3 MCLK = 4 MHz
  126. MOV #51,W ; 3 MCLK = 8 MHz
  127. ; MOV #104,W ; 3 MCLK = 16 MHz
  128. ; MOV #158,W ; 3 MCLK = 24 MHz
  129. BEGIN ; 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
  130. SUB #1,W ; 1
  131. 0= UNTIL ; 2
  132. SUB #1,TOS ; 1
  133. 0= UNTIL ; 2
  134. MOV @PSP+,TOS ; 2
  135. MOV @IP+,PC ; 4
  136. ENDCODE
  137. ; ------------------------------;
  138. CODE TOP_LCD ; LCD Sample
  139. ; ------------------------------; if write : 0bxxxxWWWW --
  140. ; ; if read : -- 0b0000RRRR
  141. BIS.B #0x40,&0x222 ; P3OUT.6 LCD_EN 0-->1
  142. BIT.B #0x20,&0x220 ; P3IN.5 LCD_RW test
  143. 0= IF ; write LCD bits pattern
  144. AND #0x0F,TOS ;
  145. MOV.B TOS, &0x322 ; MOVE LCD_Data bits to PJ(0-3)
  146. BIC.B #0x40,&0x222 ; P3OUT.6 LCD_EN 1-->0 ==> strobe data
  147. MOV @PSP+,TOS ;
  148. MOV @IP+,PC
  149. THEN ; read LCD bits pattern
  150. SUB #2,PSP
  151. MOV TOS,0(PSP)
  152. BIC.B #0x40,&0x222 ; P3OUT.6 LCD_EN 1-->0 ==> strobe data
  153. MOV.B &0x320,TOS ; get LCD_Data from PJ(0-3)
  154. AND.B #0x0F,TOS
  155. MOV @IP+,PC
  156. ENDCODE
  157. ; ------------------------------;
  158. CODE LCD_W ; byte -- write byte
  159. ; ------------------------------;
  160. SUB #2,PSP ;
  161. MOV TOS,0(PSP) ; -- 0bxxxxLLLL 0bHHHHLLLL
  162. RRUM #4,TOS ; -- 0bxxxxLLLL 0bxxxxHHHH
  163. BIC.B #0x20,&0x222 ; P3OUT.5 LCD_RW=0
  164. BIS.B #0x0F,&0x324 ; PJDIR.(0-3) LCD_Data as output
  165. PUSH IP
  166. ASM>FORTH
  167. TOP_LCD 2 20_us \ write high nibble first
  168. TOP_LCD 2 20_us ;
  169. ; ------------------------------;
  170. CODE LCD_R ; -- byte read byte
  171. ; ------------------------------;
  172. BIC.B #0x0F,&0x324 ; PJ.(0-3) LCD_Data as intput
  173. BIS.B #0x20,&0x222 ; P3.5 LCD_RW=1
  174. PUSH IP
  175. ASM>FORTH
  176. TOP_LCD 2 20_us \ read high nibble first
  177. TOP_LCD 2 20_us
  178. FORTH>ASM ; -- 0b0000HHHH 0b0000LLLL
  179. MOV @RSP+,IP
  180. MOV @PSP+,W ; W = high nibble
  181. RLAM #4,W ; -- 0b0000LLLL W = 0bHHHH0000
  182. ADD.B W,TOS
  183. MOV @IP+,PC
  184. ENDCODE
  185. ; ------------------------------;
  186. CODE LCD_WrF ; func -- Write fonction
  187. ; ------------------------------;
  188. BIC.B #0x10,&0x222 ; P3OUT.4 LCD_RS=0
  189. JMP LCD_W
  190. ENDCODE
  191. ; ------------------------------;
  192. CODE LCD_RdS ; -- status Read Status
  193. ; ------------------------------;
  194. BIC.B #0x10,&0x222 ; P3OUT.4 LCD_RS=0
  195. JMP LCD_R
  196. ENDCODE
  197. ; ------------------------------;
  198. CODE LCD_WrC ; char -- Write char
  199. ; ------------------------------;
  200. BIS.B #0x10,&0x222 ; P3OUT.4 LCD_RS=1
  201. JMP LCD_W
  202. ENDCODE
  203. ; ------------------------------;
  204. CODE LCD_RdC ; -- char Read char
  205. ; ------------------------------;
  206. BIS.B #0x10,&0x222 ; P3OUT.4 LCD_RS=1
  207. JMP LCD_R
  208. ENDCODE
  209. ; ------------------------------;
  210. \ : LCD_Clear 0x01 LCD_WrF 80 20_us ; bad init !
  211. : LCD_Clear 0x01 LCD_WrF 100 20_us ;
  212. ; ------------------------------;
  213. : LCD_Home 0x02 LCD_WrF 80 20_us ;
  214. ; ------------------------------;
  215. ; : LCD_Entry_set 0x04 OR LCD_WrF ;
  216. ; : LCD_Display_Ctrl 0x08 OR LCD_WrF ;
  217. ; : LCD_Display_Shift 0x10 OR LCD_WrF ;
  218. ; : LCD_Fn_Set 0x20 OR LCD_WrF ;
  219. ; : LCD_CGRAM_Set 0x40 OR LCD_WrF ;
  220. ; : LCD_Goto 0x80 OR LCD_WrF ;
  221. ; -------------------------------------------------------------------------------------------------------------------;
  222. ; I2C soft MASTER, FAST MODE, 8MHz
  223. ; -------------------------------------------------------------------------------------------------------------------;
  224. ; P1.2 = SDA
  225. ; P1.3 = SCL
  226. ; use Px.0 to Px.3 for good timing at 8 MHz
  227. ; tested in RX and TX at 8 MHZ with 3k3 external pullup resistors
  228. ; results : speed in RX = TX = 270 kHz
  229. VARIABLE I2CSLV_ADR ; contents slave address & R/W
  230. VARIABLE I2CM_OUT ; buffer output, lentgh,DATA (low,HIGH)
  231. VARIABLE I2CM_IN ; buffer input, lentgh,DATA (low,HIGH)
  232. 2 ALLOT
  233. ; ; ------------------------------; _
  234. ; CODE M_SCL ; SCL _| |_
  235. ; ; ------------------------------; _
  236. ; BIC.B #0x08,&0x204 ; 3 l _^ P1DIR.3 release SCL (high)
  237. ; BEGIN ;
  238. ; BIT.B #0x08,&0x200 ; 3 h test if SCL is released
  239. ; 0<> UNTIL ; 2 h
  240. ; BIT.B #0x04,&0x200 ; 3 h _ P1IN.2 : get SDA
  241. ; BIS.B #0x08,&0x204 ; 3 h v_ P1DIR.3 as output : force SCL low
  242. ; MOV @RSP+,PC ; 4 l return: C = SDA pin
  243. ; ENDCODE ; l Z = slave Nack/Ack
  244. ; ; ------------------------------;
  245. ; ------------------------------;
  246. CODE I2C_MTX ; MASTER TX one byte ; shared code for address and TX data
  247. ; ------------------------------;
  248. BEGIN ;
  249. ADD.B X,X ; 1 l shift one left
  250. U>= IF ; 2 l carry set ?
  251. BIC.B #0x04,&0x204 ; 4 l yes : P1DIR.2 as input ==> SDA high because pull up resistor
  252. ELSE ; 2 l
  253. BIS.B #0x04,&0x204 ; 4 l no : P1DIR.2 as output ==> SDA low
  254. THEN ; l _
  255. BIC.B #0x08,&0x204 ; 4 l _^ P1DIR.3 release SCL (high)
  256. BEGIN ; 14/16~l
  257. BIT.B #0x08,&0x200 ; 3 h test if SCL is released
  258. 0<> UNTIL ; 2 h _
  259. BIS.B #0x08,&0x204 ; 4 h v_ P1DIR.3 as output : force SCL low
  260. SUB #1,W ; 1 l dec count of bits
  261. 0= UNTIL ; 2 l
  262. ; ------------------------------;
  263. ; I2C_Master_TXreadAckOrNack ; here, SDA is indetermined, SCL is strech low by master
  264. ; ------------------------------;
  265. BIC.B #0x04,&0x204 ; 3 l P1DIR.2 as input : release SDA high
  266. ; JMP M_SCL ; 2 l
  267. MOV @RSP+,PC ; 4 l
  268. ENDCODE ;
  269. ; ------------------------------;
  270. ; example of Fast_I2C_Soft_Master_8MHz routine under interrput
  271. ; first prepare interrupt return in normal mode by modifying retSR on first cell return stack
  272. ; then remplace all RET occurrence by RETI
  273. ; notice : with FastForthForMSP430fr5xxx, no need to save IP,U,W,X,V registers under interrupt
  274. ; ******************************;
  275. CODE I2C_M ; soft I2C_Master driver under WDT interrupt
  276. ; ******************************;
  277. BIC #0xF8,0(RSP) ; CPU on, GIE off in oldSR
  278. ; ------------------------------;
  279. ; ; in : I2CSLV_ADR & (R/W)
  280. ; ; : I2CM_IN/I2CM_OUT as requested by I2C_SLA_ADR(0)
  281. ; ; : I2CM_IN/I2CM_OUT(0) = count of datas to be TX/RX
  282. ; ; : I2CM_IN/I2CM_OUT(0) = 0 ==> send only I2C address
  283. ; ; used: U BUF_PTR
  284. ; ; V count of I2C datas exchanged
  285. ; ; W count of bits
  286. ; ; X data
  287. ; ; Y BUF_ORG
  288. ; ; out : I2CSLV_ADR & (R/W) unchanged
  289. ; ; Y = BUF_ORG
  290. ; ; U = BUF_PTR pointing on first data not exchanged
  291. ; ; V = count+1 of TX/RX datas exchanged (if ack on addr)
  292. ; ; I2CM_IN/OUT(0) = count of data not exchanged (normally = 0)
  293. ; ; I2CM_IN/OUT(0) = -1 <==> Nack on address
  294. ; ------------------------------;
  295. ; I2C_Master_Start_Cond: ; here, SDA and SCL are in idle state
  296. ; ------------------------------;
  297. BIS.B #0x04,&0x204 ; 4 l P1DIR.2 force SDA output (low)
  298. MOV.B &I2CSLV_ADR,X ; 3 h @ in X
  299. MOV #I2CM_OUT,U ; 2 h buffer out by default
  300. BIT.B #1,X ; 1 h test I2C R/w flag
  301. 0<> IF ; 2 h
  302. MOV #I2CM_IN,U ; 2 h buffer in
  303. THEN ;
  304. MOV U,Y ; 1 h U=BUF_ptr Y=BUF_org
  305. MOV.B @U+,V ; 2 h V = count of datas
  306. ; ; ------------------------------;
  307. ; ; Init M_TI2C first ! ; IP must be initialized
  308. ; ; ------------------------------;
  309. ; MOV #2,IP ; 1 h tHD:STA=4us, 15~ complement @ 8MHz
  310. ; ; MOV #13,IP ; 2 h tHD:STA=4us, 48~ complement @ 16MHz
  311. ; ; MOV #23,IP ; 2 h tHD:STA=4us, 78~ complement @ 24MHz
  312. ; ; ------------------------------;
  313. ; CALL #M_TI2C ; wait tHD;STA
  314. BIS.B #0x08,&0x204 ; 4 h P1DIR.3 force SCL output (low)
  315. ; ------------------------------; l
  316. ; I2C_Master_Start_EndOf: ;
  317. ; ------------------------------;
  318. ; I2C_Master_Send_address ; may be SCL is held low by slave
  319. ; ------------------------------;
  320. ADD #1,V ; 1 l to add address in count
  321. MOV #8,W ; 1 l prepare 8 bit Master writing
  322. ; ; ADD #0,IP ; 2 l tLOW=4,7us, 15~ complement @ 8MHz
  323. ; ; ADD #3,IP ; 2 l tLOW=4,7us, 54~ complement @ 16MHz
  324. ; ; ADD #4,IP ; 2 l tLOW=4,7us, 90~ complement @ 24MHz
  325. ; ------------------------------;
  326. CALL #I2C_MTX ; 4 l to send address
  327. ; ------------------------------;
  328. BEGIN ;
  329. ; ; ADD #0,IP ; 2 l +15~ complement @ 8MHz
  330. ; ; ADD #0,IP ; 2 l +45~ complement @ 16MHz
  331. ; ; ADD #0,IP ; 2 l +78~ complement @ 24MHz
  332. ; CALL #M_TI2C ; wait still tLOW=4,7us
  333. ; ------------------------------; l
  334. ; Master TX/RX ACK/NACK ;
  335. ; ------------------------------; l _
  336. ; CALL #M_SCL ; SCL _| |_ C flag = NACK
  337. BIC.B #0x08,&0x204 ; 3 l _^ P1DIR.3 release SCL (high)
  338. BEGIN ;
  339. BIT.B #0x08,&0x200 ; 3 h test if SCL is released
  340. 0<> UNTIL ; 2 h
  341. BIT.B #0x04,&0x200 ; 3 h _ P1IN.2 : get SDA
  342. BIS.B #0x08,&0x204 ; 3 h v_ P1DIR.3 as output : force SCL low
  343. ; ------------------------------; l
  344. ; I2C_Master_Loop_Data ;
  345. ; ------------------------------;
  346. 0<> IF BIS #2,SR ; 5 l if Nack (TX), force Z+1 ==> StopCond
  347. ELSE SUB.B #1,V ; 3 l else dec count
  348. THEN ; l
  349. ; --------------------------;
  350. ; I2C_Master_CheckCountDown ; count=0 or Nack received
  351. ; --------------------------;
  352. 0= IF ; 2 l count reached or Nack
  353. ; ----------------------;
  354. ; I2C_Master_StopCond ;
  355. ; ----------------------; _
  356. BIS.B #0x04,&0x204 ; SDA |_ P1DIR.2 as output ==> SDA low
  357. SUB.B V,0(Y) ; 4 l _ refresh buffer length
  358. BIC.B #0x08,&0x204 ; SCL _| P1DIR.3 release SCL (high)
  359. BEGIN ;
  360. BIT.B #0x08,&0x200 ; 3 h SCL released ?
  361. 0<> UNTIL ; 2 h
  362. ; CALL #M_TI2C ; _ wait tSU:STO=0.6us
  363. BIC.B #0x04,&0x204 ; SDA _| P1DIR.2 as input ==> SDA high with pull up resistor
  364. ; ----------------------;
  365. ; I2C_Master_Endof ;
  366. ; ----------------------;
  367. CMP.B #0,V ; V = 0 <==> count of read bytes = as expected
  368. = IF
  369. ; ------------------;
  370. BIS.B #0x40,&0x0223 ; P4.6 OUT high ==> switch ON LED1 to test
  371. ; display IR_RC5 command
  372. SUB #4,PSP ;
  373. MOV &BASE,2(PSP) ; save base
  374. MOV TOS,0(PSP) ;
  375. MOV.B 1(Y),TOS ;
  376. ASM>FORTH \ ; IP is free
  377. ['] LCD_CLEAR IS CR
  378. ['] LCD_WrC IS EMIT
  379. CR ." 0x" HEX 2 U.R
  380. ['] (CR) IS CR
  381. ['] (EMIT) IS EMIT
  382. FORTH>ASM ; nice code, right ?
  383. MOV @PSP+,&BASE
  384. ; endof display
  385. BIC.B #0x40,&0x0223 ; P4.6 OUT low ==> switch OFF LED1 to test
  386. THEN
  387. ; ----------------------;
  388. RETI ; ====> out of RC5_I2C interrupt toutine
  389. ; --------------------------;
  390. THEN ;
  391. ; --------------------------;
  392. MOV.B #8,W ; 1 l prepare 8 bits transaction
  393. BIT #1,&I2CSLV_ADR ; 3 l I2C_Master Read/write bit test
  394. 0= IF ; 2 l write flag test
  395. ; ======================;
  396. ; I2C_Master_TX ;
  397. ; ======================;
  398. MOV.B @U+,X ; 2 l next byte to transmit
  399. ; ; ADD #0,IP ; 2 l tLOW=4,7us, 15~ complement @ 8MHz
  400. ; ; SUB #3,IP ; 2 l tLOW=4,7us, 36~ complement @ 16MHz
  401. ; ; SUB #2,IP ; 2 l tLOW=4,7us, 72~ complement @ 24MHz
  402. ; ----------------------; 17 l
  403. CALL #I2C_MTX ; Master send 8 bits of address then release SDA
  404. ; ----------------------; 4 l
  405. ELSE ; l
  406. ; ======================;
  407. ; I2C_Master_RX: ; here, SDA is indetermined, SCL is strech low by master
  408. ; ======================;
  409. BEGIN ;
  410. BIC.B #0x04,&0x204 ; 4 l P1DIR.2 as input ==> release SDA high because pull up resistor
  411. ; ; ADD #0,IP ; 2 l tLOW=4,7us, 6~ complement @ 8MHz
  412. ; ; SUB #1,IP ; 2 l tLOW=4,7us, 42~ complement @ 16MHz
  413. ; ; ADD #1,IP ; 2 l tLOW=4,7us, 81~ complement @ 24MHz
  414. ; ; CALL #M_TI2C ; wait still tLOW
  415. ; --------------------; 8 l _
  416. ; CALL #M_SCL ; SCL _| |_
  417. BIC.B #0x08,&0x204 ; 3 l _^ P1DIR.3 release SCL (high)
  418. BEGIN ;
  419. BIT.B #0x08,&0x200 ; 3 h test if SCL is released
  420. 0<> UNTIL ; 2 h
  421. BIT.B #0x04,&0x200 ; 3 h _ P1IN.2 : get SDA
  422. BIS.B #0x08,&0x204 ; 3 h v_ P1DIR.3 as output : force SCL low
  423. ; --------------------; 4 l
  424. ADDC.B X,X ; 1 l C <-- X <--- C
  425. SUB #1,W ; 1 l count of bits
  426. 0= UNTIL ; 2 l
  427. MOV.B X,0(U) ; 3 l store byte @ BUF_ptr
  428. ADD #1,U ; 1 l
  429. ; ----------------------;
  430. ; I2C_MSendAckOrNack ; here, SDA is released by slave, SCL is strech low by master
  431. ; ----------------------;
  432. SUB.B #1,V ;
  433. 0<> IF ; 2
  434. BIS.B #0x04,&0x204 ; 4 l send Ack if byte count <> 1
  435. THEN ;
  436. THEN ;
  437. AGAIN ; 2 l
  438. ENDCODE ;
  439. ; ------------------------------;
  440. ; PORTA (P2:P1) MSP-EXP430FR5969 default I/O state : input with pullup resistors
  441. ; init PORTA (P2:P1) usage
  442. ; P1.0 --> LED2
  443. ; P1.1 <-- Switch S2
  444. ; P1.2 <-- SCL Soft MASTER
  445. ; P1.3 <-- SDA Soft MASTER
  446. ; P1.4 <-- free
  447. ; P1.5 <-- free
  448. ; P1.6 <-> SLAVE SDA
  449. ; P1.7 --> SLAVE SCL
  450. ; P2.0 --> UART0 TX
  451. ; P2.1 <-- UART0 RX
  452. ; P2.2 --> LCD_Vo
  453. ; P2.3 NC
  454. ; P2.4 <->
  455. ; P2.5 -->
  456. ; P2.6 <--
  457. ; P2.7 NC
  458. ; PORTB (P3:P4) MSP-EXP430FR5969 default I/O state : input with pullup resistors
  459. ; P3.0 <-- ADC12
  460. ; P3.1 NC
  461. ; P3.2 NC
  462. ; P3.3 NC
  463. ; P3.4 --> LCD_RS
  464. ; P3.5 --> LCD_RW
  465. ; P3.6 --> LCD_EN
  466. ; P3.7 NC
  467. ; P4.0 <-- TSOP32236 (IR_RC5 receiver)
  468. ; P4.1 --> UART0 /RTS
  469. ; P4.2 <--
  470. ; P4.3 -->
  471. ; P4.5 <-- Switch S1
  472. ; P4.6 --> LED1
  473. ; P4.7 NC
  474. ; PJ.0 <-- LCD_DB4
  475. ; PJ.1 <-- LCD_DB5
  476. ; PJ.2 <-- LCD_DB6
  477. ; PJ.3 <-- LCD_DB7
  478. ; PJ.4 <-- LFXIN 32.7638kHz
  479. ; PJ.5 --> LFXOUT 32.7638kHz
  480. ; PJ.6 <-> LFXIN free
  481. ; PJ.7 <-> LFXOUT free
  482. ; ------------------------------;
  483. CODE START ; initialize I2C_Soft_Master_to_LCD_2x20
  484. ; ------------------------------;
  485. ; ; set TimerB to generate LCD_V0 via TB0.1 and P1.4/P2.6
  486. ; MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int (8MHZ)
  487. ; ; MOV #0,&0x03E0 ; predivide by 1 in TB0EX0 register (8 MHZ)
  488. ; MOV #1,&0x03E0 ; predivide by 2 in TB0EX0 register (16 MHZ)
  489. ; ; MOV #2,&0x03E0 ; predivide by 3 in TB0EX0 register (24 MHZ)
  490. ; MOV #40,&0x3D2 ; TB0CCR0 = 40*0.5us=20us
  491. ; MOV #0b1100000,&0x3C4 ; TB0CCTL1 output mode = set/reset
  492. ; MOV #20,&0x3D4 ; TB0CCR1 ; contrast adjust : 20/40 ==> LCD_Vo = -1V1
  493. ; ; ------------------------------;
  494. ; set TimerB to generate LCD_V0 via TB0.2 and P1.5/P2.2
  495. MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int (8MHZ)
  496. MOV #0,&0x03E0 ; predivide by 1 in TB0EX0 register (8 MHZ)
  497. ; MOV #1,&0x03E0 ; predivide by 2 in TB0EX0 register (16 MHZ)
  498. ; MOV #2,&0x03E0 ; predivide by 3 in TB0EX0 register (24 MHZ)
  499. MOV #40,&0x3D2 ; TB0CCR0 = 40*0.5us=20us
  500. MOV #0b1100000,&0x3C6 ; TB0CCTL2 output mode = set/reset
  501. MOV #20,&0x3D6 ; TB0CCR2 ; contrast adjust : 20/40 ==> LCD_Vo = -1V1
  502. ; set TimerB to make 50kHz PWM ;
  503. ; ------------------------------;
  504. ; MOV #0b1000010100,&0x3C0 ; TB0CTL = SMCLK/1, up mode, clear timer, no int
  505. ; MOV #0,&0x03E0 ; predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
  506. ; ------------------------------;
  507. ; MOV #0b1000010100,&0x3C0 ; TB0CTL = SMCLK/1, up mode, clear timer, no int
  508. ; MOV #2,&0x03E0 ; predivide by 2 in TB0EX0 register (4 MHZ)
  509. ; ------------------------------;
  510. MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int
  511. MOV #0,&0x03E0 ; predivide by 1 in TB0EX0 register (8 MHZ)
  512. ; ------------------------------;
  513. ; MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int
  514. ; MOV #1,&0x03E0 ; predivide by 2 in TB0EX0 register (16 MHZ)
  515. ; ------------------------------;
  516. ; MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int
  517. ; MOV #3,&0x03E0 ; predivide by 3 in TB0EX0 register (24 MHZ)
  518. ; ------------------------------;
  519. MOV #40,&0x3D2 ; TB0CCR0 = 40*0.5us=20us (40us @ 1MHz)
  520. ; ------------------------------;
  521. ; set TimerB to generate LCD_V0 via TB0.2 and P1.5/P2.2
  522. ; ------------------------------;
  523. MOV #0b1100000,&0x3C6 ; TB0CCTL2 output mode = set/reset ; clear CCIFG
  524. MOV #20,&0x3D6 ; TB0CCR2 ; contrast adjust : 20/40 ==> LCD_Vo = -1V1
  525. ; ------------------------------;
  526. ; set TimerB to generate LCD_V0 via TB0.1 and P1.4/P2.6
  527. ; ------------------------------;
  528. ; MOV #0b1100000,&0x3C4 ; TB0CCTL1 output mode = set/reset
  529. ; MOV #20,&0x3D4 ; TB0CCR1 ; contrast adjust : 20/40 ==> LCD_Vo = -1V1
  530. ; ------------------------------;
  531. ; I2C_MASTER init part ;
  532. ; ------------------------------;
  533. MOV #0b0010100,&I2CSLV_ADR ; MSP430FR5738 slave address
  534. BIS #1,&I2CSLV_ADR ; to read slave
  535. MOV #1,&I2CM_IN ; one data expected
  536. ; ------------------------------;
  537. ; WDT interval init part ;
  538. ; ------------------------------;
  539. ; MOV #0x5A5E,&0x15C ; init WDT Vloclk source 10kHz /2^9 (50 ms), interval mode
  540. ; MOV #0x5A5D,&0x15C ; init WDT Vloclk source 10kHz /2^13 (820 ms), interval mode
  541. ; ------------------------------;
  542. BIS.B #0x10,&0x32A ; PJSEL0.4 = 1 starts LFXT on ACLK
  543. MOV #0x5A3D,&0x15C ; init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
  544. ; ------------------------------;
  545. BIS #1,&0x100 ; enable WDT interval mode interrupt in SFRIE
  546. ; ------------------------------;
  547. ; init interrupt vectors
  548. MOV #I2C_M,&0xFFF2 ; init WDT interval vector interrupt
  549. MOV #INT_P1,&0xFFDE ; init P1 interrupt vector
  550. MOV #INT_P4,&0xFFD0 ; init P4 interrupt vector
  551. ; ------------------------------;
  552. ; init PORTA (P2:P1) (complement) when reset occurs all I/O are set in input with resistors pullup
  553. BIC.B #0x0C,&0x202 ; P1OUT.23 preset SDA + SCL output low
  554. BIC.B #0x0C,&0x206 ; P1REN.23 SDA + SCL pullup/down disable
  555. BIS.B #0x02,&0x218 ; P1IES.1 high to low edge select (S2)
  556. BIC.B #0x02,&0x21C ; P1IFG.1 clear (after IES select) (S2)
  557. BIS.B #0x02,&0x21A ; P1IE.1 enable interrupt (S2)
  558. BIS.B #0x04,&0x205 ; P2DIR.2 TB0.2 output
  559. BIS.B #0x04,&0x20B ; P2SEL0.2 TB0.2
  560. ; ------------------------------;
  561. ; init PORTB (P4:P3) (complement) when reset occurs all I/O are set in input with resistors pullup
  562. BIS.B #0x70,&0x224 ; P3DIR.456 as outputs, wired to LCD_RS LCD_RW LCD_EN
  563. BIC.B #0x70,&0x226 ; P3REN.456 LCD_RS, LCD_RW, LCD_EN, pullup/down disable
  564. BIC.B #0x30,&0x222 ; P3OUT.45 LCD_RW = LCD_RS = 0
  565. BIS.B #0x20,&0x239 ; P4IES.5 high to low edge select
  566. BIC.B #0x20,&0x23D ; P4IFG.5 clear (after IES select)
  567. BIS.B #0x20,&0x23B ; P4IE.5 enable interrupt for S1
  568. ; ------------------------------;
  569. ; init PORTJ (PJ) (complement) when reset occurs all I/O are set in input with resistors pullup
  570. BIS.B #0x0F,&0x324 ; PJDIR.0123 as output, wired to DB.4567 LCD_Data
  571. BIC.B #0x0F,&0x326 ; PJREN.0123 LCD_Data pullup/down disable
  572. ; ------------------------------;
  573. ; Init LCD 2x20 ;
  574. ; ------------------------------;
  575. ASM>FORTH
  576. 0x03E8 20_us \ ; 1- wait 20 ms
  577. 0x03 TOP_LCD \ ; 2- send DB5=DB4=1
  578. 0xCD 20_us \ ; 3- wait 4,1 ms
  579. 0x03 TOP_LCD \ ; 4- send again DB5=DB4=1
  580. 5 20_us \ ; 5- wait 0,1 ms
  581. 0x03 TOP_LCD \ ; 6- send again again DB5=DB4=1
  582. 2 20_us \ ; wait 40 us = LCD cycle
  583. 0x02 TOP_LCD \ ; 7- send DB5=1 DB4=0
  584. 2 20_us \ ; wait 40 us = LCD cycle
  585. 0x28 LCD_WrF \ ; 8- 0b001DNFxx "FonctionSet" : D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
  586. 0x08 LCD_WrF \ ; 9- 0b1DCB "DisplayControl" : Display off, Cursor off, Blink off.
  587. LCD_Clear \ ; 10- "LCD_Clear"
  588. 0x06 LCD_WrF \ ; 11- 0b01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
  589. 0x0C LCD_WrF \ ; 12- 0b1DCB "DisplayControl" : Display on, Cursor off, Blink off.
  590. ['] LCD_WrC IS EMIT \ ;EMIT is redirected to LCD_WrC
  591. ." SYSRSTIV = " \ ;
  592. 0x1800 @ \ ;print SAVE_SYSRSTIV
  593. HEX 2 U.R \ ;(WARM) reinit decimal BASE and reset SAVE_SYSRSTIV
  594. ['] (EMIT) IS EMIT \ ;restore EMIT
  595. ." Type STOP to quit I2C_Fast_SoftMaster_to_LCD"
  596. LIT RECURSE IS WARM \ ; redirect WARM to START...
  597. (WARM) ; ; ...and finish START with (WARM)
  598. CODE STOP
  599. MOV #0b1010000100,&0x3C0 ; TB0CTL = SMCLK/4, STOP mode, clear timer, no int
  600. BIC.B #0x02,&0x21A ; P1IE.1 disable interrupt for S2
  601. BIC.B #0x20,&0x23B ; P4IE.5 disable interrupt for S1
  602. BIC #1,&0x100 ; disable WDT interval mode interrupt in SFRIE
  603. ASM>FORTH
  604. ['] (WARM) IS WARM \ ; reconnect WARM to (WARM)
  605. -1 ABORT"
  606. ; ; above, ABORT" followed by CRLF allows to compile an empty string...
  607. ; DUP HERE SWAP - DUMP ; general minidump, part 2
  608. FORGET INT_P1 FORGET INT_P4 ; not FORTH executable
  609. FORGET I2C_MTX FORGET I2C_M ; because not FORTH executable
  610. FORGET 20_us FORGET LCD_W ; because they are not necessary
  611. FORGET LCD_R FORGET TOP_LCD ; because they are not necessary
  612. ECHO
  613. RST_HERE
  614. START