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/MSP-EXP430FR5969/MSP-EXP430FR5969_I2C_SoftM_to_LCD_2x20.4th

https://gitlab.com/Jean-Michel/FastForthForMSP430fr5xxx
Forth | 668 lines | 612 code | 56 blank | 0 comment | 22 complexity | f3b545160fd2af9afdb62407ea92e162 MD5 | raw file
Possible License(s): GPL-3.0
  1. ; ------------------------------------------
  2. ; MSP-EXP430FR5969_I2C_SoftM_to_LCD_2x20.4th
  3. ; ------------------------------------------
  4. STOP ; to stop any interrupt in progress
  5. WIPE ;
  6. NOECHO ; comment to debug
  7. ; FORTH source file
  8. ; Copyright (C) <2015> <J.M. THOORENS>
  9. ;
  10. ; This program is free software: you can redistribute it and/or modify
  11. ; it under the terms of the GNU General Public License as published by
  12. ; the Free Software Foundation, either version 3 of the License, or
  13. ; (at your option) any later version.
  14. ;
  15. ; This program is distributed in the hope that it will be useful,
  16. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. ; GNU General Public License for more details.
  19. ;
  20. ; You should have received a copy of the GNU General Public License
  21. ; along with this program. If not, see <http://www.gnu.org/licenses/>.
  22. ; ========================================
  23. ; DEMO : I2C_SLAVE WRITE & I2C_MASTER READ
  24. ; I2C_MASTER PART
  25. ; ========================================
  26. ; load this MSP-EXP430FR5969_I2C_Soft_Master_to_LCD_2x20.4th file on the first LAUNCHPAD
  27. ; load MSP-EXP430FR5969_RC5_to_I2C_Slave.4th on the other LAUNCHPAD
  28. ; target : MSP-EXP430fr5969 LAUNCHPAD
  29. ; ===================================================================================
  30. ; in case of 3.3V powered by UARTtoUSB bridge, open J13 straps {RST,TST,V+,5V} BEFORE
  31. ; ===================================================================================
  32. ; -----------------------------------------------
  33. ; MSP - MSP-EXP430fr5969 <--> OUTPUT WORLD
  34. ; -----------------------------------------------
  35. ; P4.6 - J6 - LED1 red
  36. ; P1.0 - LED2 green
  37. ; P4.5 - Switch S1 <--- LCD contrast + (finger :-)
  38. ; P1.1 - Switch S2 <--- LCD contrast - (finger ;-)
  39. ; GND - J1.2 <-------+---0V0----------> 1 LCD_Vss
  40. ; VCC - J1.3 >------ | --3V6-----+----> 2 LCD_Vdd
  41. ; | |
  42. ; |___ 470n ---
  43. ; ^ | ---
  44. ; / \ BAT54 |
  45. ; --- |
  46. ; 100n | 2k2 |
  47. ; P2.2 - J4.7 UCB0 CLK TB0.2 >---||--+--^/\/\/v--+----> 3 LCD_Vo (=0V6 without modulation)
  48. ; P3.4 - J4.8 -------------------------> 4 LCD_RS
  49. ; P3.5 - J4.9 -------------------------> 5 LCD_R/W
  50. ; P3.6 - J4.10 -------------------------> 6 LCD_EN0
  51. ; PJ.0 - J3.1 <------------------------> 11 LCD_DB4
  52. ; PJ.1 - J3.3 <------------------------> 12 LCD_DB5
  53. ; PJ.2 - J3.5 <------------------------> 13 LCD_DB5
  54. ; PJ.3 - J3.7 <------------------------> 14 LCD_DB7
  55. ; P2.0 - J13.8 UCA0 TXD ---> RX UARTtoUSB bridge
  56. ; P2.1 - J13.10 UCA0 RXD <--- TX UARTtoUSB bridge
  57. ; P4.1 - J13.14 RTS ---> CTS UARTtoUSB bridge (optional hardware control flow)
  58. ; VCC - J13.16 <--- VCC (optional supply from UARTtoUSB bridge - WARNING ! 3.3V !)
  59. ; GND - J13.20 <--> GND (optional supply from UARTtoUSB bridge)
  60. ; VCC - J11.1 ---> VCC SD_CardAdapter
  61. ; GND - J12.3 <--> GND SD_CardAdapter
  62. ; P2.4 - J4.6 UCA1 CLK ---> CLK SD_CardAdapter (SCK)
  63. ; P4.3 - J4.5 ---> CS SD_CardAdapter (Card Select)
  64. ; P2.5 - J4.4 UCA1 TXD/SIMO ---> SDI SD_CardAdapter (MOSI)
  65. ; P2.6 - J4.3 UCA1 RXD/SOMI <--- SDO SD_CardAdapter (MISO)
  66. ; P4.2 - J4.2 <--- CD SD_CardAdapter (Card Detect)
  67. ; P4.0 - J3.10 \\\<--- OUT IR_Receiver (1 TSOP32236)
  68. ; VCC - J3.2 \\\---> VCC IR_Receiver (2 TSOP32236)
  69. ; GND - J3.9 \\\<--> GND IR_Receiver (3 TSOP32236)
  70. ; PJ.4 - LFXI 32768Hz quartz
  71. ; PJ.5 - LFXO 32768Hz quartz
  72. ; PJ.6 - HFXI
  73. ; PJ.7 - HFXO
  74. ; P1.2 - J5.19 Soft I2C_Master <--> SDA <--------------------------------------------------> SDA other LAUNCHPAD
  75. ; P1.3 - J5.11 Soft I2C_Master ---> SCL ---------------------------------------------------> SCL other LAUNCHPAD
  76. ; P1.4 - J5.12 TB0.1 <--> free
  77. ; P1.5 - J5.13 UCA0 CLK TB0.2 <--> free
  78. ; P1.6 - J5.15 UCB0 SDA/SIMO <--> SDA
  79. ; P1.7 - J5.14 UCB0 SCL/SOMI ---> SCL
  80. ; P3.0 - J5.7 <--- free
  81. ; P2.3 - NC
  82. ; P2.7 - NC
  83. ; P3.1 - NC
  84. ; P3.2 - NC
  85. ; P3.3 - NC
  86. ; P3.7 - NC
  87. ; P4.4 - NC
  88. ; P4.7 - NC
  89. ; HERE ; general minidump, part 1
  90. ; ******************************;
  91. CODE INT_P1 ; PORT1 interrupt routine, warning : not FORTH executable !
  92. ; ******************************;
  93. BIC #0xF8,0(RSP) ; CPU on, GIE off in retSR
  94. ; ------------------------------;
  95. BIT.B #0x02,&0x200 ; test P1IN.1 = switch S2
  96. BIC.B #0x02,&0x21C ; P1IFG.1 clear
  97. 0= IF ; case of switch S2 pressed
  98. CMP #34,&0x3D6 ; TB0CCR2 ; maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
  99. U< IF
  100. ADD #1,&0x3D6 ; TB0CCR2 ; action for switch S2 (P1.1) : 78 mV / increment
  101. THEN
  102. THEN
  103. RETI ;
  104. ENDCODE
  105. ; ******************************;
  106. CODE INT_P4 ; PORT4 interrupt routine, warning : not FORTH executable !
  107. ; ******************************;
  108. BIC #0xF8,0(RSP) ; CPU on, GIE off in retSR
  109. ; ------------------------------;
  110. BIT.B #0x20,&0x220 ; test P4IN.5 = switch S1
  111. BIC.B #0x20,&0x23D ; P4IFG.5 clear
  112. 0= IF ; case of Switch S1 pressed
  113. CMP #7,&0x3D6 ; TB0CCR2 ; mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
  114. U>= IF ;
  115. SUB #1,&0x3D6 ; TB0CCR2 ; action for switch S1 (P4.5) : -78 mV / decrement
  116. THEN ;
  117. THEN ;
  118. RETI ;
  119. ENDCODE
  120. ; ------------------------------;
  121. CODE 20_us ; n -- n * 20 us
  122. ; ------------------------------;
  123. BEGIN ; 3 cycles loop + 6~
  124. ; MOV #5,W ; 3 MCLK = 1 MHz
  125. ; MOV #23,W ; 3 MCLK = 4 MHz
  126. MOV #51,W ; 3 MCLK = 8 MHz
  127. ; MOV #104,W ; 3 MCLK = 16 MHz
  128. ; MOV #158,W ; 3 MCLK = 24 MHz
  129. BEGIN ; 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
  130. SUB #1,W ; 1
  131. 0= UNTIL ; 2
  132. SUB #1,TOS ; 1
  133. 0= UNTIL ; 2
  134. MOV @PSP+,TOS ; 2
  135. MOV @IP+,PC ; 4
  136. ENDCODE
  137. ; ------------------------------;
  138. CODE TOP_LCD ; LCD Sample
  139. ; ------------------------------; if write : 0bxxxxWWWW --
  140. ; ; if read : -- 0b0000RRRR
  141. BIS.B #0x40,&0x222 ; P3OUT.6 LCD_EN 0-->1
  142. BIT.B #0x20,&0x220 ; P3IN.5 LCD_RW test
  143. 0= IF ; write LCD bits pattern
  144. AND #0x0F,TOS ;
  145. MOV.B TOS, &0x322 ; MOVE LCD_Data bits to PJ(0-3)
  146. BIC.B #0x40,&0x222 ; P3OUT.6 LCD_EN 1-->0 ==> strobe data
  147. MOV @PSP+,TOS ;
  148. MOV @IP+,PC
  149. THEN ; read LCD bits pattern
  150. SUB #2,PSP
  151. MOV TOS,0(PSP)
  152. BIC.B #0x40,&0x222 ; P3OUT.6 LCD_EN 1-->0 ==> strobe data
  153. MOV.B &0x320,TOS ; get LCD_Data from PJ(0-3)
  154. AND.B #0x0F,TOS
  155. MOV @IP+,PC
  156. ENDCODE
  157. ; ------------------------------;
  158. CODE LCD_W ; byte -- write byte
  159. ; ------------------------------;
  160. SUB #2,PSP ;
  161. MOV TOS,0(PSP) ; -- 0bxxxxLLLL 0bHHHHLLLL
  162. RRUM #4,TOS ; -- 0bxxxxLLLL 0bxxxxHHHH
  163. BIC.B #0x20,&0x222 ; P3OUT.5 LCD_RW=0
  164. BIS.B #0x0F,&0x324 ; PJDIR.(0-3) LCD_Data as output
  165. PUSH IP
  166. ASM>FORTH
  167. TOP_LCD 2 20_us \ write high nibble first
  168. TOP_LCD 2 20_us ;
  169. ; ------------------------------;
  170. CODE LCD_R ; -- byte read byte
  171. ; ------------------------------;
  172. BIC.B #0x0F,&0x324 ; PJ.(0-3) LCD_Data as intput
  173. BIS.B #0x20,&0x222 ; P3.5 LCD_RW=1
  174. PUSH IP
  175. ASM>FORTH
  176. TOP_LCD 2 20_us \ read high nibble first
  177. TOP_LCD 2 20_us
  178. FORTH>ASM ; -- 0b0000HHHH 0b0000LLLL
  179. MOV @RSP+,IP
  180. MOV @PSP+,W ; W = high nibble
  181. RLAM #4,W ; -- 0b0000LLLL W = 0bHHHH0000
  182. ADD.B W,TOS
  183. MOV @IP+,PC
  184. ENDCODE
  185. ; ------------------------------;
  186. CODE LCD_WrF ; func -- Write fonction
  187. ; ------------------------------;
  188. BIC.B #0x10,&0x222 ; P3OUT.4 LCD_RS=0
  189. JMP LCD_W
  190. ENDCODE
  191. ; ------------------------------;
  192. CODE LCD_RdS ; -- status Read Status
  193. ; ------------------------------;
  194. BIC.B #0x10,&0x222 ; P3OUT.4 LCD_RS=0
  195. JMP LCD_R
  196. ENDCODE
  197. ; ------------------------------;
  198. CODE LCD_WrC ; char -- Write char
  199. ; ------------------------------;
  200. BIS.B #0x10,&0x222 ; P3OUT.4 LCD_RS=1
  201. JMP LCD_W
  202. ENDCODE
  203. ; ------------------------------;
  204. CODE LCD_RdC ; -- char Read char
  205. ; ------------------------------;
  206. BIS.B #0x10,&0x222 ; P3OUT.4 LCD_RS=1
  207. JMP LCD_R
  208. ENDCODE
  209. ; ------------------------------;
  210. \ : LCD_Clear 0x01 LCD_WrF 80 20_us ; bad init !
  211. : LCD_Clear 0x01 LCD_WrF 100 20_us ;
  212. ; ------------------------------;
  213. : LCD_Home 0x02 LCD_WrF 80 20_us ;
  214. ; ------------------------------;
  215. ; : LCD_Entry_set 0x04 OR LCD_WrF ;
  216. ; : LCD_Display_Ctrl 0x08 OR LCD_WrF ;
  217. ; : LCD_Display_Shift 0x10 OR LCD_WrF ;
  218. ; : LCD_Fn_Set 0x20 OR LCD_WrF ;
  219. ; : LCD_CGRAM_Set 0x40 OR LCD_WrF ;
  220. ; : LCD_Goto 0x80 OR LCD_WrF ;
  221. ; ==========================================================;
  222. ; I2C Standard mode (100kHz) ;
  223. ; ==========================================================;
  224. VARIABLE I2CSLV_ADR ; contents slave address & R/W
  225. VARIABLE I2CM_OUT ; buffer output, lentgh,DATA (low,HIGH)
  226. VARIABLE I2CM_IN ; buffer input, lentgh,DATA (low,HIGH)
  227. 2 ALLOT
  228. ; ------------------------------;
  229. CODE M_TI2C ; 4 init tHD:STA=4us first once !!! 3(IP+3)~
  230. ; ------------------------------;
  231. BEGIN ;
  232. SUB #1,IP ; 1
  233. 0= UNTIL ; 2
  234. MOV #4,IP ; 1 preset I2C tHIGH=4us complement @ 8MHz ==> 12~(M_SCL delay) + 21~ = 33~
  235. ; MOV #13,IP ; 2 preset I2C tHIGH=4us complement @ 16MHz ==> 12~(M_SCL delay) + 48~ = 63~
  236. ; MOV #25,IP ; 2 preset I2C tHIGH=4us complement @ 24MHz ==> 12~(M_SCL delay) + 84~ = 96~
  237. MOV @RSP+,PC ; 4 ret
  238. ENDCODE ;
  239. ; ------------------------------;
  240. ; ------------------------------; _
  241. CODE M_SCL ; SCL _| |_
  242. ; ------------------------------; 4 l _
  243. BIC.B #0x08,&0x204 ; 3 l _| P1DIR.3 release SCL (high)
  244. BEGIN
  245. BIT.B #0x08,&0x200 ; 3 h test if SCL is released
  246. 0<> UNTIL ; 2 h
  247. CALL #M_TI2C ; h wait still tHIGH with predefined complement
  248. BIT.B #0x04,&0x200 ; 3 h _ P1IN.2 : get SDA in C flag
  249. BIS.B #0x08,&0x204 ; 3 h |_ P1DIR.3 as output : force SCL low
  250. MOV @RSP+,PC ; 4 l ret
  251. ENDCODE ;
  252. ; ------------------------------;
  253. ; ------------------------------;
  254. CODE I2C_MTX ; MASTER TX ; shared code for address and TX data
  255. ; ------------------------------; 4 l
  256. BEGIN ;
  257. ADD.B X,X ; 1 l shift one left
  258. U>= IF ; 2 l carry set ?
  259. BIC.B #0x04,&0x204 ; 4 l yes : P1DIR.2 as input ==> SDA high because pull up resistor
  260. ELSE ; 2 l
  261. BIS.B #0x04,&0x204 ; 4 l no : P1DIR.2 as output ==> SDA low
  262. THEN ; l
  263. CALL #M_TI2C ; l wait still tLOW with predefined complement
  264. ; ----------------------; 7 l _
  265. CALL #M_SCL ; SCL _| |_
  266. ; ----------------------; 4 l
  267. SUB #1,W ; 1 l count of bits
  268. 0= UNTIL ; 2 l
  269. ; --------------------------;
  270. BIC.B #0x04,&0x204 ; 3 l P1DIR.2 as input : release SDA high
  271. MOV @RSP+,PC ; 4 l
  272. ENDCODE ;
  273. ; ------------------------------;
  274. ; ******************************;
  275. CODE I2C_M ; <-- WDT interval vector interrupt
  276. ; ******************************;
  277. BIC #0xF8,0(RSP) ; CPU on, GIE off in oldSR
  278. ; ------------------------------;
  279. ; ; in : I2CSLV_ADR & (R/W)
  280. ; ; : I2CM_IN/I2CM_OUT as requested by I2C_SLA_ADR(0)
  281. ; ; : I2CM_IN/I2CM_OUT(0) = count of datas to be TX/RX
  282. ; ; : I2CM_IN/I2CM_OUT(0) = 0 ==> send only I2C address
  283. ; ; used: U BUF_PTR
  284. ; ; V count of I2C datas exchanged
  285. ; ; W count of bits
  286. ; ; X data
  287. ; ; Y BUF_ORG
  288. ; ; out : I2CSLV_ADR & (R/W) unchanged
  289. ; ; Y = BUF_ORG
  290. ; ; U = BUF_PTR pointing on first data not exchanged
  291. ; ; V = count+1 of TX/RX datas exchanged (if ack on addr)
  292. ; ; I2CM_IN/OUT(0) = count of data not exchanged (normally = 0)
  293. ; ; I2CM_IN/OUT(0) = -1 <==> Nack on address
  294. ; ------------------------------;
  295. ; I2C_Master_Start_Cond: ; here, SDA and SCL are in idle state
  296. ; ------------------------------; _
  297. BIS.B #0x04,&0x204 ; 3 h |_ force P1DIR.2 (SDA) as output (low)
  298. MOV.B &I2CSLV_ADR,X ; 3 h @ in X
  299. MOV #I2CM_OUT,U ; 2 h buffer out by default
  300. BIT.B #1,X ; 1 h test I2C R/w flag
  301. 0<> IF ; 2 h
  302. MOV #I2CM_IN,U ; 2 h buffer in
  303. THEN ;
  304. MOV U,Y ; 1 h U=BUF_ptr Y=BUF_org
  305. MOV.B @U+,V ; 2 h V = count of datas
  306. ADD #1,V ; 1 l to add address in count
  307. ; ------------------------------;
  308. ; Init M_TI2C first ! ; IP must be initialized
  309. ; ------------------------------;
  310. MOV #2,IP ; 1 h tHD:STA=4us, 15~ complement @ 8MHz
  311. ; MOV #13,IP ; 2 h tHD:STA=4us, 48~ complement @ 16MHz
  312. ; MOV #23,IP ; 2 h tHD:STA=4us, 78~ complement @ 24MHz
  313. ; ------------------------------;
  314. CALL #M_TI2C ; wait tHD;STA
  315. BIS.B #0x08,&0x204 ; 4 h P1DIR.3 force SCL output (low)
  316. ; ------------------------------;
  317. ; I2C_Master_Start_EndOf: ;
  318. ; ------------------------------;
  319. ; I2C_Master_Send_address ;
  320. ; ------------------------------;
  321. MOV #8,W ; 1 l prepare 8 bit Master write
  322. ; ADD #0,IP ; 2 l tLOW=4,7us, 15~ complement @ 8MHz
  323. ; ADD #3,IP ; 2 l tLOW=4,7us, 54~ complement @ 16MHz
  324. ; ADD #4,IP ; 2 l tLOW=4,7us, 90~ complement @ 24MHz
  325. ; ------------------------------; 19 l
  326. CALL #I2C_MTX ; Master send 8 bits of address then release SDA
  327. ; ------------------------------; 14 l
  328. BEGIN ;
  329. ; ADD #0,IP ; 2 l +15~ complement @ 8MHz
  330. ; ADD #0,IP ; 2 l +45~ complement @ 16MHz
  331. ; ADD #0,IP ; 2 l +78~ complement @ 24MHz
  332. CALL #M_TI2C ; wait still tLOW=4,7us
  333. ; --------------------------; l
  334. ; Master TX/RX ACK/NACK ;
  335. ; --------------------------; l _
  336. CALL #M_SCL ; SCL _| |_ C flag = NACK
  337. ; --------------------------; 4 l
  338. ; I2C_Master_Loop_Data ;
  339. ; --------------------------;
  340. 0<> IF BIS #2,SR ; l if Nack (TX), force Z+1 ==> StopCond
  341. ELSE SUB.B #1,V ; else dec count
  342. THEN ; l
  343. ; --------------------------;
  344. ; I2C_Master_CheckCountDown ; count=0 or Nack received
  345. ; --------------------------;
  346. 0= IF ; count reached or Nack
  347. ; ----------------------;
  348. ; I2C_Master_StopCond ;
  349. ; ----------------------; _
  350. BIS.B #0x04,&0x204 ; 3 h |_ force P1DIR.2 (SDA) as output
  351. SUB.B V,0(Y) ; 4 l _ refresh BUF_org(length)
  352. BIC.B #0x08,&0x204 ; 3 l _| release P1DIR.2 (SCL)
  353. BEGIN ;
  354. BIT.B #0x08,&0x200 ; SCL released ?
  355. 0<> UNTIL ;
  356. CALL #M_TI2C ; h _ wait tSU:STO
  357. BIC.B #0x04,&0x204 ; 3 h _| release P1DIR.2 (SDA) as input
  358. ; ----------------------;
  359. ; I2C_Master_Endof ;
  360. ; ----------------------;
  361. CMP.B #0,V ; h V = 0 <==> count of read bytes = as expected
  362. = IF ;
  363. ; BIS.B #0x40,&0x0223 ; P4.6 OUT high ==> switch ON LED1
  364. ; display IR_RC5 command
  365. SUB #2,PSP ;
  366. MOV TOS,0(PSP) ;
  367. MOV.B 1(Y),TOS ; -- RC5_command
  368. ASM>FORTH \ ; IP is free
  369. ['] LCD_CLEAR IS CR
  370. ['] LCD_WrC IS EMIT
  371. CR ." 0x" HEX 2 U.R
  372. 0x4000 0x222 BSET! \ P4.6 OUT high ==> switch ON LED1
  373. SPACE
  374. 0x4000 0x222 BCLR! \ P4.6 OUT low ==> switch OFF LED1
  375. ." LPM = " LPM ? \ display LPM
  376. ['] (CR) IS CR
  377. ['] (EMIT) IS EMIT
  378. FORTH>ASM ; nice code, right ?
  379. ; endof display
  380. ; BIC.B #0x40,&0x0223 ; P4.6 OUT low ==> switch OFF LED1
  381. THEN
  382. ; ----------------------;
  383. RETI ; ====> out of RC5_I2C interrupt toutine
  384. ; --------------------------;
  385. THEN ; 9 l
  386. ; --------------------------;
  387. MOV.B #8,W ; 1 l prepare 8 bits transaction
  388. BIT #1,&I2CSLV_ADR ; 3 l I2C_Master Read/write bit test
  389. 0= IF ; 2 l write flag test
  390. ; ======================;
  391. ; I2C_Master_TX ;
  392. ; ======================;
  393. MOV.B @U+,X ; 2 l next byte to transmit 38~
  394. ; ADD #0,IP ; 2 l tLOW=4,7us, 15~ complement @ 8MHz
  395. ; SUB #3,IP ; 2 l tLOW=4,7us, 36~ complement @ 16MHz
  396. ; SUB #2,IP ; 2 l tLOW=4,7us, 72~ complement @ 24MHz
  397. ; ----------------------; 17 l
  398. CALL #I2C_MTX ; Master send 8 bits of address then release SDA
  399. ; ----------------------; 4 l
  400. ELSE ; 2 l
  401. ; ======================;
  402. ; I2C_Master_RX: ; here, SDA is indetermined, SCL is strech low by master
  403. ; ======================;
  404. BEGIN ;
  405. BIC.B #0x04,&0x204 ; 4 l P1DIR.2 as input ==> SDA released high because pull up resistor
  406. ; ADD #0,IP ; 2 l tLOW=4,7us, 6~ complement @ 8MHz
  407. ; SUB #1,IP ; 2 l tLOW=4,7us, 42~ complement @ 16MHz
  408. ; ADD #1,IP ; 2 l tLOW=4,7us, 81~ complement @ 24MHz
  409. CALL #M_TI2C ; wait still tLOW
  410. ; ------------------; 7 l _
  411. CALL #M_SCL ; SCL _| |_
  412. ; ------------------; 4 l
  413. ADDC.B X,X ; 1 l C <-- X <--- C
  414. SUB #1,W ; 1 l count of bits
  415. 0= UNTIL ; 2 l
  416. MOV.B X,0(U) ; 3 l store byte @ BUF_PTR
  417. ADD #1,U ; 1 l
  418. ; ----------------------;
  419. ; I2C_MSendAckOrNack ; here, SDA is released by slave, SCL is strech low by master
  420. ; ----------------------;
  421. SUB.B #1,V ;
  422. 0<> IF ; 2
  423. BIS.B #0x04,&0x204 ; 4 l prepare send Ack if byte count <> 1
  424. THEN ;
  425. THEN ;
  426. AGAIN ; 2 l
  427. ENDCODE ;
  428. ; ------------------------------;
  429. ; PORTA (P2:P1) MSP-EXP430FR5969 default I/O state : input with pullup resistors
  430. ; init PORTA (P2:P1) usage
  431. ; P1.0 --> LED2
  432. ; P1.1 <-- Switch S2
  433. ; P1.2 <-- SCL Soft MASTER
  434. ; P1.3 <-- SDA Soft MASTER
  435. ; P1.4 <-- free
  436. ; P1.5 <-- free
  437. ; P1.6 <-> SLAVE SDA
  438. ; P1.7 --> SLAVE SCL
  439. ; P2.0 --> UART0 TX
  440. ; P2.1 <-- UART0 RX
  441. ; P2.2 --> LCD_Vo
  442. ; P2.3 NC
  443. ; P2.4 <->
  444. ; P2.5 -->
  445. ; P2.6 <--
  446. ; P2.7 NC
  447. ; PORTB (P3:P4) MSP-EXP430FR5969 default I/O state : input with pullup resistors
  448. ; P3.0 <-- ADC12
  449. ; P3.1 NC
  450. ; P3.2 NC
  451. ; P3.3 NC
  452. ; P3.4 --> LCD_RS
  453. ; P3.5 --> LCD_RW
  454. ; P3.6 --> LCD_EN
  455. ; P3.7 NC
  456. ; P4.0 <-- TSOP32236 (IR_RC5 receiver)
  457. ; P4.1 --> UART0 /RTS
  458. ; P4.2 <--
  459. ; P4.3 -->
  460. ; P4.5 <-- Switch S1
  461. ; P4.6 --> LED1
  462. ; P4.7 NC
  463. ; PJ.0 <-- LCD_DB4
  464. ; PJ.1 <-- LCD_DB5
  465. ; PJ.2 <-- LCD_DB6
  466. ; PJ.3 <-- LCD_DB7
  467. ; PJ.4 <-- LFXIN 32.7638kHz
  468. ; PJ.5 --> LFXOUT 32.7638kHz
  469. ; PJ.6 <-> LFXIN free
  470. ; PJ.7 <-> LFXOUT free
  471. ; ------------------------------;
  472. CODE START ; initialize I2C_Soft_Master_to_LCD_2x20
  473. ; ------------------------------;
  474. ; ; set TimerB to generate LCD_V0 via TB0.1 and P1.4/P2.6
  475. ; MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int (8MHZ)
  476. ; ; MOV #0,&0x03E0 ; predivide by 1 in TB0EX0 register (8 MHZ)
  477. ; MOV #1,&0x03E0 ; predivide by 2 in TB0EX0 register (16 MHZ)
  478. ; ; MOV #2,&0x03E0 ; predivide by 3 in TB0EX0 register (24 MHZ)
  479. ; MOV #40,&0x3D2 ; TB0CCR0 = 40*0.5us=20us
  480. ; MOV #0b1100000,&0x3C4 ; TB0CCTL1 output mode = set/reset
  481. ; MOV #20,&0x3D4 ; TB0CCR1 ; contrast adjust : 20/40 ==> LCD_Vo = -1V1
  482. ; ; ------------------------------;
  483. ; set TimerB to generate LCD_V0 via TB0.2 and P1.5/P2.2
  484. MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int (8MHZ)
  485. MOV #0,&0x03E0 ; predivide by 1 in TB0EX0 register (8 MHZ)
  486. ; MOV #1,&0x03E0 ; predivide by 2 in TB0EX0 register (16 MHZ)
  487. ; MOV #2,&0x03E0 ; predivide by 3 in TB0EX0 register (24 MHZ)
  488. MOV #40,&0x3D2 ; TB0CCR0 = 40*0.5us=20us
  489. MOV #0b1100000,&0x3C6 ; TB0CCTL2 output mode = set/reset
  490. MOV #20,&0x3D6 ; TB0CCR2 ; contrast adjust : 20/40 ==> LCD_Vo = -1V1
  491. ; set TimerB to make 50kHz PWM ;
  492. ; ------------------------------;
  493. ; MOV #0b1000010100,&0x3C0 ; TB0CTL = SMCLK/1, up mode, clear timer, no int
  494. ; MOV #0,&0x03E0 ; predivide by 1 in TB0EX0 register (1 MHZ) (25 kHz PWM)
  495. ; ------------------------------;
  496. ; MOV #0b1000010100,&0x3C0 ; TB0CTL = SMCLK/1, up mode, clear timer, no int
  497. ; MOV #2,&0x03E0 ; predivide by 2 in TB0EX0 register (4 MHZ)
  498. ; ------------------------------;
  499. MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int
  500. MOV #0,&0x03E0 ; predivide by 1 in TB0EX0 register (8 MHZ)
  501. ; ------------------------------;
  502. ; MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int
  503. ; MOV #1,&0x03E0 ; predivide by 2 in TB0EX0 register (16 MHZ)
  504. ; ------------------------------;
  505. ; MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int
  506. ; MOV #3,&0x03E0 ; predivide by 3 in TB0EX0 register (24 MHZ)
  507. ; ------------------------------;
  508. MOV #40,&0x3D2 ; TB0CCR0 = 40*0.5us=20us (40us @ 1MHz)
  509. ; ------------------------------;
  510. ; set TimerB to generate LCD_V0 via TB0.2 and P1.5/P2.2
  511. ; ------------------------------;
  512. MOV #0b1100000,&0x3C6 ; TB0CCTL2 output mode = set/reset ; clear CCIFG
  513. MOV #20,&0x3D6 ; TB0CCR2 ; contrast adjust : 20/40 ==> LCD_Vo = -1V1
  514. ; ------------------------------;
  515. ; set TimerB to generate LCD_V0 via TB0.1 and P1.4/P2.6
  516. ; ------------------------------;
  517. ; MOV #0b1100000,&0x3C4 ; TB0CCTL1 output mode = set/reset
  518. ; MOV #20,&0x3D4 ; TB0CCR1 ; contrast adjust : 20/40 ==> LCD_Vo = -1V1
  519. ; ------------------------------;
  520. ; I2C_MASTER init part ;
  521. ; ------------------------------;
  522. MOV.B #0b010100,&I2CSLV_ADR ; MSP430FR5738 slave address < 1
  523. ; MOV.B #0b010110,&I2CSLV_ADR ; other slave address
  524. BIS.B #1,&I2CSLV_ADR ; to read slave
  525. MOV #1,&I2CM_IN ; one data expected
  526. ; ------------------------------;
  527. ; WDT interval init part ;
  528. ; ------------------------------;
  529. ; MOV #0x5A5E,&0x15C ; init WDT Vloclk source 10kHz /2^9 (50 ms), interval mode
  530. ; MOV #0x5A5D,&0x15C ; init WDT Vloclk source 10kHz /2^13 (820 ms), interval mode
  531. ; ------------------------------;
  532. BIS.B #0x10,&0x32A ; PJSEL0.4 = 1 starts LFXT on ACLK
  533. MOV #0x5A3D,&0x15C ; init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
  534. ; ------------------------------;
  535. BIS #1,&0x100 ; enable WDT interval mode interrupt in SFRIE
  536. ; ------------------------------;
  537. ; init interrupt vectors
  538. MOV #I2C_M,&0xFFF2 ; init WDT interval vector interrupt
  539. MOV #INT_P1,&0xFFDE ; init P1 interrupt vector
  540. MOV #INT_P4,&0xFFD0 ; init P4 interrupt vector
  541. ; ------------------------------;
  542. ; init PORTA (P2:P1) (complement) when reset occurs all I/O are set in input with resistors pullup
  543. BIC.B #0x0C,&0x202 ; P1OUT.23 preset SDA + SCL output low
  544. ; BIC.B #0x0C,&0x206 ; P1REN.23 SDA + SCL pullup/down disable
  545. BIS.B #0x02,&0x218 ; P1IES.1 high to low edge select (S2)
  546. BIC.B #0x02,&0x21C ; P1IFG.1 clear (after IES select) (S2)
  547. BIS.B #0x02,&0x21A ; P1IE.1 enable interrupt (S2)
  548. BIS.B #0x04,&0x205 ; P2DIR.2 TB0.2 output
  549. BIS.B #0x04,&0x20B ; P2SEL0.2 TB0.2
  550. ; ------------------------------;
  551. ; init PORTB (P4:P3) (complement) when reset occurs all I/O are set in input with resistors pullup
  552. BIS.B #0x70,&0x224 ; P3DIR.456 as outputs, wired to LCD_RS LCD_RW LCD_EN
  553. BIC.B #0x70,&0x226 ; P3REN.456 LCD_RS, LCD_RW, LCD_EN, pullup/down disable
  554. BIC.B #0x30,&0x222 ; P3OUT.45 LCD_RW = LCD_RS = 0
  555. BIS.B #0x20,&0x239 ; P4IES.5 high to low edge select
  556. BIC.B #0x20,&0x23D ; P4IFG.5 clear (after IES select)
  557. BIS.B #0x20,&0x23B ; P4IE.5 enable interrupt for S1
  558. ; ------------------------------;
  559. ; init PORTJ (PJ) (complement) when reset occurs all I/O are set in input with resistors pullup
  560. BIS.B #0x0F,&0x324 ; PJDIR.0123 as output, wired to DB.4567 LCD_Data
  561. BIC.B #0x0F,&0x326 ; PJREN.0123 LCD_Data pullup/down disable
  562. ; ------------------------------;
  563. ; MOV #0x58,&LPM ; enter in LPM1 mode (same as LPM0)
  564. ; MOV #0x98,&LPM ; enter in LPM2 mode
  565. MOV #0xD8,&LPM ; enter in LPM3 mode (to preserve RTC)
  566. ; MOV #0xF8,&LPM ; enter in LPM4 mode (no RTC)
  567. ; ------------------------------;
  568. ; Init LCD 2x20 ;
  569. ; ------------------------------;
  570. ASM>FORTH
  571. 0x03E8 20_us \ ; 1- wait 20 ms
  572. 0x03 TOP_LCD \ ; 2- send DB5=DB4=1
  573. 0xCD 20_us \ ; 3- wait 4,1 ms
  574. 0x03 TOP_LCD \ ; 4- send again DB5=DB4=1
  575. 5 20_us \ ; 5- wait 0,1 ms
  576. 0x03 TOP_LCD \ ; 6- send again again DB5=DB4=1
  577. 2 20_us \ ; wait 40 us = LCD cycle
  578. 0x02 TOP_LCD \ ; 7- send DB5=1 DB4=0
  579. 2 20_us \ ; wait 40 us = LCD cycle
  580. 0x28 LCD_WrF \ ; 8- 0b001DNFxx "FonctionSet" : D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
  581. 0x08 LCD_WrF \ ; 9- 0b1DCB "DisplayControl" : Display off, Cursor off, Blink off.
  582. LCD_Clear \ ; 10- "LCD_Clear"
  583. 0x06 LCD_WrF \ ; 11- 0b01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
  584. 0x0C LCD_WrF \ ; 12- 0b1DCB "DisplayControl" : Display on, Cursor off, Blink off.
  585. ['] LCD_WrC IS EMIT \ ;EMIT is redirected to LCD_WrC
  586. ." SYSRSTIV = " \ ;
  587. 0x1800 @ \ ; print SAVE_SYSRSTIV
  588. HEX 2 U.R \ ; (WARM) reinit decimal BASE and reset SAVE_SYSRSTIV
  589. ['] (EMIT) IS EMIT \ ;restore EMIT
  590. ." Type STOP to quit I2C_SoftMaster_to_LCD"
  591. LIT RECURSE IS WARM \ ; redirect WARM to START...
  592. (WARM) ; ; ...and finish START with (WARM)
  593. CODE STOP
  594. BIC.B #0x0C,&0x204 ; P1DIR.23 release SDA + SCL output low
  595. MOV #0b1010000100,&0x3C0 ; TB0CTL = SMCLK/4, STOP mode, clear timer, no int
  596. BIC.B #0x02,&0x21A ; P1IE.1 disable interrupt for S2
  597. BIC.B #0x20,&0x23B ; P4IE.5 disable interrupt for S1
  598. BIC #1,&0x100 ; disable WDT interval mode interrupt in SFRIE
  599. ASM>FORTH
  600. ['] (WARM) IS WARM \ ; reconnect WARM to (WARM)
  601. -1 ABORT"
  602. ; ; above, ABORT" followed by CRLF allows to compile an empty string...
  603. ; DUP HERE SWAP - DUMP ; general minidump, part 2
  604. FORGET INT_P1 FORGET INT_P4 ; not FORTH executable
  605. FORGET M_TI2C FORGET M_SCL ; because not FORTH executable
  606. FORGET I2C_MTX FORGET I2C_M ; because not FORTH executable
  607. FORGET 20_us FORGET LCD_W ; because they are not necessary
  608. FORGET LCD_R FORGET TOP_LCD ; because they are not necessary
  609. ECHO
  610. ; compiling is done
  611. RST_HERE ; RST restart app ;
  612. START ;