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/MSP-EXP430FR6989/MSP-EXP430FR6989_IR_RC5_to_LCD_2x20_8MHz.4th

https://gitlab.com/Jean-Michel/FastForthForMSP430fr5xxx
Forth | 492 lines | 444 code | 48 blank | 0 comment | 19 complexity | 14620233fb1bd7b7bb35b7ebf2696c32 MD5 | raw file
Possible License(s): GPL-3.0
  1. ; --------------------------------------------
  2. ; MSP-EXP430FR6989_IR_RC5_to_LCD_2x20_8MHz.4th
  3. ; --------------------------------------------
  4. STOP ; to stop any interrupt in progress
  5. WIPE ;
  6. NOECHO ; comment to debug
  7. ; FORTH source file
  8. ; Copyright (C) <2015> <J.M. THOORENS>
  9. ; This program is free software: you can redistribute it and/or modify
  10. ; it under the terms of the GNU General Public License as published by
  11. ; the Free Software Foundation, either version 3 of the License, or
  12. ; (at your option) any later version.
  13. ; This program is distributed in the hope that it will be useful,
  14. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. ; GNU General Public License for more details.
  17. ;
  18. ; You should have received a copy of the GNU General Public License
  19. ; along with this program. If not, see <http://www.gnu.org/licenses/>.
  20. ; ====================================================
  21. ; DEMO test : Display IR_RC5 command on LCD 2x20 chars
  22. ; ====================================================
  23. ; if the RC5 message is troncated (end of previous interrupt after RC5 message start),
  24. ; it is ignored
  25. ;
  26. ; S1 and S2 switches allow to modify the LCD contrast
  27. ; target : MSP-EXP430fr6989 LAUNCHPAD @ 8 MHz running FastForth ; 922 bytes
  28. ; note : at 4MHz and 921600bds, the protocol XON/XOFF crashes if line is empty.
  29. ; So, all lines of a source file must contain a minima a space.
  30. ; ===================================================================================
  31. ; in case of 3.3V powered by UARTtoUSB bridge, open J101 straps {RST,TST,V+,5V} BEFORE
  32. ; ===================================================================================
  33. ; ---------------------------------------------------
  34. ; MSP - MSP-EXP430FR6989 LAUNCHPAD <--> OUTPUT WORLD
  35. ; ---------------------------------------------------
  36. ; P1.0 - LED1 red
  37. ; P9.7 - LED2 green
  38. ; P1.1 - Switch S1 <--- LCD contrast + (finger :-)
  39. ; P1.2 - Switch S2 <--- LCD contrast - (finger ;-)
  40. ; note : ESI1.1 = lowest left pin
  41. ; note : ESI1.2 is not connected to 3.3V
  42. ; GND/ESIVSS - ESI1.3 <-------+---0V0----------> 1 LCD_Vss
  43. ; VCC/ESIVCC - ESI1.4 >------ | --3V3-----+----> 2 LCD_Vdd
  44. ; | |
  45. ; |___ 470n ---
  46. ; ^ | ---
  47. ; / \ BAT54 |
  48. ; --- |
  49. ; 100n | 2k2 |
  50. ; P3.6 - J4.37 UCA1 CLK TB0.2 >---||--+--^/\/\/v--+----> 3 LCD_Vo (=0V6 without modulation)
  51. ; P9.0/ESICH0 - ESI1.14 <------------------------> 11 LCD_DB4
  52. ; P9.1/ESICH1 - ESI1.13 <------------------------> 12 LCD_DB5
  53. ; P9.2/ESICH2 - ESI1.12 <------------------------> 13 LCD_DB5
  54. ; P9.3/ESICH3 - ESI1.11 <------------------------> 14 LCD_DB7
  55. ; P9.4/ESICI0 - ESI1.10 -------------------------> 4 LCD_RS
  56. ; P9.5/ESICI1 - ESI1.9 -------------------------> 5 LCD_R/W
  57. ; P9.6/ESICI2 - ESI1.8 -------------------------> 6 LCD_EN0
  58. ; P3.4 - J101.8 UCA1 TXD ---> RX UARTtoUSB bridge
  59. ; P3.5 - J101.10 UCA1 RXD <--- TX UARTtoUSB bridge
  60. ; P3.0 - J101.14 RTS ---> CTS UARTtoUSB bridge (optional hardware control flow)
  61. ; VCC - J101.16 <--- VCC (optional supply from UARTtoUSB bridge - WARNING ! must be 3.3V !)
  62. ; GND - J101.20 <--> GND (optional supply from UARTtoUSB bridge)
  63. ; VCC - J1.1 ---> VCC SD_CardAdapter
  64. ; GND - J2.20 <--> GND SD_CardAdapter
  65. ; P2.2 - J4.35 UCA0 CLK ---> CLK SD_CardAdapter (SCK)
  66. ; P2.6 - J4.39 ---> CS SD_CardAdapter (Card Select)
  67. ; P2.0 - J1.8 UCA0 TXD/SIMO ---> SDI SD_CardAdapter (MOSI)
  68. ; P2.1 - J2.19 UCA0 RXD/SOMI <--- SDO SD_CardAdapter (MISO)
  69. ; P2.7 - J4.40 <--- CD SD_CardAdapter (Card Detect)
  70. ; P4.0 - J1.10 <--- OUT IR_Receiver (1 TSOP32236)
  71. ; VCC - J6.1 ---> VCC IR_Receiver (2 TSOP32236)
  72. ; GND - J6.2 <--> GND IR_Receiver (3 TSOP32236)
  73. ; PJ.4 - LFXI 32768Hz quartz
  74. ; PJ.5 - LFXO 32768Hz quartz
  75. ; PJ.6 - HFXI
  76. ; PJ.7 - HFXO
  77. ; P1.3 - J4.34 Soft I2C_Master <--> SDA software I2C Master
  78. ; P1.5 - J2.18 Soft I2C_Master ---> SCL software I2C Master
  79. ; P1.4 - J1.7 UCB0 CLK TA1.0 <--> free
  80. ; P1.6 - J2.15 UCB0 SDA/SIMO <--> SDA hardware I2C Master or Slave
  81. ; P1.7 - J2.14 UCB0 SCL/SOMI ---> SCL hardware I2C Master or Slave
  82. ; P3.0 - J4.33 UCB1 CLK ---> free (if UARTtoUSB with software control flow)
  83. ; P3.1 - J4.32 UCB0 SDA/SIMO <--> free
  84. ; P3.2 - J1.5 UCB0 SCL/SOMI ---> free
  85. ; P3.3 - J1.5 TA1.1 <--> free
  86. ; HERE ; general minidump, part 1
  87. ; ------------------------------;
  88. CODE 20_us ; n -- n * 20 us
  89. ; ------------------------------;
  90. BEGIN ; 3 cycles loop + 6~
  91. ; MOV #5,W ; 3 MCLK = 1 MHz
  92. ; MOV #23,W ; 3 MCLK = 4 MHz
  93. MOV #51,W ; 3 MCLK = 8 MHz
  94. ; MOV #104,W ; 3 MCLK = 16 MHz
  95. ; MOV #158,W ; 3 MCLK = 24 MHz
  96. BEGIN ; 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
  97. SUB #1,W ; 1
  98. 0= UNTIL ; 2
  99. SUB #1,TOS ; 1
  100. 0= UNTIL ; 2
  101. MOV @PSP+,TOS ; 2
  102. MOV @IP+,PC ; 4
  103. ENDCODE ; 20 cycles mini with call and return
  104. ; ------------------------------;
  105. CODE TOP_LCD ; LCD Sample
  106. ; ------------------------------; if write : 0bxxxxWWWW --
  107. ; ; if read : -- 0b0000RRRR
  108. BIS.B #0x40,Y ; P9OUT.6 LCD_EN 0-->1
  109. BIT.B #0x20,Y ; P9IN.5 LCD_RW test
  110. 0= IF ; write LCD bits pattern
  111. AND #0x0F,TOS ; keep low nibble
  112. ADD Y,TOS ; add CMD to DATA in TOS
  113. MOV.B TOS, &0x282 ; MOVE LCD_CMD_and_Data bits to P9OUT.0123456
  114. BIC.B #0x40,&0x282 ; P9OUT.6 LCD_EN 1-->0 ==> strobe data
  115. MOV @PSP+,TOS ;
  116. MOV @IP+,PC
  117. THEN ; read LCD bits pattern
  118. MOV.B Y,&0x282 ; MOVE LCD_CMD bits to P9OUT.456
  119. SUB #2,PSP
  120. MOV TOS,0(PSP)
  121. BIC.B #0x40,&0x282 ; P9OUT.6 LCD_EN 1-->0 ==> strobe data
  122. MOV.B &0x280,TOS ; get LCD_Data from P9IN.(0-3)
  123. AND.B #0x0F,TOS
  124. MOV @IP+,PC
  125. ENDCODE
  126. ; ------------------------------;
  127. CODE LCD_W ; byte -- write byte
  128. ; ------------------------------;
  129. SUB #2,PSP ;
  130. MOV TOS,0(PSP) ; -- 0bxxxxLLLL 0bHHHHLLLL
  131. RRUM #4,TOS ; -- 0bxxxxLLLL 0bxxxxHHHH
  132. BIC.B #0x20,Y ; P9OUT.5 LCD_RW=0
  133. BIS.B #0x0F,&0x284 ; P9DIR.(0-3) LCD_Data as output
  134. PUSH IP
  135. ASM>FORTH
  136. TOP_LCD 2 20_us \ write high nibble first
  137. TOP_LCD 2 20_us ; ;
  138. ; ------------------------------;
  139. CODE LCD_R ; -- byte read byte
  140. ; ------------------------------;
  141. BIC.B #0x0F,&0x284 ; P9DIR.(0-3) LCD_Data as intput
  142. BIS.B #0x20,Y ; P9OUT.5 LCD_RW=1
  143. PUSH IP
  144. ASM>FORTH
  145. TOP_LCD 2 20_us \ read high nibble first
  146. TOP_LCD 2 20_us
  147. FORTH>ASM ; -- 0b0000HHHH 0b0000LLLL
  148. MOV @RSP+,IP
  149. MOV @PSP+,W ; W = high nibble
  150. RLAM #4,W ; -- 0b0000LLLL W = 0bHHHH0000
  151. ADD.B W,TOS
  152. MOV @IP+,PC
  153. ENDCODE
  154. ; ------------------------------;
  155. CODE LCD_WrF ; func -- Write Fonction
  156. ; ------------------------------;
  157. MOV #0,Y ; P9OUT.4 LCD_RS=0
  158. JMP LCD_W
  159. ENDCODE
  160. ; ------------------------------;
  161. CODE LCD_RdS ; -- status Read Status
  162. ; ------------------------------;
  163. MOV #0,Y ; P9OUT.4 LCD_RS=0
  164. JMP LCD_R
  165. ENDCODE
  166. ; ------------------------------;
  167. CODE LCD_WrC ; char -- Write Char
  168. ; ------------------------------;
  169. MOV #0x10,Y ; P9OUT.4 LCD_RS=1
  170. JMP LCD_W
  171. ENDCODE
  172. ; ------------------------------;
  173. CODE LCD_RdC ; -- char Read Char
  174. ; ------------------------------;
  175. MOV #0x10,Y ; P9OUT.4 LCD_RS=1
  176. JMP LCD_R
  177. ENDCODE
  178. ; ------------------------------;
  179. ; : LCD_Clear 0x01 LCD_WrF 80 20_us ; ; perhaps bad init
  180. : LCD_Clear 0x01 LCD_WrF 100 20_us ;
  181. ; ------------------------------;
  182. : LCD_Home 0x02 LCD_WrF 80 20_us ;
  183. ; ------------------------------;
  184. ; : LCD_Entry_set 0x04 OR LCD_WrF ;
  185. ; : LCD_Display_Ctrl 0x08 OR LCD_WrF ;
  186. ; : LCD_Display_Shift 0x10 OR LCD_WrF ;
  187. ; : LCD_Fn_Set 0x20 OR LCD_WrF ;
  188. ; : LCD_CGRAM_Set 0x40 OR LCD_WrF ;
  189. ; : LCD_Goto 0x80 OR LCD_WrF ;
  190. ; ------------------------------;
  191. ; IR_RC5 driver ;
  192. ; ******************************;
  193. CODE IR_RC5 ; wake up on P4.0 change interrupt
  194. ; ******************************;
  195. BIC #0xF8,0(RSP) ; CPU on, GIE off in oldSR
  196. ; ------------------------------;
  197. ; in : SR(9)=old Toggle bit memory
  198. ; SMclock = 8 MHz or 16 MHz
  199. ; use : U,V,W,X,Y, TA0 timer, TA0R register
  200. ; out : U = 0 x T A4 A3 A2 A1 A0| 0 C6 C5 C4 C3 C2 C1 C0
  201. ; SR(9)=new Toggle bit memory
  202. ; ------------------------------;
  203. ; RC5_FirstStartBitHalfCycle: ;
  204. ; ------------------------------;
  205. MOV #0,&0x0360 ; predivide by 1 in TA0EX0 register ( 8 MHZ), reset value
  206. ; MOV #1,&0x0360 ; predivide by 2 in TA0EX0 register (16 MHZ)
  207. ; MOV #2,&0x0360 ; predivide by 3 in TA0EX0 register (24 MHZ)
  208. MOV #1778,X ; RC5_Period in us
  209. MOV #14,W ; count of loop
  210. BEGIN ;
  211. ; ------------------------------;
  212. ; RC5_TopSynchro: ; <--- loop back ---+ with readjusted RC5_Period
  213. ; ------------------------------; | here, we are just after 1/2 RC5_cycle
  214. MOV #0b1011100100,&0x0340 ; (re)start timer_A | SMCLK_pre/2 /8 : 2us time interval,free running,clear TA0_IFG and TA0R
  215. ; RC5_Compute_3_4Period: ; |
  216. RRUM #1,X ; X=1/2 cycle |
  217. MOV X,Y ; Y=1/2 ^
  218. RRUM #1,Y ; Y=1/4
  219. ADD X,Y ; Y=3/4
  220. ; RC5_Wait_1_4: ; wait 3/4 cycle after 1/2 cycle to sample RC5_Input at 1/4 cycle
  221. BEGIN CMP Y,&0x0350 ; CMP &TA0R with 3/4 cycle value
  222. = UNTIL ;
  223. ; ------------------------------;
  224. ; RC5_Sample: ; at 1/4 cycle, we can sample RC5_input, ST2/C6 bit first
  225. ; ------------------------------;
  226. BIT.B #0x01,&0x0221 ; C_flag = P4.0 = IR bit
  227. ADDC V,V ; C_flag <-- V(15):V(0) <-- C_flag
  228. MOV.B &0x0221,&0x0239 ; preset IES_4.0 state for next IFG
  229. BIC.B #0x01,&0x023D ; clear P4.0_IFG after full cycle pin change
  230. SUB #1,W ; decrement count loop
  231. ; count = 13 ==> V = x x x x x x x x |x x x x x x x /C6
  232. ; count = 0 ==> V = x x /C6 Tg A4 A3 A2 A1|A0 C5 C4 C3 C2 C1 C0 1
  233. 0<> WHILE ; ----> out of loop ----+
  234. ; RC5_compute_2_4_OverFlow: ; |
  235. ADD X,Y ; | out of bound = 5/4 period
  236. ; RC5_WaitHalfCycleP1.2_IFG: ; |
  237. BEGIN ; |
  238. CMP Y,&0x0350 ; | TA0R = 5/4 cycle test
  239. >= IF ; | if cycle time out of bound
  240. MOV #4,&0x0340 ; | stop timer_A and clear TA0R
  241. RETI ; | then quit to do nothing
  242. THEN ; |
  243. ; ------------------------------; |
  244. BIT.B #0x01,&0x023D ; ^ | test P4.0_IFG
  245. <> UNTIL ; | |
  246. MOV &0x0350,X ; | | get new RC5_period value
  247. REPEAT ; ----> loop back --+ |
  248. ; ------------------------------; |
  249. ; RC5_SampleEndOf: ; <---------------------+
  250. ; ------------------------------;
  251. MOV #4,&0x0340 ; stop timer_A
  252. RLAM #1,V ; V = x /C6 Tg A4 A3 A2 A1 A0|C5 C4 C3 C2 C1 C0 1 0
  253. ; ------------------------------;
  254. ; ------------------------------;
  255. ; Only New_RC5_Command ADD_ON ; use SR(9) bit as toggle bit
  256. ; ------------------------------;
  257. MOV @RSP,X ; retiSR(9) = old RC5 toggle bit
  258. RLAM #4,X ; retiSR(9) --> X(13)
  259. XOR V,X ; (new XOR old)(13) Toggle bit
  260. BIT #0x2000,X ; X(13) = New_RC5_command
  261. 0= IF ;
  262. RETI ; case of repeated RC5_command : RETI without SR(9) change
  263. THEN ;
  264. XOR #0x0200,0(RSP) ; change Toggle bit memory SR(9)
  265. ; ------------------------------;
  266. ; ------------------------------;
  267. ; RC5_ComputeNewRC5word ;
  268. ; ------------------------------;
  269. MOV.B V,U ; U= 0 0 0 0 0 0 0 0 C5 C4 C3 C2 C1 C0 0 0
  270. RRUM #2,U ; U= 0 0 0 0 0 0 0 0 0 0 C5 C4 C3 C2 C1 C0
  271. ; AND #0x7F00,V ; V= 0 /C6 Tg A4 A3 A2 A1 A0 0 0 0 0 0 0 0 0
  272. ; ADD V,U ; U= 0 /C6 Tg A4 A3 A2 A1 A0 0 0 C5 C4 C3 C2 C1 C0
  273. ; ------------------------------;
  274. ; RC5_ComputeC6bit ;
  275. ; ------------------------------;
  276. BIT #0x4000,V ; test /C6
  277. 0= IF BIS.B #0x40,U ; set C6 bit
  278. THEN ;
  279. ; ------------------------------;
  280. ; RC5_CommandByteIsDone: ; U= 0 0 0 0 0 0 0 0 0 C6 C5 C4 C3 C2 C1 C0
  281. ; ------------------------------;
  282. ; ------------------------------;
  283. ; Display IR_RC5 code ;
  284. ; ------------------------------;
  285. BIS.B #1,&0x0202 ; P1.0 OUT high ==> switch ON LED1
  286. ; ------------------------------;
  287. SUB #4,PSP ;
  288. MOV &BASE,2(PSP) ; save base
  289. MOV TOS,0(PSP) ;
  290. MOV.B U,TOS ;
  291. ASM>FORTH \ ; IP is free
  292. ['] LCD_CLEAR IS CR
  293. ['] LCD_WrC IS EMIT
  294. CR ." 0x" HEX 2 U.R
  295. ['] (CR) IS CR
  296. ['] (EMIT) IS EMIT
  297. FORTH>ASM ; nice code, right ?
  298. MOV @PSP+,&BASE
  299. ; ------------------------------;
  300. BIC.B #1,&0x0202 ; P1.0 OUT low ==> switch OFF LED1
  301. ; ------------------------------;
  302. RETI ; CPU is ON, GIE is OFF
  303. ENDCODE ;
  304. ; ------------------------------;
  305. ; ******************************;
  306. CODE WDT_Int ; Watchdog interrupt routine, warning : not FORTH executable !
  307. ; ******************************;
  308. BIC #0xF8,0(RSP) ; set CPU ON and GIE OFF in retiSR
  309. ; ------------------------------;
  310. BIT.B #0x02,&0x200 ; test P1IN.1 = switch S1
  311. 0= IF ; case of switch S2 pressed
  312. CMP #7,&0x3D6 ; TB0CCR2 ; mini Ton = 7/40 & VDD=3V3 ==> LCD_Vo = 0V04
  313. U>= IF ;
  314. SUB #1,&0x3D6 ; TB0CCR2 ; action for switch S1 (P1.1) : -72 mV / decrement
  315. THEN
  316. ELSE
  317. BIT.B #0x04,&0x200 ; test P1IN.2 = switch S2
  318. = IF
  319. CMP #36,&0x3D6 ; TB0CCR2 ; maxi Ton = 36/40 & VDD=3V3 ==> LCD_Vo = -2V04
  320. U< IF
  321. ADD #1,&0x3D6 ; TB0CCR2 ; action for switch S2 (P1.2) : 72 mV / increment
  322. THEN
  323. THEN
  324. THEN ;
  325. RETI ; CPU is ON, GIE is OFF
  326. ENDCODE
  327. ; ------------------------------;
  328. ; ------------------------------;
  329. CODE START ;
  330. ; ------------------------------;
  331. ; 0b0000 0010 1001 0100 ; TB0CTL = 0x3C0
  332. ; - - ; CNTL Counter lentgh ; 00 = 16 bits
  333. ; -- ; TBSSEL TimerB clock select ; 10 = SMCLK
  334. ; -- ; ID input divider ; 10 = /4
  335. ; -- ; MC Mode Control ; 01 = up mode
  336. ; - ; TBCLR TimerB Clear
  337. ; - ; TBIE
  338. ; - ; TBIFG
  339. ; ------------------------------;
  340. ; 0b0000 0000 0110 0000 ; TB0CCTLx = 0x3C{2,4,6,8,A,C,E}
  341. ; -- ; CM Capture Mode
  342. ; -- ; CCIS
  343. ; - ; SCS
  344. ; -- ; CLLD
  345. ; - ; CAP
  346. ; --- ; OUTMOD ; 011 = set/reset
  347. ; - ; CCIE
  348. ; - ; CCI
  349. ; - ; OUT
  350. ; - ; COV
  351. ; - ; CCIFG
  352. ; ------------------------------;
  353. ; ; TB0CCRx 0x3D{2,4,6,8,A,C,E}
  354. ; ; TB0EX0 0x3E0
  355. ; ------------------------------;
  356. ; set TimerB to make 50kHz PWM ;
  357. ; ------------------------------;
  358. ; MOV #0b1000010100,&0x3C0 ; TB0CTL = SMCLK/1, up mode, clear timer, no int
  359. ; MOV #0,&0x03E0 ; predivide by 1 in TB0EX0 register (1 MHZ) (generate 25 kHz PWM)
  360. ; ------------------------------;
  361. ; MOV #0b1000010100,&0x3C0 ; TB0CTL = SMCLK/1, up mode, clear timer, no int
  362. ; MOV #1,&0x03E0 ; predivide by 2 in TB0EX0 register (4 MHZ)
  363. ; ------------------------------;
  364. MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int
  365. MOV #0,&0x03E0 ; predivide by 1 in TB0EX0 register (8 MHZ)
  366. ; ------------------------------;
  367. ; MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int
  368. ; MOV #1,&0x03E0 ; predivide by 2 in TB0EX0 register (16 MHZ)
  369. ; ------------------------------;
  370. ; MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int
  371. ; MOV #2,&0x03E0 ; predivide by 3 in TB0EX0 register (24 MHZ)
  372. ; ------------------------------;
  373. MOV #40,&0x3D2 ; TB0CCR0 = 40*0.5us=20us (40us @ 1MHz)
  374. ; ------------------------------;
  375. ; set TimerB to generate LCD_V0 via TB0.2 and P3.6/P6.6
  376. ; ------------------------------;
  377. MOV #0b1100000,&0x3C6 ; TB0CCTL2 output mode = set/reset ; clear CCIFG
  378. MOV #25,&0x3D6 ; TB0CCR2 ; contrast adjust : 25/40 ==> LCD_Vo = -1V3
  379. ; ------------------------------;
  380. ; init PORTB (P4:P3) (complement)
  381. BIS.B #0x40,&0x224 ; P3DIR.6 TB0.2 output
  382. BIS.B #0x40,&0x22C ; P3SEL1.6 TB0.2
  383. BIS.B #1,&0x239 ; P4IES.0 high to low edge select
  384. BIC.B #1,&0x23D ; P4IFG.0 clear int flag for TSOP32236 (after IES select)
  385. BIS.B #1,&0x23B ; P4IE.0 enable interrupt for TSOP32236
  386. ; ------------------------------;
  387. ; init PORTE (P9:P10) (complement)
  388. BIC.B #0xB0,&0x282 ; P9OUT.45 LCD_RS = LCD_RW = LED2 = 0
  389. BIS.B #-1,&0x284 ; P9DIR.0123 as output, wired to DB.4567 LCD_Data
  390. ; P9DIR.456 as outputs, wired to LCD_RS LCD_RW LCD_EN
  391. ; P9DIR.7 as output, LED2
  392. BIC.B #-1,&0x286 ; P9REN.0123 LCD_Data pullup/down disable
  393. ; P9REN.456 LCD_RS, LCD_RW, LCD_EN, pullup/down disable
  394. ; P9DIR.7 LED2 pullup/down disable
  395. ; ------------------------------;
  396. ; WDT interval init part ;
  397. ; ------------------------------;
  398. ; MOV #0x5A5E,&0x15C ; init WDT Vloclk source 10kHz /2^9 (50 ms), interval mode
  399. MOV #0x5A3D,&0x15C ; init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
  400. ; MOV #0x5A5D,&0x15C ; init WDT Vloclk source 10kHz /2^13 (800 ms), interval mode
  401. BIS #1,&0x100 ; enable WDT interval mode interrupt in SFRIE
  402. ; ------------------------------;
  403. ; init interrupt vectors
  404. ; ------------------------------;
  405. MOV #IR_RC5,&0xFFCC ; init P4 interrupt vector
  406. MOV #WDT_int,&0xFFF2 ; init WDT interval vector interrupt
  407. ; ------------------------------;
  408. ; Init LCD
  409. ; ------------------------------;
  410. ASM>FORTH
  411. 0x03E8 20_us \ ; 1- wait 20 ms
  412. 0x03 TOP_LCD \ ; 2- send DB5=DB4=1
  413. 0xCD 20_us \ ; 3- wait 4,1 ms
  414. 0x03 TOP_LCD \ ; 4- send again DB5=DB4=1
  415. 5 20_us \ ; 5- wait 0,1 ms
  416. 0x03 TOP_LCD \ ; 6- send again again DB5=DB4=1
  417. 2 20_us \ ; wait 40 us = LCD cycle
  418. 0x02 TOP_LCD \ ; 7- send DB5=1 DB4=0
  419. 2 20_us \ ; wait 40 us = LCD cycle
  420. 0x28 LCD_WrF \ ; 8- 0b001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
  421. 0x08 LCD_WrF \ ; 9- 0b1DCB "DisplayControl" : Display off, Cursor off, Blink off.
  422. LCD_Clear \ ; 10- "LCD_Clear"
  423. 0x06 LCD_WrF \ ; 11- 0b01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
  424. 0x0C LCD_WrF \ ; 12- 0b1DCB "DisplayControl" : Display on, Cursor off, Blink off.
  425. ." Type STOP to quit IR_RC5_to_LCD"
  426. LIT RECURSE IS WARM \ ; insert this routine between COLD and WARM...
  427. (WARM) ; ; ...and continue with WARM
  428. CODE STOP
  429. MOV #0b1010000100,&0x3C0 ; TB0CTL = SMCLK/4, STOP mode, clear timer, no int
  430. BIC.B #0x01,&0x23B ; P4IE.0 disable interrupt for RC5_INT
  431. BIC #1,&0x100 ; disable WDT interval mode interrupt in SFRIE
  432. ASM>FORTH
  433. ['] (WARM) IS WARM \ ; reconnect WARM to (WARM)
  434. -1 ABORT"
  435. ; ; above, ABORT" followed by CRLF allows to compile an empty string...
  436. ; DUP HERE SWAP - DUMP ; general minidump, part 2
  437. ; words
  438. FORGET IR_RC5 FORGET WDT_Int ; not FORTH executable
  439. FORGET 20_us FORGET LCD_W ; because they are not necessary
  440. FORGET LCD_R FORGET TOP_LCD ; because they are not necessary
  441. ECHO
  442. ; compiling done
  443. RST_HERE ;
  444. START ; hit key enter :