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/MSP-EXP430FR6989/MSP-EXP430FR6989_I2C_Slave_to_LCD_2x20_8MHz.4th

https://gitlab.com/Jean-Michel/FastForthForMSP430fr5xxx
Forth | 507 lines | 461 code | 46 blank | 0 comment | 19 complexity | 73912eddfab55fbbf0320e04aed22a26 MD5 | raw file
Possible License(s): GPL-3.0
  1. ; -----------------------------------------------
  2. ; MSP-EXP430FR6989_I2C_Slave_to_LCD_2x20_8MHz.4th
  3. ; -----------------------------------------------
  4. STOP ; to stop any interrupt in progress
  5. WIPE ;
  6. NOECHO ; comment to debug
  7. ; FORTH source file
  8. ; Copyright (C) <2015> <J.M. THOORENS>
  9. ;
  10. ; This program is free software: you can redistribute it and/or modify
  11. ; it under the terms of the GNU General Public License as published by
  12. ; the Free Software Foundation, either version 3 of the License, or
  13. ; (at your option) any later version.
  14. ;
  15. ; This program is distributed in the hope that it will be useful,
  16. ; but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. ; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. ; GNU General Public License for more details.
  19. ;
  20. ; You should have received a copy of the GNU General Public License
  21. ; along with this program. If not, see <http://www.gnu.org/licenses/>.
  22. ; ========================================
  23. ; DEMO with two MSP-EXP430FR5969 LAUNCHPAD
  24. ; test : I2C_MASTER WRITE & I2C_SLAVE READ
  25. ; ========================================
  26. ; load this MSP-EXP430FR6989_I2C_Slave_to_LCD_2x20.4th file on the first LAUNCHPAD
  27. ; load MSP-EXP430FR5969_RC5_to_I2C_Soft_Master.4th on the other LAUNCHPAD
  28. ; target : MSP-EXP430fr5969 LAUNCHPAD
  29. ; with code : "FORTH_MSP430FR596916MHzTxx.HEX"
  30. ; 1088 bytes
  31. ; ===================================================================================
  32. ; in case of 3.3V powered by UARTtoUSB bridge, open J13 straps {RST,TST,V+,5V} BEFORE
  33. ; ===================================================================================
  34. ; ---------------------------------------------------
  35. ; MSP - MSP-EXP430FR6989 LAUNCHPAD <--> OUTPUT WORLD
  36. ; ---------------------------------------------------
  37. ; P1.0 - LED1 red
  38. ; P9.7 - LED2 green
  39. ; P1.1 - Switch S1 <--- LCD contrast + (finger :-)
  40. ; P1.2 - Switch S2 <--- LCD contrast - (finger ;-)
  41. ; note : ESI1.1 = lowest left pin
  42. ; note : ESI1.2 is not connected to 3.3V
  43. ; GND/ESIVSS - ESI1.3 <-------+---0V0----------> 1 LCD_Vss
  44. ; VCC/ESIVCC - ESI1.4 >------ | --3V3-----+----> 2 LCD_Vdd
  45. ; | |
  46. ; |___ 470n ---
  47. ; ^ | ---
  48. ; / \ BAT54 |
  49. ; --- |
  50. ; 100n | 2k2 |
  51. ; P3.6 - J4.37 UCA1 CLK TB0.2 >---||--+--^/\/\/v--+----> 3 LCD_Vo (=0V6 without modulation)
  52. ; P9.0/ESICH0 - ESI1.14 <------------------------> 11 LCD_DB4
  53. ; P9.1/ESICH1 - ESI1.13 <------------------------> 12 LCD_DB5
  54. ; P9.2/ESICH2 - ESI1.12 <------------------------> 13 LCD_DB5
  55. ; P9.3/ESICH3 - ESI1.11 <------------------------> 14 LCD_DB7
  56. ; P9.4/ESICI0 - ESI1.10 -------------------------> 4 LCD_RS
  57. ; P9.5/ESICI1 - ESI1.9 -------------------------> 5 LCD_R/W
  58. ; P9.6/ESICI2 - ESI1.8 -------------------------> 6 LCD_EN0
  59. ; P3.4 - J101.8 UCA1 TXD ---> RX UARTtoUSB bridge
  60. ; P3.5 - J101.10 UCA1 RXD <--- TX UARTtoUSB bridge
  61. ; P3.0 - J101.14 RTS ---> CTS UARTtoUSB bridge (optional hardware control flow)
  62. ; VCC - J101.16 <--- VCC (optional supply from UARTtoUSB bridge - WARNING ! 3.3V !)
  63. ; GND - J101.20 <--> GND (optional supply from UARTtoUSB bridge)
  64. ; VCC - J1.1 ---> VCC SD_CardAdapter
  65. ; GND - J2.20 <--> GND SD_CardAdapter
  66. ; P2.2 - J4.35 UCA0 CLK ---> CLK SD_CardAdapter (SCK)
  67. ; P2.6 - J4.39 ---> CS SD_CardAdapter (Card Select)
  68. ; P2.0 - J1.8 UCA0 TXD/SIMO ---> SDI SD_CardAdapter (MOSI)
  69. ; P2.1 - J2.19 UCA0 RXD/SOMI <--- SDO SD_CardAdapter (MISO)
  70. ; P2.7 - J4.40 <--- CD SD_CardAdapter (Card Detect)
  71. ; P4.0 - J1.10 <--- OUT IR_Receiver (1 TSOP32236)
  72. ; VCC - J6.1 ---> VCC IR_Receiver (2 TSOP32236)
  73. ; GND - J6.2 <--> GND IR_Receiver (3 TSOP32236)
  74. ; PJ.4 - LFXI 32768Hz quartz
  75. ; PJ.5 - LFXO 32768Hz quartz
  76. ; PJ.6 - HFXI
  77. ; PJ.7 - HFXO
  78. ; P1.3 - J4.34 Soft I2C_Master <--> SDA software I2C Master
  79. ; P1.5 - J2.18 Soft I2C_Master ---> SCL software I2C Master
  80. ; P1.4 - J1.7 UCB0 CLK TA1.0 <--> free
  81. ; P1.6 - J2.15 UCB0 SDA/SIMO <--> SDA hardware I2C Master or Slave
  82. ; P1.7 - J2.14 UCB0 SCL/SOMI ---> SCL hardware I2C Master or Slave
  83. ; P3.0 - J4.33 UCB1 CLK ---> free (if UARTtoUSB with software control flow)
  84. ; P3.1 - J4.32 UCB0 SDA/SIMO <--> free
  85. ; P3.2 - J1.5 UCB0 SCL/SOMI ---> free
  86. ; P3.3 - J1.5 TA1.1 <--> free
  87. ; HERE ; general minidump, part 1
  88. ; ******************************;
  89. CODE WDT_Int ; Watchdog interrupt routine, warning : not FORTH executable !
  90. ; ******************************;
  91. BIC #0xF8,0(RSP) ; CPU on, GIE off in retSR
  92. ; ------------------------------;
  93. BIT.B #0x02,&0x200 ; test P1IN.1 = switch S1
  94. 0= IF ; case of switch S2 pressed
  95. CMP #7,&0x3D6 ; TB0CCR2 ; mini Ton = 6/40 & VDD=3V6 ==> LCD_Vo = 0V
  96. U>= IF ;
  97. SUB #1,&0x3D6 ; TB0CCR2 ; action for switch S1 (P1.1) : -78 mV / decrement
  98. THEN
  99. ELSE
  100. BIT.B #0x04,&0x200 ; test P1IN.2 = switch S2
  101. = IF
  102. CMP #34,&0x3D6 ; TB0CCR2 ; maxi Ton = 34/40 & VDD=3V6 ==> LCD_Vo = -2V2
  103. U< IF
  104. ADD #1,&0x3D6 ; TB0CCR2 ; action for switch S2 (P1.2) : 78 mV / increment
  105. THEN
  106. THEN
  107. THEN ;
  108. RETI ;
  109. ENDCODE
  110. ; ------------------------------;
  111. ; ------------------------------;
  112. CODE 20_us ; n -- n * 20 us
  113. ; ------------------------------;
  114. BEGIN ; 3 cycles loop + 6~
  115. ; MOV #5,W ; 3 MCLK = 1 MHz
  116. ; MOV #23,W ; 3 MCLK = 4 MHz
  117. MOV #51,W ; 3 MCLK = 8 MHz
  118. ; MOV #104,W ; 3 MCLK = 16 MHz
  119. ; MOV #158,W ; 3 MCLK = 24 MHz
  120. BEGIN ; 3 cycles loop ==> 3 * W / F us = 100 us - 1 @ 8 MHz
  121. SUB #1,W ; 1
  122. 0= UNTIL ; 2
  123. SUB #1,TOS ; 1
  124. 0= UNTIL ; 2
  125. MOV @PSP+,TOS ; 2
  126. MOV @IP+,PC ; 4
  127. ENDCODE ; 20 cycles mini with call and return
  128. ; ------------------------------;
  129. CODE TOP_LCD ; LCD Sample
  130. ; ------------------------------; if write : 0bxxxxWWWW --
  131. ; ; if read : -- 0b0000RRRR
  132. BIS.B #0x40,Y ; P9OUT.6 LCD_EN 0-->1
  133. BIT.B #0x20,Y ; P9IN.5 LCD_RW test
  134. 0= IF ; write LCD bits pattern
  135. AND #0x0F,TOS ; keep low nibble
  136. ADD Y,TOS ; add CMD to DATA in TOS
  137. MOV.B TOS, &0x282 ; MOVE LCD_CMD_and_Data bits to P9OUT.0123456
  138. BIC.B #0x40,&0x282 ; P9OUT.6 LCD_EN 1-->0 ==> strobe data
  139. MOV @PSP+,TOS ;
  140. MOV @IP+,PC
  141. THEN ; read LCD bits pattern
  142. MOV.B Y,&0x282 ; MOVE LCD_CMD bits to P9OUT.456
  143. SUB #2,PSP
  144. MOV TOS,0(PSP)
  145. BIC.B #0x40,&0x282 ; P9OUT.6 LCD_EN 1-->0 ==> strobe data
  146. MOV.B &0x280,TOS ; get LCD_Data from P9IN.(0-3)
  147. AND.B #0x0F,TOS
  148. MOV @IP+,PC
  149. ENDCODE
  150. ; ------------------------------;
  151. CODE LCD_W ; byte -- write byte
  152. ; ------------------------------;
  153. SUB #2,PSP ;
  154. MOV TOS,0(PSP) ; -- 0bxxxxLLLL 0bHHHHLLLL
  155. RRUM #4,TOS ; -- 0bxxxxLLLL 0bxxxxHHHH
  156. BIC.B #0x20,Y ; P9OUT.5 LCD_RW=0
  157. BIS.B #0x0F,&0x284 ; P9DIR.(0-3) LCD_Data as output
  158. PUSH IP
  159. ASM>FORTH
  160. TOP_LCD 2 20_us \ write high nibble first
  161. TOP_LCD 2 20_us ; ;
  162. ; ------------------------------;
  163. CODE LCD_R ; -- byte read byte
  164. ; ------------------------------;
  165. BIC.B #0x0F,&0x284 ; P9DIR.(0-3) LCD_Data as intput
  166. BIS.B #0x20,Y ; P9OUT.5 LCD_RW=1
  167. PUSH IP
  168. ASM>FORTH
  169. TOP_LCD 2 20_us \ read high nibble first
  170. TOP_LCD 2 20_us
  171. FORTH>ASM ; -- 0b0000HHHH 0b0000LLLL
  172. MOV @RSP+,IP
  173. MOV @PSP+,W ; W = high nibble
  174. RLAM #4,W ; -- 0b0000LLLL W = 0bHHHH0000
  175. ADD.B W,TOS
  176. MOV @IP+,PC
  177. ENDCODE
  178. ; ------------------------------;
  179. CODE LCD_WrF ; func -- Write Fonction
  180. ; ------------------------------;
  181. MOV #0,Y ; P9OUT.4 LCD_RS=0
  182. JMP LCD_W
  183. ENDCODE
  184. ; ------------------------------;
  185. CODE LCD_RdS ; -- status Read Status
  186. ; ------------------------------;
  187. MOV #0,Y ; P9OUT.4 LCD_RS=0
  188. JMP LCD_R
  189. ENDCODE
  190. ; ------------------------------;
  191. CODE LCD_WrC ; char -- Write Char
  192. ; ------------------------------;
  193. MOV #0x10,Y ; P9OUT.4 LCD_RS=1
  194. JMP LCD_W
  195. ENDCODE
  196. ; ------------------------------;
  197. CODE LCD_RdC ; -- char Read Char
  198. ; ------------------------------;
  199. MOV #0x10,Y ; P9OUT.4 LCD_RS=1
  200. JMP LCD_R
  201. ENDCODE
  202. ; ------------------------------;
  203. ; : LCD_Clear 0x01 LCD_WrF 80 20_us ; ; perhaps bad init
  204. : LCD_Clear 0x01 LCD_WrF 100 20_us ;
  205. ; ------------------------------;
  206. : LCD_Home 0x02 LCD_WrF 80 20_us ;
  207. ; ------------------------------;
  208. ; : LCD_Entry_set 0x04 OR LCD_WrF ;
  209. ; : LCD_Display_Ctrl 0x08 OR LCD_WrF ;
  210. ; : LCD_Display_Shift 0x10 OR LCD_WrF ;
  211. ; : LCD_Fn_Set 0x20 OR LCD_WrF ;
  212. ; : LCD_CGRAM_Set 0x40 OR LCD_WrF ;
  213. ; : LCD_Goto 0x80 OR LCD_WrF ;
  214. VARIABLE I2C_OWN_ADR ; slave I2C address without RW flag (low byte) + DATA0 input (HIGH byte)
  215. ; 2 ALLOT ; next the low byte of I2C_OWN_ADR word, it is the input buffer
  216. VARIABLE I2C_S_BUF ; buffer output, lentgh (low byte),DATA0 output (HIGH byte)
  217. ; 2 ALLOT ; this byte lentgh is shared by input and output buffers
  218. VARIABLE MY_I2CADR ; slave I2C address without RW flag (low byte) + DATA0 input (HIGH byte)
  219. 2 ALLOT ; next the low byte of MY_I2CADR word, it is the input buffer
  220. VARIABLE I2CS_OUT ; buffer output, lentgh (low byte),DATA0 output (HIGH byte)
  221. ; 2 ALLOT ; this byte lentgh is shared by input and output buffers
  222. ; **************************************;
  223. CODE I2C_S ; <== eUSCIB0 interrupt vector
  224. ; **************************************;
  225. BIC #0xF8,0(RSP) ; CPU on, GIE off in oldSR
  226. ; --------------------------------------;
  227. MOV #I2CS_OUT,W ; W = buffer output address -1
  228. MOV #MY_I2CADR,X ; X = buffer input address -1
  229. CMP.B @X,&0x65C ; UCBR0ADDRX = own address ?
  230. MOV #0,&0x66C ; write UCB0IFG to clear all int flags
  231. = IF ;
  232. BIS.B #0x20,&0x640 ; UCB0CTLW0(UCTXACK) : software Ack address
  233. BIT.B #0x10,&0X640 ; test UCB0CTLW0(UCTR) R/W bit
  234. 0= IF ; I2C_Master Write ?
  235. ; ------------------------------;
  236. ; slave receive datas ; yes
  237. ; ------------------------------;
  238. MOV X,Y ; Y = input buffer ptr
  239. BEGIN ;
  240. ; --------------------------;
  241. ; slave receive one byte ;
  242. ; --------------------------;
  243. BEGIN ;
  244. BIT.B #0x8C,&0x66C ; UCB0IFG(CLTO,STP,STT,) = 1 ? ( SCL low timeout,STOP, START)
  245. 0<> IF ;
  246. ; ------------------;
  247. ; master stoP/rStart;
  248. ; ------------------;
  249. SUB X,Y ; (ptr-org) = count
  250. MOV.B Y,0(W) ; store length in first byte of buffer output
  251. ; ------------------;
  252. BIS.B #0x40,&0x0223 ; P4.6 OUT high ==> switch ON LED1 to test
  253. ; display IR_RC5 command
  254. SUB #4,PSP ;
  255. MOV &BASE,2(PSP) ; save base
  256. MOV TOS,0(PSP) ;
  257. MOV.B 1(X),TOS ; display RC6 command
  258. ; MOV.B 0(W),TOS ; display count
  259. ASM>FORTH \ ; IP is free
  260. ['] LCD_Clear IS CR
  261. ['] LCD_WrC IS EMIT
  262. CR ." 0x" HEX 2 U.R
  263. ['] (CR) IS CR
  264. ['] (EMIT) IS EMIT
  265. FORTH>ASM ; nice code, right ?
  266. MOV @PSP+,&BASE
  267. ; endof display
  268. BIC.B #0x40,&0x0223 ; P4.6 OUT low ==> switch OFF LED1 to test
  269. ; ------------------;
  270. RETI ;
  271. ; ------------------;
  272. THEN ; if not (stop, restart, CLTO)
  273. BIT.B #0x01,&0x66C ; UCB0IFG(RX0) = 1 ?
  274. <> UNTIL ;
  275. ADD #1,Y ; reserve one byte for length first, then preincrement
  276. MOV.B &0x64C,0(Y) ; [UCB0RXBUF] = data --> +[Y]
  277. AGAIN ; loop for new received data if any
  278. THEN ; I2C_Master read
  279. ; ------------------------------;
  280. ; slave transmit datas ; no
  281. ; ------------------------------;
  282. MOV W,Y ; Y = output buffer ptr
  283. ADD #1,Y ; first reserve one byte for length
  284. BEGIN ;
  285. ; --------------------------;
  286. ; slave send byte ;
  287. ; --------------------------;
  288. MOV.B @Y+,&0x64E ; [Y]+ --> UCB0TXBUF
  289. BEGIN ;
  290. BIT.B #0x8C,&0x66C ; UCB0IFG(CLTO,STP,STT,) = 1 ? ( SCL low timeout,STOP, START)
  291. 0<> IF ;
  292. ; ------------------;
  293. ; master stoP/rStart;
  294. ; ------------------;
  295. SUB W,Y ; BUF (ptr-org)= count+1
  296. SUB.B #1,Y ; Y = count
  297. MOV.B Y,0(W) ; store length in buf_out(0)
  298. ; ------------------;
  299. RETI ;
  300. ; ------------------;
  301. THEN ;
  302. BIT.B #0x02,&0x66C ; UCB0IFG(TX0) = 1 ?
  303. <> UNTIL ;
  304. AGAIN ;
  305. THEN ; if bad I2C address
  306. BIC.B #0x20,&0x640 ; UCB0CTLW0(UCTXACK) : send Nack address
  307. RETI ;
  308. ENDCODE
  309. ; --------------------------------------;
  310. CODE START ;
  311. ; --------------------------------------;
  312. ; UCB0CTLW0 = 0b0000 0111 1100 0001 0x640
  313. ; - UCMST = 0 : I2C_Slave
  314. ; -- UCMODE = 0b11 = I2C
  315. ; _ USYNC=1 (always 1)
  316. ; -- UCSSEL=SMCLK (don't care in slave mode)
  317. ; - UCTXACK=0 not auto ACK slave address
  318. ; - UCTR=0 : RX
  319. ; - UCSWRST=1
  320. ; UCB0CTLW1 = 0b0000 0000 1101 0000 0x642
  321. ; - UCETXINT=0 : UCTXIFG0 set address match UCxI2COAx and TX mode
  322. ; -- UCCLTO=0b11 : SCL low time out = 34 ms
  323. ; - UCSWACK=1 : UCTXACK must be written to continue
  324. ; UCB0RXBUF 0x64C
  325. ; UCB0TXBUF 0x64E
  326. ; UCB0I2COA0 0x654 must be written ? enabled ?
  327. ; UCB0ADDRX 0x65C
  328. ; UCB0ADDMSK 0x65E
  329. ; UCB0IE = 0b0000 0000 0000 0100 0x66A
  330. ; - UCSTTIE : StartCond Interrupt only
  331. ; UCB0IFG 0x66C
  332. ; UCB0IV 0x66E : write it to clear all IFG
  333. ; ------------------------------;
  334. ; init I2C_slave ;
  335. ; ------------------------------;
  336. BIS #1,&0x640 ; set eUSCI_B0 in reset state, clear UCB0IE & UCB0IFG all flags
  337. BIS #0x07A0,&0x640 ;
  338. BIS #0x0010,&0x642 ; UCB0CTLW1 : set software ack address
  339. MOV #0x040A,&0x654 ; UCB0I2COA0 : UCOAEN=1 enable with address slave
  340. MOV #0,&0x65E ; UCB0ADDMSK : enable address mask for all addresses i.e. software address
  341. BIC #1,&0x640 ; activate eUSCI_B
  342. MOV #0x0004,&0x66A ; UCB0IE : enable StartCond interrupt
  343. MOV #0b1010,&MY_I2CADR ; my slave address, without RW flag !
  344. ; MOV #0b1011,&MY_I2CADR ; not my slave address, without RW flag !
  345. ; --------------------------------------;
  346. ; TB0CTL = 0b0000 0010 1001 0100 0x3C0
  347. ; - - CNTL Counter lentgh ; 00 = 16 bits
  348. ; -- TBSSEL TimerB clock select ; 10 = SMCLK
  349. ; -- ID input divider ; 10 = /4
  350. ; -- MC Mode Control ; 01 = up mode
  351. ; - TBCLR TimerB Clear
  352. ; - TBIE
  353. ; - TBIFG
  354. ; --------------------------------------;
  355. ; TB0CCTLx = 0b0000 0000 0110 0000 0x3C{2,4,6,8,A,C,E}
  356. ; -- CM Capture Mode
  357. ; -- CCIS
  358. ; - SCS
  359. ; -- CLLD
  360. ; - CAP
  361. ; --- OUTMOD ; 011 = set/reset
  362. ; - CCIE
  363. ; - CCI
  364. ; - OUT
  365. ; - COV
  366. ; - CCIFG
  367. ; TB0CCRx 0x3D{2,4,6,8,A,C,E}
  368. ; TB0EX0 0x3E0
  369. ; ------------------------------;
  370. ; set TimerB to make 50kHz PWM ;
  371. ; ------------------------------;
  372. ; MOV #0b1000010100,&0x3C0 ; TB0CTL = SMCLK/1, up mode, clear timer, no int
  373. ; MOV #0,&0x03E0 ; predivide by 1 in TB0EX0 register (1 MHZ) (generate 25 kHz PWM)
  374. ; ------------------------------;
  375. ; MOV #0b1000010100,&0x3C0 ; TB0CTL = SMCLK/1, up mode, clear timer, no int
  376. ; MOV #1,&0x03E0 ; predivide by 2 in TB0EX0 register (4 MHZ)
  377. ; ------------------------------;
  378. MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int
  379. MOV #0,&0x03E0 ; predivide by 1 in TB0EX0 register (8 MHZ)
  380. ; ------------------------------;
  381. ; MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int
  382. ; MOV #1,&0x03E0 ; predivide by 2 in TB0EX0 register (16 MHZ)
  383. ; ------------------------------;
  384. ; MOV #0b1010010100,&0x3C0 ; TB0CTL = SMCLK/4, up mode, clear timer, no int
  385. ; MOV #2,&0x03E0 ; predivide by 3 in TB0EX0 register (24 MHZ)
  386. ; ------------------------------;
  387. MOV #40,&0x3D2 ; TB0CCR0 = 40*0.5us=20us (40us @ 1MHz)
  388. ; ------------------------------;
  389. ; set TimerB to generate LCD_V0 via TB0.2 and P3.6/P6.6
  390. ; ------------------------------;
  391. MOV #0b1100000,&0x3C6 ; TB0CCTL2 output mode = set/reset ; clear CCIFG
  392. MOV #20,&0x3D6 ; TB0CCR2 ; contrast adjust : 20/40 ==> LCD_Vo = -1V1
  393. ; ------------------------------;
  394. ; init PORTA (P2:P1) (complement)
  395. BIC.B #0xC0,&0x206 ; P1REN.76 SDA + SCL pullup/down disable
  396. BIS.B #0xC0,&0x20A ; P1SEL0.76 on : enable I2C I/O
  397. ; ------------------------------;
  398. ; init PORTB (P4:P3) (complement)
  399. BIS.B #0x40,&0x224 ; P3DIR.6 TB0.2 output
  400. BIS.B #0x40,&0x22C ; P3SEL1.6 TB0.2
  401. ; ------------------------------;
  402. ; init PORTE (P9:P10) (complement)
  403. BIS.B #0x7F,&0x284 ; P9DIR.0123 as output, wired to DB.4567 LCD_Data
  404. ; P9DIR.456 as outputs, wired to LCD_RS LCD_RW LCD_EN
  405. BIC.B #0x7F,&0x286 ; P9REN.0123 LCD_Data pullup/down disable
  406. ; P9REN.456 LCD_RS, LCD_RW, LCD_EN, pullup/down disable
  407. BIC.B #0x30,&0x282 ; P9OUT.45 LCD_RS = LCD_RW = 0
  408. ; ------------------------------;
  409. ; WDT interval init part ;
  410. ; ------------------------------;
  411. ; MOV #0x5A5E,&0x15C ; init WDT Vloclk source 10kHz /2^9 (50 ms), interval mode
  412. MOV #0x5A3D,&0x15C ; init WDT ACLK source 32.768kHz /2^13 (250 ms), interval mode
  413. ; MOV #0x5A5D,&0x15C ; init WDT Vloclk source 10kHz /2^13 (820 ms), interval mode
  414. BIS #1,&0x100 ; enable WDT interval mode interrupt in SFRIE
  415. ; ------------------------------;
  416. ; init interrupt vectors
  417. ; ------------------------------;
  418. MOV #I2C_S,&0xFFEC ; eUSCIB0 interrupt vector
  419. MOV #WDT_int,&0xFFF2 ; init WDT interval vector interrupt
  420. ; ------------------------------;
  421. ; Init LCD
  422. ; ------------------------------;
  423. ASM>FORTH
  424. 0x03E8 20_us \ ; 1- wait 20 ms
  425. 0x03 TOP_LCD \ ; 2- send DB5=DB4=1
  426. 0xCD 20_us \ ; 3- wait 4,1 ms
  427. 0x03 TOP_LCD \ ; 4- send again DB5=DB4=1
  428. 5 20_us \ ; 5- wait 0,1 ms
  429. 0x03 TOP_LCD \ ; 6- send again again DB5=DB4=1
  430. 2 20_us \ ; wait 40 us = LCD cycle
  431. 0x02 TOP_LCD \ ; 7- send DB5=1 DB4=0
  432. 2 20_us \ ; wait 40 us = LCD cycle
  433. 0x28 LCD_WrF \ ; 8- 0b001DNFxx "FonctionSet" D=8/4 DataBus width, Number of lines=2/1, Font bold/normal
  434. 0x08 LCD_WrF \ ; 9- 0b1DCB "DisplayControl" : Display off, Cursor off, Blink off.
  435. LCD_Clear \ ; 10- "LCD_Clear"
  436. 0x06 LCD_WrF \ ; 11- 0b01xx "LCD_EntrySet" : address and cursor shift after writing in RAM
  437. 0x0C LCD_WrF \ ; 12- 0b1DCB "DisplayControl" : Display on, Cursor off, Blink off.
  438. ['] LCD_WrC IS EMIT \ EMIT is redirected to LCD_WrC
  439. CR ." SYSRSTIV = "
  440. HEX 0x1800 @ 2 U.R \ print SAVE_SYSRSTIV
  441. ['] (EMIT) IS EMIT \ restore EMIT
  442. ." Type STOP to quit I2C_Slave_to_LCD"
  443. LIT RECURSE IS WARM \ ; redirect WARM to START...
  444. (WARM) ; ; ...and finish START with (WARM)
  445. CODE STOP
  446. MOV #0b1010000100,&0x3C0 ; TB0CTL = SMCLK/4, STOP mode, clear timer, no int
  447. MOV #1,&0x640 ; set eUSCI_B0 in reset state, clear UCB0IE & UCB0IFG flags
  448. BIC #1,&0x100 ; disable WDT interval mode interrupt in SFRIE
  449. ASM>FORTH
  450. ['] (WARM) IS WARM \ ; reconnect WARM to (WARM)
  451. -1 ABORT"
  452. ;
  453. ; DUP HERE SWAP - DUMP ; general minidump, part 2
  454. ; words
  455. FORGET I2C_Slave FORGET WDT_Int ; not FORTH executable
  456. FORGET 20_us FORGET LCD_W ; because they are not necessary
  457. FORGET LCD_R FORGET TOP_LCD ; because they are not necessary
  458. ECHO
  459. ; compiling done
  460. RST_HERE ;
  461. START ; hit key enter :