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/modules/dev9/ps2dev9.c

https://bitbucket.org/ifcaro/open-ps2-loader/
C | 1146 lines | 895 code | 200 blank | 51 comment | 202 complexity | a2a683338c85be507f22b24b8c4d7e24 MD5 | raw file
Possible License(s): CC-BY-SA-3.0, MPL-2.0-no-copyleft-exception, GPL-2.0
  1. /*
  2. # _____ ___ ____ ___ ____
  3. # ____| | ____| | | |____|
  4. # | ___| |____ ___| ____| | \ PS2DEV Open Source Project.
  5. #-----------------------------------------------------------------------
  6. # Copyright (c) 2003 Marcus R. Brown <mrbrown@0xd6.org>
  7. # Licenced under Academic Free License version 2.0
  8. # Review ps2sdk README & LICENSE files for further details.
  9. #
  10. # $Id$
  11. # DEV9 Device Driver.
  12. */
  13. #include <types.h>
  14. #include <defs.h>
  15. #include <loadcore.h>
  16. #include <intrman.h>
  17. #include <dmacman.h>
  18. #include <thbase.h>
  19. #include <thsemap.h>
  20. #ifdef DEBUG
  21. #include <stdio.h>
  22. #endif
  23. #include <dev9.h>
  24. #ifdef POWEROFF
  25. #include <poweroff.h>
  26. #endif
  27. #ifdef DEV9X_DEV
  28. #include <ioman.h>
  29. #include "ioman_add.h"
  30. #endif
  31. //#define INIT_SMAP 1 //Disabled to avoid breaking compatibility with clone/compatible adaptors.
  32. #include <aifregs.h>
  33. #include <dev9regs.h>
  34. #include <speedregs.h>
  35. #include <smapregs.h>
  36. #define MODNAME "dev9_driver"
  37. #define DRIVERNAME "dev9"
  38. IRX_ID(MODNAME, 1, 1);
  39. #ifdef DEBUG
  40. #define M_PRINTF(format, args...) \
  41. printf(MODNAME ": " format, ## args)
  42. #else
  43. #define M_PRINTF(format, args...) \
  44. do {} while (0)
  45. #endif
  46. #define VERSION "1.0"
  47. #define BANNER "\nDEV9 device driver v%s - Copyright (c) 2003 Marcus R. Brown\n\n"
  48. /* SSBUS registers. */
  49. #define SSBUS_R_1418 0xbf801418
  50. #define SSBUS_R_141c 0xbf80141c
  51. #define SSBUS_R_1420 0xbf801420
  52. static int dev9type = -1; /* 0 for PCMCIA, 1 for expansion bay */
  53. #ifdef PCMCIA
  54. static int using_aif = 0; /* 1 if using AIF on a T10K */
  55. #endif
  56. static void (*p_dev9_intr_cb)(int flag) = NULL;
  57. static int dma_lock_sem = -1; /* used to arbitrate DMA */
  58. #ifdef PCMCIA
  59. static int pcic_cardtype; /* Translated value of bits 0-1 of 0xbf801462 */
  60. static int pcic_voltage; /* Translated value of bits 2-3 of 0xbf801462 */
  61. #endif
  62. static s16 eeprom_data[5]; /* 2-byte EEPROM status (0/-1 = invalid, 1 = valid),
  63. 6-byte MAC address,
  64. 2-byte MAC address checksum. */
  65. /* Each driver can register callbacks that correspond to each bit of the
  66. SMAP interrupt status register (0xbx000028). */
  67. static dev9_intr_cb_t dev9_intr_cbs[16];
  68. static dev9_shutdown_cb_t dev9_shutdown_cbs[16];
  69. static dev9_dma_cb_t dev9_predma_cbs[4], dev9_postdma_cbs[4];
  70. static int dev9_intr_dispatch(int flag);
  71. #ifdef POWEROFF
  72. static void dev9x_on_shutdown(void*);
  73. #endif
  74. static void dev9_set_stat(int stat);
  75. static int read_eeprom_data(void);
  76. static int dev9_device_probe(void);
  77. static int dev9_device_reset(void);
  78. static int dev9_init(void);
  79. static int speed_device_init(void);
  80. #ifdef PCMCIA
  81. static void pcmcia_set_stat(int stat);
  82. static int pcic_ssbus_mode(int mode);
  83. static int pcmcia_device_probe(void);
  84. static int pcmcia_device_reset(void);
  85. static int card_find_manfid(u32 manfid);
  86. static int pcmcia_init(void);
  87. #endif
  88. static void expbay_set_stat(int stat);
  89. static int expbay_device_probe(void);
  90. static int expbay_device_reset(void);
  91. static int expbay_init(void);
  92. struct irx_export_table _exp_dev9;
  93. #ifdef DEV9X_DEV
  94. static int dev9x_dummy(void) { return 0; }
  95. static int dev9x_devctl(iop_file_t *f, const char *name, int cmd, void *args, int arglen, void *buf, int buflen)
  96. {
  97. if (cmd == 0x4401)
  98. return dev9type;
  99. return 0;
  100. }
  101. /* driver ops func tab */
  102. static void *dev9x_ops[27] = {
  103. (void*)dev9x_dummy,
  104. (void*)dev9x_dummy,
  105. (void*)dev9x_dummy,
  106. (void*)dev9x_dummy,
  107. (void*)dev9x_dummy,
  108. (void*)dev9x_dummy,
  109. (void*)dev9x_dummy,
  110. (void*)dev9x_dummy,
  111. (void*)dev9x_dummy,
  112. (void*)dev9x_dummy,
  113. (void*)dev9x_dummy,
  114. (void*)dev9x_dummy,
  115. (void*)dev9x_dummy,
  116. (void*)dev9x_dummy,
  117. (void*)dev9x_dummy,
  118. (void*)dev9x_dummy,
  119. (void*)dev9x_dummy,
  120. (void*)dev9x_dummy,
  121. (void*)dev9x_dummy,
  122. (void*)dev9x_dummy,
  123. (void*)dev9x_dummy,
  124. (void*)dev9x_dummy,
  125. (void*)dev9x_dummy,
  126. (void*)dev9x_devctl,
  127. (void*)dev9x_dummy,
  128. (void*)dev9x_dummy,
  129. (void*)dev9x_dummy
  130. };
  131. /* driver descriptor */
  132. static iop_ext_device_t dev9x_dev = {
  133. "dev9x",
  134. IOP_DT_FS | 0x10000000, /* EXT FS */
  135. 1,
  136. "DEV9",
  137. (struct _iop_ext_device_ops *)&dev9x_ops
  138. };
  139. #endif
  140. int _start(int argc, char **argv)
  141. {
  142. USE_DEV9_REGS;
  143. int idx, res = 1;
  144. u16 dev9hw;
  145. M_PRINTF(BANNER, VERSION);
  146. #ifdef CHECK_LOADED
  147. iop_library_t *libptr;
  148. libptr = GetLoadcoreInternalData()->let_next;
  149. while ((libptr != 0))
  150. {
  151. int i;
  152. for (i = 0; i <= sizeof(DRIVERNAME); i++) {
  153. if (libptr->name[i] != DRIVERNAME[i])
  154. break;
  155. }
  156. if (i > sizeof(DRIVERNAME)) {
  157. M_PRINTF("Driver already loaded.\n");
  158. return 1;
  159. }
  160. libptr = libptr->prev;
  161. }
  162. #endif
  163. for (idx = 0; idx < 16; idx++)
  164. dev9_shutdown_cbs[idx] = NULL;
  165. dev9hw = DEV9_REG(DEV9_R_REV) & 0xf0;
  166. if (dev9hw == 0x20) { /* CXD9566 (PCMCIA) */
  167. dev9type = 0;
  168. #ifdef PCMCIA
  169. res = pcmcia_init();
  170. #else
  171. return 1;
  172. #endif
  173. } else if (dev9hw == 0x30) { /* CXD9611 (Expansion Bay) */
  174. dev9type = 1;
  175. res = expbay_init();
  176. }
  177. if (res)
  178. return res;
  179. #ifdef DEV9X_DEV
  180. DelDrv("dev9x");
  181. AddDrv((iop_device_t *)&dev9x_dev);
  182. #endif
  183. if (RegisterLibraryEntries(&_exp_dev9) != 0) {
  184. return 1;
  185. }
  186. #ifdef POWEROFF
  187. AddPowerOffHandler(dev9x_on_shutdown, 0);
  188. #endif
  189. /* Normal termination. */
  190. M_PRINTF("Dev9 loaded.\n");
  191. return 0;
  192. }
  193. int _exit(void) { return 0; }
  194. /* Export 4 */
  195. void dev9RegisterIntrCb(int intr, dev9_intr_cb_t cb)
  196. {
  197. dev9_intr_cbs[intr] = cb;
  198. }
  199. /* Export 12 */
  200. void dev9RegisterPreDmaCb(int ctrl, dev9_dma_cb_t cb){
  201. dev9_predma_cbs[ctrl] = cb;
  202. }
  203. /* Export 13 */
  204. void dev9RegisterPostDmaCb(int ctrl, dev9_dma_cb_t cb){
  205. dev9_postdma_cbs[ctrl] = cb;
  206. }
  207. /* flag is 1 if a card (pcmcia) was removed or added */
  208. static int dev9_intr_dispatch(int flag)
  209. {
  210. USE_SPD_REGS;
  211. int i, bit;
  212. if (flag) {
  213. for (i = 0; i < 16; i++)
  214. if (dev9_intr_cbs[i] != NULL)
  215. dev9_intr_cbs[i](flag);
  216. }
  217. while (SPD_REG16(SPD_R_INTR_STAT) & SPD_REG16(SPD_R_INTR_MASK)) {
  218. for (i = 0; i < 16; i++) {
  219. if (dev9_intr_cbs[i] != NULL) {
  220. bit = (SPD_REG16(SPD_R_INTR_STAT) &
  221. SPD_REG16(SPD_R_INTR_MASK)) >> i;
  222. if (bit & 0x01)
  223. dev9_intr_cbs[i](flag);
  224. }
  225. }
  226. }
  227. return 0;
  228. }
  229. static void dev9_set_stat(int stat)
  230. {
  231. if (dev9type == 0)
  232. #ifdef PCMCIA
  233. pcmcia_set_stat(stat);
  234. #else
  235. return;
  236. #endif
  237. else if (dev9type == 1)
  238. expbay_set_stat(stat);
  239. }
  240. static int dev9_device_probe(void)
  241. {
  242. if (dev9type == 0)
  243. #ifdef PCMCIA
  244. return pcmcia_device_probe();
  245. #else
  246. return -1;
  247. #endif
  248. else if (dev9type == 1)
  249. return expbay_device_probe();
  250. return -1;
  251. }
  252. static int dev9_device_reset(void)
  253. {
  254. if (dev9type == 0)
  255. #ifdef PCMCIA
  256. return pcmcia_device_reset();
  257. #else
  258. return -1;
  259. #endif
  260. else if (dev9type == 1)
  261. return expbay_device_reset();
  262. return -1;
  263. }
  264. /* Export 6 */
  265. void dev9Shutdown(void)
  266. {
  267. int idx;
  268. USE_DEV9_REGS;
  269. for (idx = 0; idx < 16; idx++)
  270. if (dev9_shutdown_cbs[idx])
  271. dev9_shutdown_cbs[idx]();
  272. if (dev9type == 0) { /* PCMCIA */
  273. #ifdef PCMCIA
  274. DEV9_REG(DEV9_R_POWER) = 0;
  275. DEV9_REG(DEV9_R_1474) = 0;
  276. #endif
  277. } else if (dev9type == 1) {
  278. DEV9_REG(DEV9_R_1466) = 1;
  279. DEV9_REG(DEV9_R_1464) = 0;
  280. DEV9_REG(DEV9_R_1460) = DEV9_REG(DEV9_R_1464);
  281. DEV9_REG(DEV9_R_POWER) = DEV9_REG(DEV9_R_POWER) & ~4;
  282. DEV9_REG(DEV9_R_POWER) = DEV9_REG(DEV9_R_POWER) & ~1;
  283. }
  284. DelayThread(1000000);
  285. }
  286. /* Export 7 */
  287. void dev9IntrEnable(int mask)
  288. {
  289. USE_SPD_REGS;
  290. int flags;
  291. CpuSuspendIntr(&flags);
  292. SPD_REG16(SPD_R_INTR_MASK) = SPD_REG16(SPD_R_INTR_MASK) | mask;
  293. CpuResumeIntr(flags);
  294. }
  295. /* Export 8 */
  296. void dev9IntrDisable(int mask)
  297. {
  298. USE_SPD_REGS;
  299. int flags;
  300. CpuSuspendIntr(&flags);
  301. SPD_REG16(SPD_R_INTR_MASK) = SPD_REG16(SPD_R_INTR_MASK) & ~mask;
  302. CpuResumeIntr(flags);
  303. }
  304. /* Export 5 */
  305. int dev9DmaTransfer(int ctrl, void *buf, int bcr, int dir)
  306. {
  307. USE_SPD_REGS;
  308. int res = 0, dmactrl;
  309. switch(ctrl){
  310. case 0:
  311. case 1: dmactrl = ctrl;
  312. break;
  313. case 2:
  314. case 3:
  315. if (dev9_predma_cbs[ctrl] == NULL) return -1;
  316. if (dev9_postdma_cbs[ctrl] == NULL) return -1;
  317. dmactrl = (4 << ctrl);
  318. break;
  319. default:
  320. return -1;
  321. }
  322. if ((res = WaitSema(dma_lock_sem)) < 0)
  323. return res;
  324. SPD_REG16(SPD_R_DMA_CTRL) = (SPD_REG16(SPD_R_REV_1)<17)?(dmactrl&0x03)|0x04:(dmactrl&0x01)|0x06;
  325. if (dev9_predma_cbs[ctrl])
  326. dev9_predma_cbs[ctrl](bcr, dir);
  327. dmac_request(IOP_DMAC_DEV9, buf, bcr&0xFFFF, bcr>>16, dir);
  328. dmac_transfer(IOP_DMAC_DEV9);
  329. /* Wait for DMA to complete. Do not use a semaphore as thread switching hurts throughput greatly. */
  330. while(dmac_ch_get_chcr(IOP_DMAC_DEV9)&DMAC_CHCR_TR){}
  331. res = 0;
  332. if (dev9_postdma_cbs[ctrl])
  333. dev9_postdma_cbs[ctrl](bcr, dir);
  334. SignalSema(dma_lock_sem);
  335. return res;
  336. }
  337. static int read_eeprom_data(void)
  338. {
  339. USE_SPD_REGS;
  340. int i, j, res = -2;
  341. u8 val;
  342. if (eeprom_data[0] < 0)
  343. goto out;
  344. SPD_REG8(SPD_R_PIO_DIR) = 0xe1;
  345. DelayThread(1);
  346. SPD_REG8(SPD_R_PIO_DATA) = 0x80;
  347. DelayThread(1);
  348. for (i = 0; i < 2; i++) {
  349. SPD_REG8(SPD_R_PIO_DATA) = 0xa0;
  350. DelayThread(1);
  351. SPD_REG8(SPD_R_PIO_DATA) = 0xe0;
  352. DelayThread(1);
  353. }
  354. for (i = 0; i < 7; i++) {
  355. SPD_REG8(SPD_R_PIO_DATA) = 0x80;
  356. DelayThread(1);
  357. SPD_REG8(SPD_R_PIO_DATA) = 0xc0;
  358. DelayThread(1);
  359. }
  360. SPD_REG8(SPD_R_PIO_DATA) = 0xc0;
  361. DelayThread(1);
  362. val = SPD_REG8(SPD_R_PIO_DATA);
  363. DelayThread(1);
  364. if (val & 0x10) { /* Error. */
  365. SPD_REG8(SPD_R_PIO_DATA) = 0;
  366. DelayThread(1);
  367. res = -1;
  368. eeprom_data[0] = 0;
  369. goto out;
  370. }
  371. SPD_REG8(SPD_R_PIO_DATA) = 0x80;
  372. DelayThread(1);
  373. /* Read the MAC address and checksum from the EEPROM. */
  374. for (i = 0; i < 4; i++) {
  375. eeprom_data[i+1] = 0;
  376. for (j = 15; j >= 0; j--) {
  377. SPD_REG8(SPD_R_PIO_DATA) = 0xc0;
  378. DelayThread(1);
  379. val = SPD_REG8(SPD_R_PIO_DATA);
  380. if (val & 0x10)
  381. eeprom_data[i+1] |= (1<<j);
  382. SPD_REG8(SPD_R_PIO_DATA) = 0x80;
  383. DelayThread(1);
  384. }
  385. }
  386. SPD_REG8(SPD_R_PIO_DATA) = 0;
  387. DelayThread(1);
  388. eeprom_data[0] = 1; /* The EEPROM data is valid. */
  389. res = 0;
  390. out:
  391. SPD_REG8(SPD_R_PIO_DIR) = 1;
  392. return res;
  393. }
  394. /* Export 9 */
  395. int dev9GetEEPROM(u16 *buf)
  396. {
  397. int i;
  398. if (!eeprom_data[0])
  399. return -1;
  400. if (eeprom_data[0] < 0)
  401. return -2;
  402. /* We only return the MAC address and checksum. */
  403. for (i = 0; i < 4; i++)
  404. buf[i] = eeprom_data[i+1];
  405. return 0;
  406. }
  407. /* Export 10 */
  408. void dev9LEDCtl(int ctl)
  409. {
  410. USE_SPD_REGS;
  411. SPD_REG8(SPD_R_PIO_DATA) = (ctl == 0);
  412. }
  413. /* Export 11 */
  414. int dev9RegisterShutdownCb(int idx, dev9_shutdown_cb_t cb){
  415. if (idx < 16)
  416. {
  417. dev9_shutdown_cbs[idx] = cb;
  418. return 0;
  419. }
  420. return -1;
  421. }
  422. static int dev9_init(void)
  423. {
  424. int i;
  425. if ((dma_lock_sem = CreateMutex(IOP_MUTEX_UNLOCKED)) < 0)
  426. return -1;
  427. /* Enable the DEV9 DMAC channel. */
  428. dmac_enable(IOP_DMAC_DEV9);
  429. /* Not quite sure what this enables yet. */
  430. dev9_set_stat(0x103);
  431. /* Disable all device interrupts. */
  432. dev9IntrDisable(0xffff);
  433. p_dev9_intr_cb = (void *)dev9_intr_dispatch;
  434. /* Reset the SMAP interrupt callback table. */
  435. for (i = 0; i < 16; i++)
  436. dev9_intr_cbs[i] = NULL;
  437. for (i = 0; i < 4; i++){
  438. dev9_predma_cbs[i] = NULL;
  439. dev9_postdma_cbs[i] = NULL;
  440. }
  441. /* Read in the MAC address. */
  442. read_eeprom_data();
  443. /* Turn the LED off. */
  444. dev9LEDCtl(0);
  445. return 0;
  446. }
  447. #ifdef INIT_SMAP
  448. static int dev9_smap_read_phy(volatile u8 *emac3_regbase, unsigned int address, unsigned int *data){
  449. unsigned int i, PHYRegisterValue;
  450. int result;
  451. PHYRegisterValue=(address&SMAP_E3_PHY_REG_ADDR_MSK)|SMAP_E3_PHY_READ|((SMAP_DsPHYTER_ADDRESS&SMAP_E3_PHY_ADDR_MSK)<<SMAP_E3_PHY_ADDR_BITSFT);
  452. i=0;
  453. result=0;
  454. SMAP_EMAC3_SET(SMAP_R_EMAC3_STA_CTRL, PHYRegisterValue);
  455. do{
  456. if(SMAP_EMAC3_GET(SMAP_R_EMAC3_STA_CTRL)&SMAP_E3_PHY_OP_COMP){
  457. if(SMAP_EMAC3_GET(SMAP_R_EMAC3_STA_CTRL)&SMAP_E3_PHY_OP_COMP){
  458. if((result=SMAP_EMAC3_GET(SMAP_R_EMAC3_STA_CTRL))&SMAP_E3_PHY_OP_COMP){
  459. result>>=SMAP_E3_PHY_DATA_BITSFT;
  460. break;
  461. }
  462. }
  463. }
  464. DelayThread(1000);
  465. i++;
  466. }while(i<100);
  467. if(i>=100){
  468. return 1;
  469. }else{
  470. *data = result;
  471. return 0;
  472. }
  473. }
  474. static int dev9_smap_write_phy(volatile u8 *emac3_regbase, unsigned char address, unsigned short int value){
  475. unsigned int i, PHYRegisterValue;
  476. PHYRegisterValue=(address&SMAP_E3_PHY_REG_ADDR_MSK)|SMAP_E3_PHY_WRITE|((SMAP_DsPHYTER_ADDRESS&SMAP_E3_PHY_ADDR_MSK)<<SMAP_E3_PHY_ADDR_BITSFT);
  477. PHYRegisterValue|=((unsigned int)value)<<SMAP_E3_PHY_DATA_BITSFT;
  478. i=0;
  479. SMAP_EMAC3_SET(SMAP_R_EMAC3_STA_CTRL, PHYRegisterValue);
  480. for(; !(SMAP_EMAC3_GET(SMAP_R_EMAC3_STA_CTRL)&SMAP_E3_PHY_OP_COMP); i++){
  481. DelayThread(1000);
  482. if(i>=100) break;
  483. }
  484. return((i>=100)?1:0);
  485. }
  486. static int dev9_smap_init(void)
  487. {
  488. unsigned int value;
  489. USE_SPD_REGS;
  490. USE_SMAP_REGS;
  491. USE_SMAP_EMAC3_REGS;
  492. USE_SMAP_TX_BD;
  493. USE_SMAP_RX_BD;
  494. int i;
  495. //Do not perform SMAP initialization if the SPEED device does not have such an interface.
  496. if (!(SPD_REG16(SPD_R_REV_3)&SPD_CAPS_SMAP)) return 0;
  497. SMAP_REG8(SMAP_R_TXFIFO_CTRL) = SMAP_TXFIFO_RESET;
  498. for(i = 9; SMAP_REG8(SMAP_R_TXFIFO_CTRL)&SMAP_TXFIFO_RESET; i--)
  499. {
  500. if (i <= 0) return 1;
  501. DelayThread(1000);
  502. }
  503. SMAP_REG8(SMAP_R_RXFIFO_CTRL) = SMAP_RXFIFO_RESET;
  504. for(i = 9; SMAP_REG8(SMAP_R_RXFIFO_CTRL)&SMAP_RXFIFO_RESET; i--)
  505. {
  506. if (i <= 0) return 1;
  507. DelayThread(1000);
  508. }
  509. SMAP_EMAC3_SET(SMAP_R_EMAC3_MODE0, SMAP_E3_SOFT_RESET);
  510. for (i = 9; SMAP_EMAC3_GET(SMAP_R_EMAC3_MODE0)&SMAP_E3_SOFT_RESET; i--)
  511. {
  512. if (i <= 0) return 3;
  513. DelayThread(1000);
  514. }
  515. if (SPD_REG16(SPD_R_REV_1) >= 0x11) SMAP_REG8(SMAP_R_BD_MODE) = SMAP_BD_SWAP;
  516. for(i = 0; i < SMAP_BD_MAX_ENTRY; i++)
  517. {
  518. tx_bd[i].ctrl_stat = 0;
  519. tx_bd[i].reserved = 0;
  520. tx_bd[i].length = 0;
  521. tx_bd[i].pointer = 0;
  522. }
  523. for(i = 0; i < SMAP_BD_MAX_ENTRY; i++)
  524. {
  525. rx_bd[i].ctrl_stat = 0x80; //SMAP_BD_RX_EMPTY
  526. rx_bd[i].reserved = 0;
  527. rx_bd[i].length = 0;
  528. rx_bd[i].pointer = 0;
  529. }
  530. SMAP_REG16(SMAP_R_INTR_CLR) = SMAP_INTR_BITMSK;
  531. if (SPD_REG16(SPD_R_REV_1) < 0x11) SPD_REG8(0x100) = 1;
  532. SMAP_EMAC3_SET(SMAP_R_EMAC3_MODE1, SMAP_E3_FDX_ENABLE|SMAP_E3_IGNORE_SQE|SMAP_E3_MEDIA_100M|SMAP_E3_RXFIFO_2K|SMAP_E3_TXFIFO_1K|SMAP_E3_TXREQ0_MULTI|SMAP_E3_TXREQ1_SINGLE);
  533. SMAP_EMAC3_SET(SMAP_R_EMAC3_TxMODE1, 7<<SMAP_E3_TX_LOW_REQ_BITSFT | 0xF<<SMAP_E3_TX_URG_REQ_BITSFT);
  534. SMAP_EMAC3_SET(SMAP_R_EMAC3_RxMODE, SMAP_E3_RX_RX_RUNT_FRAME|SMAP_E3_RX_RX_FCS_ERR|SMAP_E3_RX_RX_TOO_LONG_ERR|SMAP_E3_RX_RX_IN_RANGE_ERR|SMAP_E3_RX_PROP_PF|SMAP_E3_RX_PROMISC);
  535. SMAP_EMAC3_SET(SMAP_R_EMAC3_INTR_STAT, SMAP_E3_INTR_TX_ERR_0|SMAP_E3_INTR_SQE_ERR_0|SMAP_E3_INTR_DEAD_0);
  536. SMAP_EMAC3_SET(SMAP_R_EMAC3_INTR_ENABLE, SMAP_E3_INTR_TX_ERR_0|SMAP_E3_INTR_SQE_ERR_0|SMAP_E3_INTR_DEAD_0);
  537. SMAP_EMAC3_SET(SMAP_R_EMAC3_ADDR_HI, 0);
  538. SMAP_EMAC3_SET(SMAP_R_EMAC3_ADDR_LO, 0);
  539. SMAP_EMAC3_SET(SMAP_R_EMAC3_PAUSE_TIMER, 0xFFFF);
  540. SMAP_EMAC3_SET(SMAP_R_EMAC3_INTER_FRAME_GAP, 4);
  541. SMAP_EMAC3_SET(SMAP_R_EMAC3_TX_THRESHOLD, 0xC<<SMAP_E3_TX_THRESHLD_BITSFT);
  542. SMAP_EMAC3_SET(SMAP_R_EMAC3_RX_WATERMARK, 0x8<<SMAP_E3_RX_LO_WATER_BITSFT|0x40<<SMAP_E3_RX_HI_WATER_BITSFT);
  543. dev9_smap_write_phy(emac3_regbase, SMAP_DsPHYTER_BMCR, SMAP_PHY_BMCR_RST);
  544. for (i = 9;; i--)
  545. {
  546. if (dev9_smap_read_phy(emac3_regbase, SMAP_DsPHYTER_BMCR, &value)) return 4;
  547. if (!(value & SMAP_PHY_BMCR_RST)) break;
  548. if (i <= 0) return 5;
  549. }
  550. dev9_smap_write_phy(emac3_regbase, SMAP_DsPHYTER_BMCR, SMAP_PHY_BMCR_LPBK|SMAP_PHY_BMCR_100M|SMAP_PHY_BMCR_DUPM);
  551. DelayThread(10000);
  552. SMAP_EMAC3_SET(SMAP_R_EMAC3_MODE0, SMAP_E3_TXMAC_ENABLE|SMAP_E3_RXMAC_ENABLE);
  553. value = SMAP_REG16(SMAP_R_TXFIFO_WR_PTR) + SMAP_TX_BASE;
  554. for(i=0; i<0x5EA; i+=4) SMAP_REG32(SMAP_R_TXFIFO_DATA) = i;
  555. tx_bd[0].length = 0xEA05;
  556. tx_bd[0].pointer = (value >> 8) | (value << 8);
  557. SMAP_REG8(SMAP_R_TXFIFO_FRAME_INC) = 0;
  558. tx_bd[0].ctrl_stat = 0x83; //SMAP_BD_TX_READY|SMAP_BD_TX_GENFCS|SMAP_BD_TX_GENPAD
  559. SMAP_EMAC3_SET(SMAP_R_EMAC3_TxMODE0, SMAP_E3_TX_GNP_0);
  560. for (i = 9;; i--)
  561. {
  562. value = SPD_REG16(SPD_R_INTR_STAT);
  563. if ((value & (SMAP_INTR_RXEND|SMAP_INTR_TXEND|SMAP_INTR_TXDNV)) == (SMAP_INTR_RXEND|SMAP_INTR_TXEND|SMAP_INTR_TXDNV)) break;
  564. if (i <= 0) return 6;
  565. DelayThread(1000);
  566. }
  567. SMAP_EMAC3_SET(SMAP_R_EMAC3_MODE0, SMAP_E3_SOFT_RESET);
  568. return 0;
  569. }
  570. #endif
  571. static int speed_device_init(void)
  572. {
  573. #ifdef DEBUG
  574. USE_SPD_REGS;
  575. const char *spdnames[] = { "(unknown)", "TS", "ES1", "ES2" };
  576. int idx;
  577. u16 spdrev;
  578. #endif
  579. int res;
  580. #ifdef INIT_SMAP
  581. int InitCount;
  582. #endif
  583. eeprom_data[0] = 0;
  584. #ifdef INIT_SMAP
  585. for(InitCount=0; InitCount<8; InitCount++){
  586. #endif
  587. if (dev9_device_probe() < 0) {
  588. M_PRINTF("PC card or expansion device isn't connected.\n");
  589. return -1;
  590. }
  591. dev9_device_reset();
  592. #ifdef PCMCIA
  593. /* Locate the SPEED Lite chip and get the bus ready for the
  594. PCMCIA device. */
  595. if (dev9type == 0) {
  596. if ((res = card_find_manfid(0xf15300)))
  597. M_PRINTF("SPEED Lite not found.\n");
  598. if (!res && (res = pcic_ssbus_mode(5)))
  599. M_PRINTF("Unable to change SSBUS mode.\n");
  600. if (res) {
  601. dev9Shutdown();
  602. return -1;
  603. }
  604. }
  605. #endif
  606. #ifdef INIT_SMAP
  607. if((res = dev9_smap_init()) == 0){
  608. break;
  609. }
  610. dev9Shutdown();
  611. DelayThread(4500000);
  612. }
  613. if (res) {
  614. #ifdef DEBUG
  615. M_PRINTF("SMAP initialization failed: %d\n", res);
  616. #endif
  617. eeprom_data[0] = -1;
  618. }
  619. #endif
  620. #ifdef DEBUG
  621. /* Print out the SPEED chip revision. */
  622. spdrev = SPD_REG16(SPD_R_REV_1);
  623. idx = (spdrev & 0xffff) - 14;
  624. if (spdrev == 9)
  625. idx = 1; /* TS */
  626. else if (spdrev < 9 || (spdrev < 16 || spdrev > 17))
  627. idx = 0; /* Unknown revision */
  628. M_PRINTF("SPEED chip '%s', revision 0x%0X\n", spdnames[idx], spdrev);
  629. #endif
  630. return 0;
  631. }
  632. #ifdef PCMCIA
  633. static int pcic_get_cardtype(void)
  634. {
  635. USE_DEV9_REGS;
  636. u16 val = DEV9_REG(DEV9_R_1462) & 0x03;
  637. if (val == 0)
  638. return 1; /* 16-bit */
  639. else
  640. if (val < 3)
  641. return 2; /* CardBus */
  642. return 0;
  643. }
  644. static int pcic_get_voltage(void)
  645. {
  646. USE_DEV9_REGS;
  647. u16 val = DEV9_REG(DEV9_R_1462) & 0x0c;
  648. if (val == 0x04)
  649. return 3;
  650. if (val == 0 || val == 0x08)
  651. return 1;
  652. if (val == 0x0c)
  653. return 2;
  654. return 0;
  655. }
  656. static int pcic_power(int voltage, int flag)
  657. {
  658. USE_DEV9_REGS;
  659. u16 cstc1, cstc2;
  660. u16 val = (voltage == 1) << 2;
  661. DEV9_REG(DEV9_R_POWER) = 0;
  662. if (voltage == 2)
  663. val |= 0x08;
  664. if (flag == 1)
  665. val |= 0x10;
  666. DEV9_REG(DEV9_R_POWER) = val;
  667. DelayThread(22000);
  668. if (DEV9_REG(DEV9_R_1462) & 0x100)
  669. return 0;
  670. DEV9_REG(DEV9_R_POWER) = 0;
  671. DEV9_REG(DEV9_R_1464) = cstc1 = DEV9_REG(DEV9_R_1464);
  672. DEV9_REG(DEV9_R_1466) = cstc2 = DEV9_REG(DEV9_R_1466);
  673. return -1;
  674. }
  675. static void pcmcia_set_stat(int stat)
  676. {
  677. USE_DEV9_REGS;
  678. u16 val = stat & 0x01;
  679. if (stat & 0x10)
  680. val = 1;
  681. if (stat & 0x02)
  682. val |= 0x02;
  683. if (stat & 0x20)
  684. val |= 0x02;
  685. if (stat & 0x04)
  686. val |= 0x08;
  687. if (stat & 0x08)
  688. val |= 0x10;
  689. if (stat & 0x200)
  690. val |= 0x20;
  691. if (stat & 0x100)
  692. val |= 0x40;
  693. if (stat & 0x400)
  694. val |= 0x80;
  695. if (stat & 0x800)
  696. val |= 0x04;
  697. DEV9_REG(DEV9_R_1476) = val & 0xff;
  698. }
  699. static int pcic_ssbus_mode(int mode)
  700. {
  701. USE_DEV9_REGS;
  702. USE_SPD_REGS;
  703. u16 stat = DEV9_REG(DEV9_R_1474) & 7;
  704. if (mode != 3 && mode != 5)
  705. return -1;
  706. DEV9_REG(DEV9_R_1460) = 2;
  707. if (stat)
  708. return -1;
  709. if (mode == 3) {
  710. DEV9_REG(DEV9_R_1474) = 1;
  711. DEV9_REG(DEV9_R_1460) = 1;
  712. SPD_REG8(0x20) = 1;
  713. DEV9_REG(DEV9_R_1474) = mode;
  714. } else if (mode == 5) {
  715. DEV9_REG(DEV9_R_1474) = mode;
  716. DEV9_REG(DEV9_R_1460) = 1;
  717. SPD_REG8(0x20) = 1;
  718. DEV9_REG(DEV9_R_1474) = 7;
  719. }
  720. _sw(0xe01a3043, SSBUS_R_1418);
  721. DelayThread(5000);
  722. DEV9_REG(DEV9_R_POWER) = DEV9_REG(DEV9_R_POWER) & ~1;
  723. return 0;
  724. }
  725. static int pcmcia_device_probe(void)
  726. {
  727. #ifdef DEBUG
  728. const char *pcic_ct_names[] = { "No", "16-bit", "CardBus" };
  729. #endif
  730. int voltage;
  731. pcic_voltage = pcic_get_voltage();
  732. pcic_cardtype = pcic_get_cardtype();
  733. voltage = (pcic_voltage == 2 ? 5 : (pcic_voltage == 1 ? 3 : 0));
  734. M_PRINTF("%s PCMCIA card detected. Vcc = %dV\n",
  735. pcic_ct_names[pcic_cardtype], voltage);
  736. if (pcic_voltage == 3 || pcic_cardtype != 1)
  737. return -1;
  738. return 0;
  739. }
  740. static int pcmcia_device_reset(void)
  741. {
  742. USE_DEV9_REGS;
  743. u16 cstc1, cstc2;
  744. /* The card must be 16-bit (type 2?) */
  745. if (pcic_cardtype != 1)
  746. return -1;
  747. DEV9_REG(DEV9_R_147E) = 1;
  748. if (pcic_power(pcic_voltage, 1) < 0)
  749. return -1;
  750. DEV9_REG(DEV9_R_POWER) = DEV9_REG(DEV9_R_POWER) | 0x02;
  751. DelayThread(500000);
  752. DEV9_REG(DEV9_R_POWER) = DEV9_REG(DEV9_R_POWER) | 0x01;
  753. DEV9_REG(DEV9_R_1464) = cstc1 = DEV9_REG(DEV9_R_1464);
  754. DEV9_REG(DEV9_R_1466) = cstc2 = DEV9_REG(DEV9_R_1466);
  755. return 0;
  756. }
  757. static int card_find_manfid(u32 manfid)
  758. {
  759. USE_DEV9_REGS;
  760. USE_SPD_REGS;
  761. u32 spdaddr, spdend, next, tuple;
  762. u8 hdr, ofs;
  763. DEV9_REG(DEV9_R_1460) = 2;
  764. _sw(0x1a00bb, SSBUS_R_1418);
  765. /* Scan the card for the MANFID tuple. */
  766. spdaddr = 0;
  767. spdend = 0x1000;
  768. /* I hate this code, and it hates me. */
  769. while (spdaddr < spdend) {
  770. hdr = SPD_REG8(spdaddr) & 0xff;
  771. spdaddr += 2;
  772. if (!hdr)
  773. continue;
  774. if (hdr == 0xff)
  775. break;
  776. if (spdaddr >= spdend)
  777. goto error;
  778. ofs = SPD_REG8(spdaddr) & 0xff;
  779. spdaddr += 2;
  780. if (ofs == 0xff)
  781. break;
  782. next = spdaddr + (ofs * 2);
  783. if (next >= spdend)
  784. goto error;
  785. if (hdr == 0x20) {
  786. if ((spdaddr + 8) >= spdend)
  787. goto error;
  788. tuple = (SPD_REG8(spdaddr + 2) << 24)|
  789. (SPD_REG8(spdaddr) << 16)|
  790. (SPD_REG8(spdaddr + 6) << 8)|
  791. SPD_REG8(spdaddr + 4);
  792. if (manfid == tuple)
  793. return 0;
  794. M_PRINTF("MANFID 0x%08lx doesn't match expected 0x%08lx\n",
  795. tuple, manfid);
  796. return -1;
  797. }
  798. spdaddr = next;
  799. }
  800. M_PRINTF("MANFID 0x%08lx not found.\n", manfid);
  801. return -1;
  802. error:
  803. M_PRINTF("Invalid tuples at offset 0x%08lx.\n", spdaddr - SPD_REGBASE);
  804. return -1;
  805. }
  806. static int pcmcia_intr(void *unused)
  807. {
  808. USE_AIF_REGS;
  809. USE_DEV9_REGS;
  810. u16 cstc1, cstc2;
  811. cstc1 = DEV9_REG(DEV9_R_1464);
  812. cstc2 = DEV9_REG(DEV9_R_1466);
  813. if (using_aif) {
  814. if (aif_regs[AIF_INTSR] & AIF_INTR_PCMCIA)
  815. aif_regs[AIF_INTCL] = AIF_INTR_PCMCIA;
  816. else
  817. return 0; /* Unknown interrupt. */
  818. }
  819. /* Acknowledge the interrupt. */
  820. DEV9_REG(DEV9_R_1464) = cstc1;
  821. DEV9_REG(DEV9_R_1466) = cstc2;
  822. if (cstc1 & 0x03 || cstc2 & 0x03) { /* Card removed or added? */
  823. if (p_dev9_intr_cb)
  824. p_dev9_intr_cb(1);
  825. /* Shutdown the card. */
  826. DEV9_REG(DEV9_R_POWER) = 0;
  827. DEV9_REG(DEV9_R_1474) = 0;
  828. pcmcia_device_probe();
  829. }
  830. if (cstc1 & 0x80 || cstc2 & 0x80) {
  831. if (p_dev9_intr_cb)
  832. p_dev9_intr_cb(0);
  833. }
  834. DEV9_REG(DEV9_R_147E) = 1;
  835. DEV9_REG(DEV9_R_147E) = 0;
  836. return 1;
  837. }
  838. static int pcmcia_init(void)
  839. {
  840. USE_DEV9_REGS;
  841. USE_AIF_REGS;
  842. int *mode;
  843. u16 cstc1, cstc2;
  844. _sw(0x51011, SSBUS_R_1420);
  845. _sw(0x1a00bb, SSBUS_R_1418);
  846. _sw(0xef1a3043, SSBUS_R_141c);
  847. /* If we are a T10K, then we go through AIF. */
  848. if ((mode = QueryBootMode(6)) != NULL) {
  849. if ((*(u16 *)mode & 0xfe) == 0x60) {
  850. M_PRINTF("T10K detected.\n");
  851. if (aif_regs[AIF_IDENT] == 0xa1) {
  852. aif_regs[AIF_INTEN] = AIF_INTR_PCMCIA;
  853. using_aif = 1;
  854. } else {
  855. M_PRINTF("AIF not detected.\n");
  856. return 1;
  857. }
  858. }
  859. }
  860. if (DEV9_REG(DEV9_R_POWER) == 0) {
  861. DEV9_REG(DEV9_R_POWER) = 0;
  862. DEV9_REG(DEV9_R_147E) = 1;
  863. DEV9_REG(DEV9_R_1460) = 0;
  864. DEV9_REG(DEV9_R_1474) = 0;
  865. DEV9_REG(DEV9_R_1464) = cstc1 = DEV9_REG(DEV9_R_1464);
  866. DEV9_REG(DEV9_R_1466) = cstc2 = DEV9_REG(DEV9_R_1466);
  867. DEV9_REG(DEV9_R_1468) = 0x10;
  868. DEV9_REG(DEV9_R_146A) = 0x90;
  869. DEV9_REG(DEV9_R_147C) = 1;
  870. DEV9_REG(DEV9_R_147A) = DEV9_REG(DEV9_R_147C);
  871. pcic_voltage = pcic_get_voltage();
  872. pcic_cardtype = pcic_get_cardtype();
  873. if (speed_device_init() != 0)
  874. return 1;
  875. } else {
  876. _sw(0xe01a3043, SSBUS_R_1418);
  877. }
  878. if (dev9_init() != 0)
  879. return 1;
  880. RegisterIntrHandler(IOP_IRQ_DEV9, 1, &pcmcia_intr, NULL);
  881. EnableIntr(IOP_IRQ_DEV9);
  882. DEV9_REG(DEV9_R_147E) = 0;
  883. M_PRINTF("CXD9566 (PCMCIA type) initialized.\n");
  884. return 0;
  885. }
  886. #endif
  887. static void expbay_set_stat(int stat)
  888. {
  889. USE_DEV9_REGS;
  890. DEV9_REG(DEV9_R_1464) = stat & 0x3f;
  891. }
  892. static int expbay_device_probe(void)
  893. {
  894. USE_DEV9_REGS;
  895. return (DEV9_REG(DEV9_R_1462) & 0x01) ? -1 : 0;
  896. }
  897. static int expbay_device_reset(void)
  898. {
  899. USE_DEV9_REGS;
  900. if (expbay_device_probe() < 0)
  901. return -1;
  902. DEV9_REG(DEV9_R_POWER) = (DEV9_REG(DEV9_R_POWER) & ~1) | 0x04; /* power on */
  903. DelayThread(500000);
  904. DEV9_REG(DEV9_R_1460) = DEV9_REG(DEV9_R_1460) | 0x01;
  905. DEV9_REG(DEV9_R_POWER) = DEV9_REG(DEV9_R_POWER) | 0x01;
  906. DelayThread(500000);
  907. return 0;
  908. }
  909. static int expbay_intr(void *unused)
  910. {
  911. USE_DEV9_REGS;
  912. if (p_dev9_intr_cb)
  913. p_dev9_intr_cb(0);
  914. DEV9_REG(DEV9_R_1466) = 1;
  915. DEV9_REG(DEV9_R_1466) = 0;
  916. return 1;
  917. }
  918. static int expbay_init(void)
  919. {
  920. USE_DEV9_REGS;
  921. _sw(0x51011, SSBUS_R_1420);
  922. _sw(0xe01a3043, SSBUS_R_1418);
  923. _sw(0xef1a3043, SSBUS_R_141c);
  924. if ((DEV9_REG(DEV9_R_POWER) & 0x04) == 0) { /* if not already powered */
  925. DEV9_REG(DEV9_R_1466) = 1;
  926. DEV9_REG(DEV9_R_1464) = 0;
  927. DEV9_REG(DEV9_R_1460) = DEV9_REG(DEV9_R_1464);
  928. if (speed_device_init() != 0)
  929. return 1;
  930. }
  931. if (dev9_init() != 0)
  932. return 1;
  933. RegisterIntrHandler(IOP_IRQ_DEV9, 1, expbay_intr, NULL);
  934. EnableIntr(IOP_IRQ_DEV9);
  935. DEV9_REG(DEV9_R_1466) = 0;
  936. M_PRINTF("CXD9611 (Expansion Bay type) initialized.\n");
  937. return 0;
  938. }
  939. #ifdef POWEROFF
  940. static void dev9x_on_shutdown(void*p)
  941. {
  942. M_PRINTF("shutdown\n");
  943. dev9IntrDisable(-1);
  944. dev9Shutdown();
  945. }
  946. #endif