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/ovm-2.0.1/src/methodology/ovm_meth_defines.svh

http://camlet.googlecode.com/
SystemVerilog | 27 lines | 4 code | 3 blank | 20 comment | 0 complexity | 0c61b43f9bde8c6d9017f4e8f5d49937 MD5 | raw file
Possible License(s): Apache-2.0
 1// $Id: //dvt/vtech/dev/main/ovm/src/methodology/ovm_meth_defines.svh#4 $
 2//----------------------------------------------------------------------
 3//   Copyright 2007-2008 Mentor Graphics Corporation
 4//   Copyright 2007-2008 Cadence Design Systems, Inc.
 5//   All Rights Reserved Worldwide
 6//
 7//   Licensed under the Apache License, Version 2.0 (the
 8//   "License"); you may not use this file except in
 9//   compliance with the License.  You may obtain a copy of
10//   the License at
11//
12//       http://www.apache.org/licenses/LICENSE-2.0
13//
14//   Unless required by applicable law or agreed to in
15//   writing, software distributed under the License is
16//   distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
17//   CONDITIONS OF ANY KIND, either express or implied.  See
18//   the License for the specific language governing
19//   permissions and limitations under the License.
20//----------------------------------------------------------------------
21
22`ifndef OVM_METH_DEFINES_SVH
23`define OVM_METH_DEFINES_SVH
24
25typedef enum bit { OVM_PASSIVE=0, OVM_ACTIVE=1 } ovm_active_passive_enum;
26
27`endif // OVM_METH_DEFINES_SVH