/kern_2.6.32/sound/soc/s3c64xx/s3c-pcm.c

http://omnia2droid.googlecode.com/ · C · 587 lines · 420 code · 116 blank · 51 comment · 69 complexity · c61f553dfec4a768c5687cae346fe7cd MD5 · raw file

  1. /*
  2. * s3c-pcm.c -- ALSA Soc Audio Layer
  3. *
  4. * (c) 2006 Wolfson Microelectronics PLC.
  5. * Graeme Gregory graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com
  6. *
  7. * (c) 2004-2005 Simtec Electronics
  8. * http://armlinux.simtec.co.uk/
  9. * Ben Dooks <ben@simtec.co.uk>
  10. * Ryu Euiyoul <ryu.real@gmail.com>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 of the License, or (at your
  15. * option) any later version.
  16. *
  17. * Revision history
  18. * 11th Dec 2006 Merged with Simtec driver
  19. * 10th Nov 2006 Initial version.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/init.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/slab.h>
  25. #include <linux/dma-mapping.h>
  26. //#include <sound/driver.h>
  27. #include <sound/core.h>
  28. #include <sound/pcm.h>
  29. #include <sound/pcm_params.h>
  30. #include <sound/soc.h>
  31. #include <asm/dma.h>
  32. #include <asm/io.h>
  33. #include <mach/hardware.h>
  34. #include <mach/dma.h>
  35. #include <plat/dma.h>
  36. #include <mach/audio.h>
  37. #include "s3c-pcm.h"
  38. #if defined CONFIG_SND_S3C6400_SOC_AC97
  39. #define MAIN_DMA_CH 1
  40. #else /*S3C6400 I2S */
  41. #define MAIN_DMA_CH 0
  42. #endif
  43. #define ANDROID_BUF_SIZE 4096
  44. //#define CONFIG_SND_DEBUG
  45. #ifdef CONFIG_SND_DEBUG
  46. #define s3cdbg(x...) printk(x)
  47. #else
  48. #define s3cdbg(x...)
  49. #endif
  50. static const struct snd_pcm_hardware s3c24xx_pcm_hardware = {
  51. .info = SNDRV_PCM_INFO_INTERLEAVED |
  52. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  53. SNDRV_PCM_INFO_MMAP |
  54. SNDRV_PCM_INFO_MMAP_VALID,
  55. .formats = SNDRV_PCM_FMTBIT_S16_LE |
  56. SNDRV_PCM_FMTBIT_U16_LE |
  57. SNDRV_PCM_FMTBIT_U8 |
  58. SNDRV_PCM_FMTBIT_S24_LE |
  59. SNDRV_PCM_FMTBIT_S8,
  60. .channels_min = 2,
  61. .channels_max = 2,
  62. .buffer_bytes_max = 128*1024,
  63. .period_bytes_min = 128,
  64. .period_bytes_max = 16*1024,
  65. .periods_min = 2,
  66. .periods_max = 128,
  67. .fifo_size = 32,
  68. };
  69. struct s3c24xx_runtime_data {
  70. spinlock_t lock;
  71. int state;
  72. unsigned int dma_loaded;
  73. unsigned int dma_limit;
  74. unsigned int dma_period;
  75. dma_addr_t dma_start;
  76. dma_addr_t dma_pos;
  77. dma_addr_t dma_end;
  78. struct s3c24xx_pcm_dma_params *params;
  79. };
  80. extern unsigned int ring_buf_index;
  81. extern unsigned int period_index;
  82. /* s3c24xx_pcm_enqueue
  83. *
  84. * place a dma buffer onto the queue for the dma system
  85. * to handle.
  86. */
  87. static void s3c24xx_pcm_enqueue(struct snd_pcm_substream *substream)
  88. {
  89. struct s3c24xx_runtime_data *prtd = substream->runtime->private_data;
  90. unsigned long len = prtd->dma_period;
  91. dma_addr_t pos = prtd->dma_pos;
  92. int ret;
  93. unsigned long next_len = 0;
  94. #if defined (CONFIG_CPU_S3C6400) || defined (CONFIG_CPU_S3C6410)
  95. /* Next length prediction */
  96. dma_addr_t pred_pos;
  97. #endif
  98. s3cdbg("Entered %s\n", __FUNCTION__);
  99. if ((pos + len) > prtd->dma_end) {
  100. len = prtd->dma_end - pos;
  101. s3cdbg(KERN_DEBUG "%s: corrected dma len %ld\n", __FUNCTION__, len);
  102. }
  103. #if defined (CONFIG_CPU_S3C6400) || defined (CONFIG_CPU_S3C6410)
  104. /* DMA with I2S might be unstable when length is too short. */
  105. pred_pos = pos + prtd->dma_period;
  106. next_len = prtd->dma_period;
  107. if ((pred_pos + next_len) > prtd->dma_end) {
  108. next_len = prtd->dma_end - pred_pos;
  109. }
  110. if (next_len <= 32) { /* next transfer is too short */
  111. len += next_len; /* transfer with next small period */
  112. ret = s3c2410_dma_enqueue(prtd->params->channel,
  113. substream, pos, len);
  114. pos += next_len;
  115. }
  116. else
  117. ret = s3c2410_dma_enqueue(prtd->params->channel,
  118. substream, pos, len);
  119. #else
  120. ret = s3c2410_dma_enqueue(prtd->params->channel,
  121. substream, pos, len);
  122. #endif
  123. prtd->dma_pos = pos;
  124. }
  125. static void s3c24xx_audio_buffdone(struct s3c2410_dma_chan *channel,
  126. void *dev_id, int size,
  127. enum s3c2410_dma_buffresult result)
  128. {
  129. struct snd_pcm_substream *substream = dev_id;
  130. struct s3c24xx_runtime_data *prtd;
  131. s3cdbg("Entered %s\n", __FUNCTION__);
  132. if (result == S3C2410_RES_ABORT || result == S3C2410_RES_ERR){
  133. return;
  134. }
  135. else {
  136. if (!substream)
  137. return;
  138. prtd = substream->runtime->private_data;
  139. prtd->dma_pos += prtd->dma_period;
  140. if (prtd->dma_pos >= prtd->dma_end)
  141. prtd->dma_pos = prtd->dma_start;
  142. snd_pcm_period_elapsed(substream);
  143. spin_lock(&prtd->lock);
  144. if (prtd->state & ST_RUNNING)
  145. s3c24xx_pcm_enqueue(substream);
  146. spin_unlock(&prtd->lock);
  147. }
  148. }
  149. static int s3c24xx_pcm_hw_params(struct snd_pcm_substream *substream,
  150. struct snd_pcm_hw_params *params)
  151. {
  152. struct snd_pcm_runtime *runtime = substream->runtime;
  153. struct s3c24xx_runtime_data *prtd = runtime->private_data;
  154. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  155. struct s3c24xx_pcm_dma_params *dma = rtd->dai->cpu_dai->dma_data;
  156. unsigned long totbytes;
  157. int ret=0;
  158. s3cdbg("Entered %s, params = %p \n", __FUNCTION__, prtd->params);
  159. if(substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  160. totbytes = params_buffer_bytes(params) * CONFIG_ANDROID_BUF_NUM;
  161. else
  162. totbytes = params_buffer_bytes(params);
  163. // printk("[%d]:ring_buf_num %d\n", substream->stream, ring_buf_num);
  164. /* return if this is a bufferless transfer e.g.
  165. * codec <--> BT codec or GSM modem -- lg FIXME */
  166. if (!dma)
  167. return 0;
  168. /* this may get called several times by oss emulation
  169. * with different params */
  170. if (prtd->params == NULL) {
  171. prtd->params = dma;
  172. s3cdbg("params %p, client %p, channel %d\n", prtd->params,
  173. prtd->params->client, prtd->params->channel);
  174. /* prepare DMA */
  175. ret = s3c2410_dma_request(prtd->params->channel,
  176. prtd->params->client, NULL);
  177. if (ret) {
  178. printk(KERN_ERR "failed to get dma channel\n");
  179. return ret;
  180. }
  181. } else if (prtd->params != dma) {
  182. s3c2410_dma_free(prtd->params->channel, prtd->params->client);
  183. prtd->params = dma;
  184. s3cdbg("params %p, client %p, channel %d\n", prtd->params,
  185. prtd->params->client, prtd->params->channel);
  186. /* prepare DMA */
  187. ret = s3c2410_dma_request(prtd->params->channel,
  188. prtd->params->client, NULL);
  189. if (ret) {
  190. printk(KERN_ERR "failed to get dma channel\n");
  191. return ret;
  192. }
  193. }
  194. /* channel needs configuring for mem=>device, increment memory addr,
  195. * sync to pclk, half-word transfers to the IIS-FIFO. */
  196. #if !defined (CONFIG_CPU_S3C6400) && !defined (CONFIG_CPU_S3C6410) && !defined(CONFIG_CPU_S5PC100) && !defined (CONFIG_CPU_S5P6440)
  197. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  198. s3c2410_dma_devconfig(prtd->params->channel,
  199. S3C2410_DMASRC_MEM, S3C2410_DISRCC_INC |
  200. S3C2410_DISRCC_APB, prtd->params->dma_addr);
  201. s3c2410_dma_config(prtd->params->channel,
  202. prtd->params->dma_size,
  203. S3C2410_DCON_SYNC_PCLK |
  204. S3C2410_DCON_HANDSHAKE);
  205. } else {
  206. s3c2410_dma_config(prtd->params->channel,
  207. prtd->params->dma_size,
  208. S3C2410_DCON_HANDSHAKE |
  209. S3C2410_DCON_SYNC_PCLK);
  210. s3c2410_dma_devconfig(prtd->params->channel,
  211. S3C2410_DMASRC_HW, 0x3,
  212. prtd->params->dma_addr);
  213. }
  214. #else
  215. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  216. s3c2410_dma_devconfig(prtd->params->channel,
  217. S3C2410_DMASRC_MEM,
  218. prtd->params->dma_addr);
  219. s3c2410_dma_config(prtd->params->channel,
  220. prtd->params->dma_size);
  221. } else {
  222. s3c2410_dma_devconfig(prtd->params->channel,
  223. S3C2410_DMASRC_HW,
  224. prtd->params->dma_addr);
  225. s3c2410_dma_config(prtd->params->channel,
  226. prtd->params->dma_size);
  227. }
  228. #endif
  229. s3c2410_dma_set_buffdone_fn(prtd->params->channel,
  230. s3c24xx_audio_buffdone);
  231. snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
  232. runtime->dma_bytes = totbytes;
  233. spin_lock_irq(&prtd->lock);
  234. prtd->dma_limit = runtime->hw.periods_min;
  235. prtd->dma_period = params_period_bytes(params);
  236. prtd->dma_start = runtime->dma_addr;
  237. prtd->dma_pos = prtd->dma_start;
  238. prtd->dma_end = prtd->dma_start + totbytes;
  239. spin_unlock_irq(&prtd->lock);
  240. s3cdbg("Entered %s, line %d \n", __FUNCTION__, __LINE__);
  241. return 0;
  242. }
  243. static int s3c24xx_pcm_hw_free(struct snd_pcm_substream *substream)
  244. {
  245. struct s3c24xx_runtime_data *prtd = substream->runtime->private_data;
  246. s3cdbg("Entered %s\n", __FUNCTION__);
  247. /* TODO - do we need to ensure DMA flushed */
  248. snd_pcm_set_runtime_buffer(substream, NULL);
  249. if (prtd->params) {
  250. s3c2410_dma_free(prtd->params->channel, prtd->params->client);
  251. prtd->params = NULL;
  252. }
  253. return 0;
  254. }
  255. static int s3c24xx_pcm_prepare(struct snd_pcm_substream *substream)
  256. {
  257. struct s3c24xx_runtime_data *prtd = substream->runtime->private_data;
  258. int ret = 0;
  259. s3cdbg("Entered %s\n", __FUNCTION__);
  260. #if !defined (CONFIG_CPU_S3C6400) && !defined (CONFIG_CPU_S3C6410)
  261. /* return if this is a bufferless transfer e.g.
  262. * codec <--> BT codec or GSM modem -- lg FIXME */
  263. if (!prtd->params)
  264. return 0;
  265. #endif
  266. /* flush the DMA channel */
  267. s3c2410_dma_ctrl(prtd->params->channel, S3C2410_DMAOP_FLUSH);
  268. if(substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  269. ring_buf_index = 0;
  270. period_index = 0;
  271. }
  272. prtd->dma_pos = prtd->dma_start;
  273. /* enqueue dma buffers */
  274. s3c24xx_pcm_enqueue(substream);
  275. return ret;
  276. }
  277. static int s3c24xx_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  278. {
  279. struct s3c24xx_runtime_data *prtd = substream->runtime->private_data;
  280. int ret = 0;
  281. s3cdbg("Entered %s\n", __FUNCTION__);
  282. spin_lock(&prtd->lock);
  283. switch (cmd) {
  284. case SNDRV_PCM_TRIGGER_START:
  285. case SNDRV_PCM_TRIGGER_RESUME:
  286. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  287. prtd->state |= ST_RUNNING;
  288. s3c2410_dma_ctrl(prtd->params->channel, S3C2410_DMAOP_START);
  289. #if !defined (CONFIG_CPU_S3C6400) && !defined (CONFIG_CPU_S3C6410) && !defined (CONFIG_CPU_S5P6440)
  290. s3c2410_dma_ctrl(prtd->params->channel, S3C2410_DMAOP_STARTED);
  291. #endif
  292. break;
  293. case SNDRV_PCM_TRIGGER_STOP:
  294. case SNDRV_PCM_TRIGGER_SUSPEND:
  295. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  296. prtd->state &= ~ST_RUNNING;
  297. s3c2410_dma_ctrl(prtd->params->channel, S3C2410_DMAOP_STOP);
  298. break;
  299. default:
  300. ret = -EINVAL;
  301. break;
  302. }
  303. spin_unlock(&prtd->lock);
  304. return ret;
  305. }
  306. static snd_pcm_uframes_t
  307. s3c24xx_pcm_pointer(struct snd_pcm_substream *substream)
  308. {
  309. struct snd_pcm_runtime *runtime = substream->runtime;
  310. struct s3c24xx_runtime_data *prtd = runtime->private_data;
  311. unsigned long res;
  312. s3cdbg("Entered %s\n", __FUNCTION__);
  313. spin_lock(&prtd->lock);
  314. #if defined (CONFIG_CPU_S3C6400) || defined (CONFIG_CPU_S3C6410)
  315. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  316. res = prtd->dma_pos - prtd->dma_start;
  317. else
  318. res = prtd->dma_pos - prtd->dma_start;
  319. #else
  320. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  321. res = dst - prtd->dma_start;
  322. else
  323. res = src - prtd->dma_start;
  324. #endif
  325. spin_unlock(&prtd->lock);
  326. /* we seem to be getting the odd error from the pcm library due
  327. * to out-of-bounds pointers. this is maybe due to the dma engine
  328. * not having loaded the new values for the channel before being
  329. * callled... (todo - fix )
  330. */
  331. /* Playback mode */
  332. if(substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  333. if (res >= (snd_pcm_lib_buffer_bytes(substream) * CONFIG_ANDROID_BUF_NUM)) {
  334. if (res == (snd_pcm_lib_buffer_bytes(substream) * CONFIG_ANDROID_BUF_NUM))
  335. res = 0;
  336. }
  337. }
  338. /* Capture mode */
  339. else {
  340. if (res >= (snd_pcm_lib_buffer_bytes(substream))) {
  341. if (res == (snd_pcm_lib_buffer_bytes(substream)))
  342. res = 0;
  343. }
  344. }
  345. return bytes_to_frames(substream->runtime, res);
  346. }
  347. static int s3c24xx_pcm_open(struct snd_pcm_substream *substream)
  348. {
  349. struct snd_pcm_runtime *runtime = substream->runtime;
  350. struct s3c24xx_runtime_data *prtd;
  351. s3cdbg("Entered %s\n", __FUNCTION__);
  352. snd_soc_set_runtime_hwparams(substream, &s3c24xx_pcm_hardware);
  353. prtd = kzalloc(sizeof(struct s3c24xx_runtime_data), GFP_KERNEL);
  354. // printk("[%d]: prtd addr 0x%x\n", substream->stream, prtd);
  355. if (prtd == NULL)
  356. return -ENOMEM;
  357. spin_lock_init(&prtd->lock);
  358. runtime->private_data = prtd;
  359. return 0;
  360. }
  361. static int s3c24xx_pcm_close(struct snd_pcm_substream *substream)
  362. {
  363. struct snd_pcm_runtime *runtime = substream->runtime;
  364. struct s3c24xx_runtime_data *prtd = runtime->private_data;
  365. s3cdbg("Entered %s, prtd = %p\n", __FUNCTION__, prtd);
  366. if (prtd)
  367. kfree(prtd);
  368. else
  369. printk("s3c24xx_pcm_close called with prtd == NULL\n");
  370. return 0;
  371. }
  372. static int s3c24xx_pcm_mmap(struct snd_pcm_substream *substream,
  373. struct vm_area_struct *vma)
  374. {
  375. struct snd_pcm_runtime *runtime = substream->runtime;
  376. s3cdbg("Entered %s\n", __FUNCTION__);
  377. return dma_mmap_writecombine(substream->pcm->card->dev, vma,
  378. runtime->dma_area,
  379. runtime->dma_addr,
  380. runtime->dma_bytes);
  381. }
  382. static struct snd_pcm_ops s3c24xx_pcm_ops = {
  383. .open = s3c24xx_pcm_open,
  384. .close = s3c24xx_pcm_close,
  385. .ioctl = snd_pcm_lib_ioctl,
  386. .hw_params = s3c24xx_pcm_hw_params,
  387. .hw_free = s3c24xx_pcm_hw_free,
  388. .prepare = s3c24xx_pcm_prepare,
  389. .trigger = s3c24xx_pcm_trigger,
  390. .pointer = s3c24xx_pcm_pointer,
  391. .mmap = s3c24xx_pcm_mmap,
  392. };
  393. static int s3c24xx_pcm_preallocate_dma_buffer(struct snd_pcm *pcm, int stream)
  394. {
  395. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  396. struct snd_dma_buffer *buf = &substream->dma_buffer;
  397. size_t size = s3c24xx_pcm_hardware.buffer_bytes_max;
  398. s3cdbg("Entered %s\n", __FUNCTION__);
  399. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  400. buf->dev.dev = pcm->card->dev;
  401. buf->private_data = NULL;
  402. buf->area = dma_alloc_writecombine(pcm->card->dev, size,
  403. &buf->addr, GFP_KERNEL);
  404. if (!buf->area)
  405. return -ENOMEM;
  406. buf->bytes = size;
  407. return 0;
  408. }
  409. static void s3c24xx_pcm_free_dma_buffers(struct snd_pcm *pcm)
  410. {
  411. struct snd_pcm_substream *substream;
  412. struct snd_dma_buffer *buf;
  413. int stream;
  414. s3cdbg("Entered %s\n", __FUNCTION__);
  415. for (stream = 0; stream < 2; stream++) {
  416. substream = pcm->streams[stream].substream;
  417. if (!substream)
  418. continue;
  419. buf = &substream->dma_buffer;
  420. if (!buf->area)
  421. continue;
  422. dma_free_writecombine(pcm->card->dev, buf->bytes,
  423. buf->area, buf->addr);
  424. buf->area = NULL;
  425. }
  426. }
  427. static u64 s3c24xx_pcm_dmamask = DMA_32BIT_MASK;
  428. static int s3c24xx_pcm_new(struct snd_card *card,
  429. struct snd_soc_dai *dai, struct snd_pcm *pcm)
  430. {
  431. int ret = 0;
  432. s3cdbg("Entered %s\n", __FUNCTION__);
  433. if (!card->dev->dma_mask)
  434. card->dev->dma_mask = &s3c24xx_pcm_dmamask;
  435. if (!card->dev->coherent_dma_mask)
  436. card->dev->coherent_dma_mask = 0xffffffff;
  437. if (dai->playback.channels_min) {
  438. ret = s3c24xx_pcm_preallocate_dma_buffer(pcm,
  439. SNDRV_PCM_STREAM_PLAYBACK);
  440. if (ret)
  441. goto out;
  442. }
  443. if (dai->capture.channels_min) {
  444. ret = s3c24xx_pcm_preallocate_dma_buffer(pcm,
  445. SNDRV_PCM_STREAM_CAPTURE);
  446. if (ret)
  447. goto out;
  448. }
  449. out:
  450. return ret;
  451. }
  452. struct snd_soc_platform s3c24xx_soc_platform = {
  453. .name = "s3c24xx-audio",
  454. .pcm_ops = &s3c24xx_pcm_ops,
  455. .pcm_new = s3c24xx_pcm_new,
  456. .pcm_free = s3c24xx_pcm_free_dma_buffers,
  457. };
  458. EXPORT_SYMBOL_GPL(s3c24xx_soc_platform);
  459. static int __init s3c_soc_platform_init(void)
  460. {
  461. return snd_soc_register_platform(&s3c24xx_soc_platform);
  462. }
  463. module_init(s3c_soc_platform_init);
  464. static void __exit s3c_soc_platform_exit(void)
  465. {
  466. snd_soc_unregister_platform(&s3c24xx_soc_platform);
  467. }
  468. module_exit(s3c_soc_platform_exit);
  469. MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
  470. MODULE_DESCRIPTION("Samsung S3C24XX PCM DMA module");
  471. MODULE_LICENSE("GPL");