/kern_oII/arch/s390/power/swsusp_asm64.S

http://omnia2droid.googlecode.com/ · Assembly · 184 lines · 116 code · 26 blank · 42 comment · 0 complexity · 5b600142db543528446474aa216ebba9 MD5 · raw file

  1. /*
  2. * S390 64-bit swsusp implementation
  3. *
  4. * Copyright IBM Corp. 2009
  5. *
  6. * Author(s): Hans-Joachim Picht <hans@linux.vnet.ibm.com>
  7. * Michael Holzheu <holzheu@linux.vnet.ibm.com>
  8. */
  9. #include <asm/page.h>
  10. #include <asm/ptrace.h>
  11. #include <asm/asm-offsets.h>
  12. /*
  13. * Save register context in absolute 0 lowcore and call swsusp_save() to
  14. * create in-memory kernel image. The context is saved in the designated
  15. * "store status" memory locations (see POP).
  16. * We return from this function twice. The first time during the suspend to
  17. * disk process. The second time via the swsusp_arch_resume() function
  18. * (see below) in the resume process.
  19. * This function runs with disabled interrupts.
  20. */
  21. .section .text
  22. .align 2
  23. .globl swsusp_arch_suspend
  24. swsusp_arch_suspend:
  25. stmg %r6,%r15,__SF_GPRS(%r15)
  26. lgr %r1,%r15
  27. aghi %r15,-STACK_FRAME_OVERHEAD
  28. stg %r1,__SF_BACKCHAIN(%r15)
  29. /* Deactivate DAT */
  30. stnsm __SF_EMPTY(%r15),0xfb
  31. /* Store prefix register on stack */
  32. stpx __SF_EMPTY(%r15)
  33. /* Save prefix register contents for lowcore */
  34. llgf %r4,__SF_EMPTY(%r15)
  35. /* Get pointer to save area */
  36. lghi %r1,0x1000
  37. /* Store registers */
  38. mvc 0x318(4,%r1),__SF_EMPTY(%r15) /* move prefix to lowcore */
  39. stfpc 0x31c(%r1) /* store fpu control */
  40. std 0,0x200(%r1) /* store f0 */
  41. std 1,0x208(%r1) /* store f1 */
  42. std 2,0x210(%r1) /* store f2 */
  43. std 3,0x218(%r1) /* store f3 */
  44. std 4,0x220(%r1) /* store f4 */
  45. std 5,0x228(%r1) /* store f5 */
  46. std 6,0x230(%r1) /* store f6 */
  47. std 7,0x238(%r1) /* store f7 */
  48. std 8,0x240(%r1) /* store f8 */
  49. std 9,0x248(%r1) /* store f9 */
  50. std 10,0x250(%r1) /* store f10 */
  51. std 11,0x258(%r1) /* store f11 */
  52. std 12,0x260(%r1) /* store f12 */
  53. std 13,0x268(%r1) /* store f13 */
  54. std 14,0x270(%r1) /* store f14 */
  55. std 15,0x278(%r1) /* store f15 */
  56. stam %a0,%a15,0x340(%r1) /* store access registers */
  57. stctg %c0,%c15,0x380(%r1) /* store control registers */
  58. stmg %r0,%r15,0x280(%r1) /* store general registers */
  59. stpt 0x328(%r1) /* store timer */
  60. stckc 0x330(%r1) /* store clock comparator */
  61. /* Activate DAT */
  62. stosm __SF_EMPTY(%r15),0x04
  63. /* Set prefix page to zero */
  64. xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
  65. spx __SF_EMPTY(%r15)
  66. lghi %r2,0
  67. lghi %r3,2*PAGE_SIZE
  68. lghi %r5,2*PAGE_SIZE
  69. 1: mvcle %r2,%r4,0
  70. jo 1b
  71. /* Save image */
  72. brasl %r14,swsusp_save
  73. /* Restore prefix register and return */
  74. lghi %r1,0x1000
  75. spx 0x318(%r1)
  76. lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
  77. lghi %r2,0
  78. br %r14
  79. /*
  80. * Restore saved memory image to correct place and restore register context.
  81. * Then we return to the function that called swsusp_arch_suspend().
  82. * swsusp_arch_resume() runs with disabled interrupts.
  83. */
  84. .globl swsusp_arch_resume
  85. swsusp_arch_resume:
  86. stmg %r6,%r15,__SF_GPRS(%r15)
  87. lgr %r1,%r15
  88. aghi %r15,-STACK_FRAME_OVERHEAD
  89. stg %r1,__SF_BACKCHAIN(%r15)
  90. #ifdef CONFIG_SMP
  91. /* Save boot cpu number */
  92. brasl %r14,smp_get_phys_cpu_id
  93. lgr %r10,%r2
  94. #endif
  95. /* Deactivate DAT */
  96. stnsm __SF_EMPTY(%r15),0xfb
  97. /* Set prefix page to zero */
  98. xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
  99. spx __SF_EMPTY(%r15)
  100. /* Restore saved image */
  101. larl %r1,restore_pblist
  102. lg %r1,0(%r1)
  103. ltgr %r1,%r1
  104. jz 2f
  105. 0:
  106. lg %r2,8(%r1)
  107. lg %r4,0(%r1)
  108. lghi %r3,PAGE_SIZE
  109. lghi %r5,PAGE_SIZE
  110. 1:
  111. mvcle %r2,%r4,0
  112. jo 1b
  113. lg %r1,16(%r1)
  114. ltgr %r1,%r1
  115. jnz 0b
  116. 2:
  117. ptlb /* flush tlb */
  118. /* Restore registers */
  119. lghi %r13,0x1000 /* %r1 = pointer to save arae */
  120. spt 0x328(%r13) /* reprogram timer */
  121. //sckc 0x330(%r13) /* set clock comparator */
  122. lctlg %c0,%c15,0x380(%r13) /* load control registers */
  123. lam %a0,%a15,0x340(%r13) /* load access registers */
  124. lfpc 0x31c(%r13) /* load fpu control */
  125. ld 0,0x200(%r13) /* load f0 */
  126. ld 1,0x208(%r13) /* load f1 */
  127. ld 2,0x210(%r13) /* load f2 */
  128. ld 3,0x218(%r13) /* load f3 */
  129. ld 4,0x220(%r13) /* load f4 */
  130. ld 5,0x228(%r13) /* load f5 */
  131. ld 6,0x230(%r13) /* load f6 */
  132. ld 7,0x238(%r13) /* load f7 */
  133. ld 8,0x240(%r13) /* load f8 */
  134. ld 9,0x248(%r13) /* load f9 */
  135. ld 10,0x250(%r13) /* load f10 */
  136. ld 11,0x258(%r13) /* load f11 */
  137. ld 12,0x260(%r13) /* load f12 */
  138. ld 13,0x268(%r13) /* load f13 */
  139. ld 14,0x270(%r13) /* load f14 */
  140. ld 15,0x278(%r13) /* load f15 */
  141. /* Load old stack */
  142. lg %r15,0x2f8(%r13)
  143. /* Pointer to save area */
  144. lghi %r13,0x1000
  145. #ifdef CONFIG_SMP
  146. /* Switch CPUs */
  147. lgr %r2,%r10 /* get cpu id */
  148. llgf %r3,0x318(%r13)
  149. brasl %r14,smp_switch_boot_cpu_in_resume
  150. #endif
  151. /* Restore prefix register */
  152. spx 0x318(%r13)
  153. /* Activate DAT */
  154. stosm __SF_EMPTY(%r15),0x04
  155. /* Return 0 */
  156. lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
  157. lghi %r2,0
  158. br %r14