/kern_oII/drivers/scsi/bnx2i/bnx2i.h

http://omnia2droid.googlecode.com/ · C++ Header · 771 lines · 399 code · 111 blank · 261 comment · 0 complexity · 9061eafe6d4ebec23ceb5225e0e946c0 MD5 · raw file

  1. /* bnx2i.h: Broadcom NetXtreme II iSCSI driver.
  2. *
  3. * Copyright (c) 2006 - 2009 Broadcom Corporation
  4. * Copyright (c) 2007, 2008 Red Hat, Inc. All rights reserved.
  5. * Copyright (c) 2007, 2008 Mike Christie
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation.
  10. *
  11. * Written by: Anil Veerabhadrappa (anilgv@broadcom.com)
  12. */
  13. #ifndef _BNX2I_H_
  14. #define _BNX2I_H_
  15. #include <linux/module.h>
  16. #include <linux/moduleparam.h>
  17. #include <linux/errno.h>
  18. #include <linux/pci.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/sched.h>
  22. #include <linux/in.h>
  23. #include <linux/kfifo.h>
  24. #include <linux/netdevice.h>
  25. #include <linux/completion.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_eh.h>
  29. #include <scsi/scsi_host.h>
  30. #include <scsi/scsi.h>
  31. #include <scsi/iscsi_proto.h>
  32. #include <scsi/libiscsi.h>
  33. #include <scsi/scsi_transport_iscsi.h>
  34. #include "../../net/cnic_if.h"
  35. #include "57xx_iscsi_hsi.h"
  36. #include "57xx_iscsi_constants.h"
  37. #define BNX2_ISCSI_DRIVER_NAME "bnx2i"
  38. #define BNX2I_MAX_ADAPTERS 8
  39. #define ISCSI_MAX_CONNS_PER_HBA 128
  40. #define ISCSI_MAX_SESS_PER_HBA ISCSI_MAX_CONNS_PER_HBA
  41. #define ISCSI_MAX_CMDS_PER_SESS 128
  42. /* Total active commands across all connections supported by devices */
  43. #define ISCSI_MAX_CMDS_PER_HBA_5708 (28 * (ISCSI_MAX_CMDS_PER_SESS - 1))
  44. #define ISCSI_MAX_CMDS_PER_HBA_5709 (128 * (ISCSI_MAX_CMDS_PER_SESS - 1))
  45. #define ISCSI_MAX_CMDS_PER_HBA_57710 (256 * (ISCSI_MAX_CMDS_PER_SESS - 1))
  46. #define ISCSI_MAX_BDS_PER_CMD 32
  47. #define MAX_PAGES_PER_CTRL_STRUCT_POOL 8
  48. #define BNX2I_RESERVED_SLOW_PATH_CMD_SLOTS 4
  49. /* 5706/08 hardware has limit on maximum buffer size per BD it can handle */
  50. #define MAX_BD_LENGTH 65535
  51. #define BD_SPLIT_SIZE 32768
  52. /* min, max & default values for SQ/RQ/CQ size, configurable via' modparam */
  53. #define BNX2I_SQ_WQES_MIN 16
  54. #define BNX2I_570X_SQ_WQES_MAX 128
  55. #define BNX2I_5770X_SQ_WQES_MAX 512
  56. #define BNX2I_570X_SQ_WQES_DEFAULT 128
  57. #define BNX2I_5770X_SQ_WQES_DEFAULT 256
  58. #define BNX2I_570X_CQ_WQES_MAX 128
  59. #define BNX2I_5770X_CQ_WQES_MAX 512
  60. #define BNX2I_RQ_WQES_MIN 16
  61. #define BNX2I_RQ_WQES_MAX 32
  62. #define BNX2I_RQ_WQES_DEFAULT 16
  63. /* CCELLs per conn */
  64. #define BNX2I_CCELLS_MIN 16
  65. #define BNX2I_CCELLS_MAX 96
  66. #define BNX2I_CCELLS_DEFAULT 64
  67. #define ITT_INVALID_SIGNATURE 0xFFFF
  68. #define ISCSI_CMD_CLEANUP_TIMEOUT 100
  69. #define BNX2I_CONN_CTX_BUF_SIZE 16384
  70. #define BNX2I_SQ_WQE_SIZE 64
  71. #define BNX2I_RQ_WQE_SIZE 256
  72. #define BNX2I_CQE_SIZE 64
  73. #define MB_KERNEL_CTX_SHIFT 8
  74. #define MB_KERNEL_CTX_SIZE (1 << MB_KERNEL_CTX_SHIFT)
  75. #define CTX_SHIFT 7
  76. #define GET_CID_NUM(cid_addr) ((cid_addr) >> CTX_SHIFT)
  77. #define CTX_OFFSET 0x10000
  78. #define MAX_CID_CNT 0x4000
  79. /* 5709 context registers */
  80. #define BNX2_MQ_CONFIG2 0x00003d00
  81. #define BNX2_MQ_CONFIG2_CONT_SZ (0x7L<<4)
  82. #define BNX2_MQ_CONFIG2_FIRST_L4L5 (0x1fL<<8)
  83. /* 57710's BAR2 is mapped to doorbell registers */
  84. #define BNX2X_DOORBELL_PCI_BAR 2
  85. #define BNX2X_MAX_CQS 8
  86. #define CNIC_ARM_CQE 1
  87. #define CNIC_DISARM_CQE 0
  88. #define REG_RD(__hba, offset) \
  89. readl(__hba->regview + offset)
  90. #define REG_WR(__hba, offset, val) \
  91. writel(val, __hba->regview + offset)
  92. /**
  93. * struct generic_pdu_resc - login pdu resource structure
  94. *
  95. * @req_buf: driver buffer used to stage payload associated with
  96. * the login request
  97. * @req_dma_addr: dma address for iscsi login request payload buffer
  98. * @req_buf_size: actual login request payload length
  99. * @req_wr_ptr: pointer into login request buffer when next data is
  100. * to be written
  101. * @resp_hdr: iscsi header where iscsi login response header is to
  102. * be recreated
  103. * @resp_buf: buffer to stage login response payload
  104. * @resp_dma_addr: login response payload buffer dma address
  105. * @resp_buf_size: login response paylod length
  106. * @resp_wr_ptr: pointer into login response buffer when next data is
  107. * to be written
  108. * @req_bd_tbl: iscsi login request payload BD table
  109. * @req_bd_dma: login request BD table dma address
  110. * @resp_bd_tbl: iscsi login response payload BD table
  111. * @resp_bd_dma: login request BD table dma address
  112. *
  113. * following structure defines buffer info for generic pdus such as iSCSI Login,
  114. * Logout and NOP
  115. */
  116. struct generic_pdu_resc {
  117. char *req_buf;
  118. dma_addr_t req_dma_addr;
  119. u32 req_buf_size;
  120. char *req_wr_ptr;
  121. struct iscsi_hdr resp_hdr;
  122. char *resp_buf;
  123. dma_addr_t resp_dma_addr;
  124. u32 resp_buf_size;
  125. char *resp_wr_ptr;
  126. char *req_bd_tbl;
  127. dma_addr_t req_bd_dma;
  128. char *resp_bd_tbl;
  129. dma_addr_t resp_bd_dma;
  130. };
  131. /**
  132. * struct bd_resc_page - tracks DMA'able memory allocated for BD tables
  133. *
  134. * @link: list head to link elements
  135. * @max_ptrs: maximun pointers that can be stored in this page
  136. * @num_valid: number of pointer valid in this page
  137. * @page: base addess for page pointer array
  138. *
  139. * structure to track DMA'able memory allocated for command BD tables
  140. */
  141. struct bd_resc_page {
  142. struct list_head link;
  143. u32 max_ptrs;
  144. u32 num_valid;
  145. void *page[1];
  146. };
  147. /**
  148. * struct io_bdt - I/O buffer destricptor table
  149. *
  150. * @bd_tbl: BD table's virtual address
  151. * @bd_tbl_dma: BD table's dma address
  152. * @bd_valid: num valid BD entries
  153. *
  154. * IO BD table
  155. */
  156. struct io_bdt {
  157. struct iscsi_bd *bd_tbl;
  158. dma_addr_t bd_tbl_dma;
  159. u16 bd_valid;
  160. };
  161. /**
  162. * bnx2i_cmd - iscsi command structure
  163. *
  164. * @scsi_cmd: SCSI-ML task pointer corresponding to this iscsi cmd
  165. * @sg: SG list
  166. * @io_tbl: buffer descriptor (BD) table
  167. * @bd_tbl_dma: buffer descriptor (BD) table's dma address
  168. */
  169. struct bnx2i_cmd {
  170. struct iscsi_hdr hdr;
  171. struct bnx2i_conn *conn;
  172. struct scsi_cmnd *scsi_cmd;
  173. struct scatterlist *sg;
  174. struct io_bdt io_tbl;
  175. dma_addr_t bd_tbl_dma;
  176. struct bnx2i_cmd_request req;
  177. };
  178. /**
  179. * struct bnx2i_conn - iscsi connection structure
  180. *
  181. * @cls_conn: pointer to iscsi cls conn
  182. * @hba: adapter structure pointer
  183. * @iscsi_conn_cid: iscsi conn id
  184. * @fw_cid: firmware iscsi context id
  185. * @ep: endpoint structure pointer
  186. * @gen_pdu: login/nopout/logout pdu resources
  187. * @violation_notified: bit mask used to track iscsi error/warning messages
  188. * already printed out
  189. *
  190. * iSCSI connection structure
  191. */
  192. struct bnx2i_conn {
  193. struct iscsi_cls_conn *cls_conn;
  194. struct bnx2i_hba *hba;
  195. struct completion cmd_cleanup_cmpl;
  196. int is_bound;
  197. u32 iscsi_conn_cid;
  198. #define BNX2I_CID_RESERVED 0x5AFF
  199. u32 fw_cid;
  200. struct timer_list poll_timer;
  201. /*
  202. * Queue Pair (QP) related structure elements.
  203. */
  204. struct bnx2i_endpoint *ep;
  205. /*
  206. * Buffer for login negotiation process
  207. */
  208. struct generic_pdu_resc gen_pdu;
  209. u64 violation_notified;
  210. };
  211. /**
  212. * struct iscsi_cid_queue - Per adapter iscsi cid queue
  213. *
  214. * @cid_que_base: queue base memory
  215. * @cid_que: queue memory pointer
  216. * @cid_q_prod_idx: produce index
  217. * @cid_q_cons_idx: consumer index
  218. * @cid_q_max_idx: max index. used to detect wrap around condition
  219. * @cid_free_cnt: queue size
  220. * @conn_cid_tbl: iscsi cid to conn structure mapping table
  221. *
  222. * Per adapter iSCSI CID Queue
  223. */
  224. struct iscsi_cid_queue {
  225. void *cid_que_base;
  226. u32 *cid_que;
  227. u32 cid_q_prod_idx;
  228. u32 cid_q_cons_idx;
  229. u32 cid_q_max_idx;
  230. u32 cid_free_cnt;
  231. struct bnx2i_conn **conn_cid_tbl;
  232. };
  233. /**
  234. * struct bnx2i_hba - bnx2i adapter structure
  235. *
  236. * @link: list head to link elements
  237. * @cnic: pointer to cnic device
  238. * @pcidev: pointer to pci dev
  239. * @netdev: pointer to netdev structure
  240. * @regview: mapped PCI register space
  241. * @age: age, incremented by every recovery
  242. * @cnic_dev_type: cnic device type, 5706/5708/5709/57710
  243. * @mail_queue_access: mailbox queue access mode, applicable to 5709 only
  244. * @reg_with_cnic: indicates whether the device is register with CNIC
  245. * @adapter_state: adapter state, UP, GOING_DOWN, LINK_DOWN
  246. * @mtu_supported: Ethernet MTU supported
  247. * @shost: scsi host pointer
  248. * @max_sqes: SQ size
  249. * @max_rqes: RQ size
  250. * @max_cqes: CQ size
  251. * @num_ccell: number of command cells per connection
  252. * @ofld_conns_active: active connection list
  253. * @max_active_conns: max offload connections supported by this device
  254. * @cid_que: iscsi cid queue
  255. * @ep_rdwr_lock: read / write lock to synchronize various ep lists
  256. * @ep_ofld_list: connection list for pending offload completion
  257. * @ep_destroy_list: connection list for pending offload completion
  258. * @mp_bd_tbl: BD table to be used with middle path requests
  259. * @mp_bd_dma: DMA address of 'mp_bd_tbl' memory buffer
  260. * @dummy_buffer: Dummy buffer to be used with zero length scsicmd reqs
  261. * @dummy_buf_dma: DMA address of 'dummy_buffer' memory buffer
  262. * @lock: lock to synchonize access to hba structure
  263. * @pci_did: PCI device ID
  264. * @pci_vid: PCI vendor ID
  265. * @pci_sdid: PCI subsystem device ID
  266. * @pci_svid: PCI subsystem vendor ID
  267. * @pci_func: PCI function number in system pci tree
  268. * @pci_devno: PCI device number in system pci tree
  269. * @num_wqe_sent: statistic counter, total wqe's sent
  270. * @num_cqe_rcvd: statistic counter, total cqe's received
  271. * @num_intr_claimed: statistic counter, total interrupts claimed
  272. * @link_changed_count: statistic counter, num of link change notifications
  273. * received
  274. * @ipaddr_changed_count: statistic counter, num times IP address changed while
  275. * at least one connection is offloaded
  276. * @num_sess_opened: statistic counter, total num sessions opened
  277. * @num_conn_opened: statistic counter, total num conns opened on this hba
  278. * @ctx_ccell_tasks: captures number of ccells and tasks supported by
  279. * currently offloaded connection, used to decode
  280. * context memory
  281. *
  282. * Adapter Data Structure
  283. */
  284. struct bnx2i_hba {
  285. struct list_head link;
  286. struct cnic_dev *cnic;
  287. struct pci_dev *pcidev;
  288. struct net_device *netdev;
  289. void __iomem *regview;
  290. u32 age;
  291. unsigned long cnic_dev_type;
  292. #define BNX2I_NX2_DEV_5706 0x0
  293. #define BNX2I_NX2_DEV_5708 0x1
  294. #define BNX2I_NX2_DEV_5709 0x2
  295. #define BNX2I_NX2_DEV_57710 0x3
  296. u32 mail_queue_access;
  297. #define BNX2I_MQ_KERNEL_MODE 0x0
  298. #define BNX2I_MQ_KERNEL_BYPASS_MODE 0x1
  299. #define BNX2I_MQ_BIN_MODE 0x2
  300. unsigned long reg_with_cnic;
  301. #define BNX2I_CNIC_REGISTERED 1
  302. unsigned long adapter_state;
  303. #define ADAPTER_STATE_UP 0
  304. #define ADAPTER_STATE_GOING_DOWN 1
  305. #define ADAPTER_STATE_LINK_DOWN 2
  306. #define ADAPTER_STATE_INIT_FAILED 31
  307. unsigned int mtu_supported;
  308. #define BNX2I_MAX_MTU_SUPPORTED 1500
  309. struct Scsi_Host *shost;
  310. u32 max_sqes;
  311. u32 max_rqes;
  312. u32 max_cqes;
  313. u32 num_ccell;
  314. int ofld_conns_active;
  315. int max_active_conns;
  316. struct iscsi_cid_queue cid_que;
  317. rwlock_t ep_rdwr_lock;
  318. struct list_head ep_ofld_list;
  319. struct list_head ep_destroy_list;
  320. /*
  321. * BD table to be used with MP (Middle Path requests.
  322. */
  323. char *mp_bd_tbl;
  324. dma_addr_t mp_bd_dma;
  325. char *dummy_buffer;
  326. dma_addr_t dummy_buf_dma;
  327. spinlock_t lock; /* protects hba structure access */
  328. struct mutex net_dev_lock;/* sync net device access */
  329. /*
  330. * PCI related info.
  331. */
  332. u16 pci_did;
  333. u16 pci_vid;
  334. u16 pci_sdid;
  335. u16 pci_svid;
  336. u16 pci_func;
  337. u16 pci_devno;
  338. /*
  339. * Following are a bunch of statistics useful during development
  340. * and later stage for score boarding.
  341. */
  342. u32 num_wqe_sent;
  343. u32 num_cqe_rcvd;
  344. u32 num_intr_claimed;
  345. u32 link_changed_count;
  346. u32 ipaddr_changed_count;
  347. u32 num_sess_opened;
  348. u32 num_conn_opened;
  349. unsigned int ctx_ccell_tasks;
  350. };
  351. /*******************************************************************************
  352. * QP [ SQ / RQ / CQ ] info.
  353. ******************************************************************************/
  354. /*
  355. * SQ/RQ/CQ generic structure definition
  356. */
  357. struct sqe {
  358. u8 sqe_byte[BNX2I_SQ_WQE_SIZE];
  359. };
  360. struct rqe {
  361. u8 rqe_byte[BNX2I_RQ_WQE_SIZE];
  362. };
  363. struct cqe {
  364. u8 cqe_byte[BNX2I_CQE_SIZE];
  365. };
  366. enum {
  367. #if defined(__LITTLE_ENDIAN)
  368. CNIC_EVENT_COAL_INDEX = 0x0,
  369. CNIC_SEND_DOORBELL = 0x4,
  370. CNIC_EVENT_CQ_ARM = 0x7,
  371. CNIC_RECV_DOORBELL = 0x8
  372. #elif defined(__BIG_ENDIAN)
  373. CNIC_EVENT_COAL_INDEX = 0x2,
  374. CNIC_SEND_DOORBELL = 0x6,
  375. CNIC_EVENT_CQ_ARM = 0x4,
  376. CNIC_RECV_DOORBELL = 0xa
  377. #endif
  378. };
  379. /*
  380. * CQ DB
  381. */
  382. struct bnx2x_iscsi_cq_pend_cmpl {
  383. /* CQ producer, updated by Ustorm */
  384. u16 ustrom_prod;
  385. /* CQ pending completion counter */
  386. u16 pend_cntr;
  387. };
  388. struct bnx2i_5771x_cq_db {
  389. struct bnx2x_iscsi_cq_pend_cmpl qp_pend_cmpl[BNX2X_MAX_CQS];
  390. /* CQ pending completion ITT array */
  391. u16 itt[BNX2X_MAX_CQS];
  392. /* Cstorm CQ sequence to notify array, updated by driver */;
  393. u16 sqn[BNX2X_MAX_CQS];
  394. u32 reserved[4] /* 16 byte allignment */;
  395. };
  396. struct bnx2i_5771x_sq_rq_db {
  397. u16 prod_idx;
  398. u8 reserved0[14]; /* Pad structure size to 16 bytes */
  399. };
  400. struct bnx2i_5771x_dbell_hdr {
  401. u8 header;
  402. /* 1 for rx doorbell, 0 for tx doorbell */
  403. #define B577XX_DOORBELL_HDR_RX (0x1<<0)
  404. #define B577XX_DOORBELL_HDR_RX_SHIFT 0
  405. /* 0 for normal doorbell, 1 for advertise wnd doorbell */
  406. #define B577XX_DOORBELL_HDR_DB_TYPE (0x1<<1)
  407. #define B577XX_DOORBELL_HDR_DB_TYPE_SHIFT 1
  408. /* rdma tx only: DPM transaction size specifier (64/128/256/512B) */
  409. #define B577XX_DOORBELL_HDR_DPM_SIZE (0x3<<2)
  410. #define B577XX_DOORBELL_HDR_DPM_SIZE_SHIFT 2
  411. /* connection type */
  412. #define B577XX_DOORBELL_HDR_CONN_TYPE (0xF<<4)
  413. #define B577XX_DOORBELL_HDR_CONN_TYPE_SHIFT 4
  414. };
  415. struct bnx2i_5771x_dbell {
  416. struct bnx2i_5771x_dbell_hdr dbell;
  417. u8 pad[3];
  418. };
  419. /**
  420. * struct qp_info - QP (share queue region) atrributes structure
  421. *
  422. * @ctx_base: ioremapped pci register base to access doorbell register
  423. * pertaining to this offloaded connection
  424. * @sq_virt: virtual address of send queue (SQ) region
  425. * @sq_phys: DMA address of SQ memory region
  426. * @sq_mem_size: SQ size
  427. * @sq_prod_qe: SQ producer entry pointer
  428. * @sq_cons_qe: SQ consumer entry pointer
  429. * @sq_first_qe: virtaul address of first entry in SQ
  430. * @sq_last_qe: virtaul address of last entry in SQ
  431. * @sq_prod_idx: SQ producer index
  432. * @sq_cons_idx: SQ consumer index
  433. * @sqe_left: number sq entry left
  434. * @sq_pgtbl_virt: page table describing buffer consituting SQ region
  435. * @sq_pgtbl_phys: dma address of 'sq_pgtbl_virt'
  436. * @sq_pgtbl_size: SQ page table size
  437. * @cq_virt: virtual address of completion queue (CQ) region
  438. * @cq_phys: DMA address of RQ memory region
  439. * @cq_mem_size: CQ size
  440. * @cq_prod_qe: CQ producer entry pointer
  441. * @cq_cons_qe: CQ consumer entry pointer
  442. * @cq_first_qe: virtaul address of first entry in CQ
  443. * @cq_last_qe: virtaul address of last entry in CQ
  444. * @cq_prod_idx: CQ producer index
  445. * @cq_cons_idx: CQ consumer index
  446. * @cqe_left: number cq entry left
  447. * @cqe_size: size of each CQ entry
  448. * @cqe_exp_seq_sn: next expected CQE sequence number
  449. * @cq_pgtbl_virt: page table describing buffer consituting CQ region
  450. * @cq_pgtbl_phys: dma address of 'cq_pgtbl_virt'
  451. * @cq_pgtbl_size: CQ page table size
  452. * @rq_virt: virtual address of receive queue (RQ) region
  453. * @rq_phys: DMA address of RQ memory region
  454. * @rq_mem_size: RQ size
  455. * @rq_prod_qe: RQ producer entry pointer
  456. * @rq_cons_qe: RQ consumer entry pointer
  457. * @rq_first_qe: virtaul address of first entry in RQ
  458. * @rq_last_qe: virtaul address of last entry in RQ
  459. * @rq_prod_idx: RQ producer index
  460. * @rq_cons_idx: RQ consumer index
  461. * @rqe_left: number rq entry left
  462. * @rq_pgtbl_virt: page table describing buffer consituting RQ region
  463. * @rq_pgtbl_phys: dma address of 'rq_pgtbl_virt'
  464. * @rq_pgtbl_size: RQ page table size
  465. *
  466. * queue pair (QP) is a per connection shared data structure which is used
  467. * to send work requests (SQ), receive completion notifications (CQ)
  468. * and receive asynchoronous / scsi sense info (RQ). 'qp_info' structure
  469. * below holds queue memory, consumer/producer indexes and page table
  470. * information
  471. */
  472. struct qp_info {
  473. void __iomem *ctx_base;
  474. #define DPM_TRIGER_TYPE 0x40
  475. #define BNX2I_570x_QUE_DB_SIZE 0
  476. #define BNX2I_5771x_QUE_DB_SIZE 16
  477. struct sqe *sq_virt;
  478. dma_addr_t sq_phys;
  479. u32 sq_mem_size;
  480. struct sqe *sq_prod_qe;
  481. struct sqe *sq_cons_qe;
  482. struct sqe *sq_first_qe;
  483. struct sqe *sq_last_qe;
  484. u16 sq_prod_idx;
  485. u16 sq_cons_idx;
  486. u32 sqe_left;
  487. void *sq_pgtbl_virt;
  488. dma_addr_t sq_pgtbl_phys;
  489. u32 sq_pgtbl_size; /* set to PAGE_SIZE for 5708 & 5709 */
  490. struct cqe *cq_virt;
  491. dma_addr_t cq_phys;
  492. u32 cq_mem_size;
  493. struct cqe *cq_prod_qe;
  494. struct cqe *cq_cons_qe;
  495. struct cqe *cq_first_qe;
  496. struct cqe *cq_last_qe;
  497. u16 cq_prod_idx;
  498. u16 cq_cons_idx;
  499. u32 cqe_left;
  500. u32 cqe_size;
  501. u32 cqe_exp_seq_sn;
  502. void *cq_pgtbl_virt;
  503. dma_addr_t cq_pgtbl_phys;
  504. u32 cq_pgtbl_size; /* set to PAGE_SIZE for 5708 & 5709 */
  505. struct rqe *rq_virt;
  506. dma_addr_t rq_phys;
  507. u32 rq_mem_size;
  508. struct rqe *rq_prod_qe;
  509. struct rqe *rq_cons_qe;
  510. struct rqe *rq_first_qe;
  511. struct rqe *rq_last_qe;
  512. u16 rq_prod_idx;
  513. u16 rq_cons_idx;
  514. u32 rqe_left;
  515. void *rq_pgtbl_virt;
  516. dma_addr_t rq_pgtbl_phys;
  517. u32 rq_pgtbl_size; /* set to PAGE_SIZE for 5708 & 5709 */
  518. };
  519. /*
  520. * CID handles
  521. */
  522. struct ep_handles {
  523. u32 fw_cid;
  524. u32 drv_iscsi_cid;
  525. u16 pg_cid;
  526. u16 rsvd;
  527. };
  528. enum {
  529. EP_STATE_IDLE = 0x0,
  530. EP_STATE_PG_OFLD_START = 0x1,
  531. EP_STATE_PG_OFLD_COMPL = 0x2,
  532. EP_STATE_OFLD_START = 0x4,
  533. EP_STATE_OFLD_COMPL = 0x8,
  534. EP_STATE_CONNECT_START = 0x10,
  535. EP_STATE_CONNECT_COMPL = 0x20,
  536. EP_STATE_ULP_UPDATE_START = 0x40,
  537. EP_STATE_ULP_UPDATE_COMPL = 0x80,
  538. EP_STATE_DISCONN_START = 0x100,
  539. EP_STATE_DISCONN_COMPL = 0x200,
  540. EP_STATE_CLEANUP_START = 0x400,
  541. EP_STATE_CLEANUP_CMPL = 0x800,
  542. EP_STATE_TCP_FIN_RCVD = 0x1000,
  543. EP_STATE_TCP_RST_RCVD = 0x2000,
  544. EP_STATE_PG_OFLD_FAILED = 0x1000000,
  545. EP_STATE_ULP_UPDATE_FAILED = 0x2000000,
  546. EP_STATE_CLEANUP_FAILED = 0x4000000,
  547. EP_STATE_OFLD_FAILED = 0x8000000,
  548. EP_STATE_CONNECT_FAILED = 0x10000000,
  549. EP_STATE_DISCONN_TIMEDOUT = 0x20000000,
  550. };
  551. /**
  552. * struct bnx2i_endpoint - representation of tcp connection in NX2 world
  553. *
  554. * @link: list head to link elements
  555. * @hba: adapter to which this connection belongs
  556. * @conn: iscsi connection this EP is linked to
  557. * @sess: iscsi session this EP is linked to
  558. * @cm_sk: cnic sock struct
  559. * @hba_age: age to detect if 'iscsid' issues ep_disconnect()
  560. * after HBA reset is completed by bnx2i/cnic/bnx2
  561. * modules
  562. * @state: tracks offload connection state machine
  563. * @teardown_mode: indicates if conn teardown is abortive or orderly
  564. * @qp: QP information
  565. * @ids: contains chip allocated *context id* & driver assigned
  566. * *iscsi cid*
  567. * @ofld_timer: offload timer to detect timeout
  568. * @ofld_wait: wait queue
  569. *
  570. * Endpoint Structure - equivalent of tcp socket structure
  571. */
  572. struct bnx2i_endpoint {
  573. struct list_head link;
  574. struct bnx2i_hba *hba;
  575. struct bnx2i_conn *conn;
  576. struct cnic_sock *cm_sk;
  577. u32 hba_age;
  578. u32 state;
  579. unsigned long timestamp;
  580. int num_active_cmds;
  581. struct qp_info qp;
  582. struct ep_handles ids;
  583. #define ep_iscsi_cid ids.drv_iscsi_cid
  584. #define ep_cid ids.fw_cid
  585. #define ep_pg_cid ids.pg_cid
  586. struct timer_list ofld_timer;
  587. wait_queue_head_t ofld_wait;
  588. };
  589. /* Global variables */
  590. extern unsigned int error_mask1, error_mask2;
  591. extern u64 iscsi_error_mask;
  592. extern unsigned int en_tcp_dack;
  593. extern unsigned int event_coal_div;
  594. extern struct scsi_transport_template *bnx2i_scsi_xport_template;
  595. extern struct iscsi_transport bnx2i_iscsi_transport;
  596. extern struct cnic_ulp_ops bnx2i_cnic_cb;
  597. extern unsigned int sq_size;
  598. extern unsigned int rq_size;
  599. extern struct device_attribute *bnx2i_dev_attributes[];
  600. /*
  601. * Function Prototypes
  602. */
  603. extern void bnx2i_identify_device(struct bnx2i_hba *hba);
  604. extern void bnx2i_register_device(struct bnx2i_hba *hba);
  605. extern void bnx2i_ulp_init(struct cnic_dev *dev);
  606. extern void bnx2i_ulp_exit(struct cnic_dev *dev);
  607. extern void bnx2i_start(void *handle);
  608. extern void bnx2i_stop(void *handle);
  609. extern void bnx2i_reg_dev_all(void);
  610. extern void bnx2i_unreg_dev_all(void);
  611. extern struct bnx2i_hba *get_adapter_list_head(void);
  612. struct bnx2i_conn *bnx2i_get_conn_from_id(struct bnx2i_hba *hba,
  613. u16 iscsi_cid);
  614. int bnx2i_alloc_ep_pool(void);
  615. void bnx2i_release_ep_pool(void);
  616. struct bnx2i_endpoint *bnx2i_ep_ofld_list_next(struct bnx2i_hba *hba);
  617. struct bnx2i_endpoint *bnx2i_ep_destroy_list_next(struct bnx2i_hba *hba);
  618. struct bnx2i_hba *bnx2i_find_hba_for_cnic(struct cnic_dev *cnic);
  619. struct bnx2i_hba *bnx2i_alloc_hba(struct cnic_dev *cnic);
  620. void bnx2i_free_hba(struct bnx2i_hba *hba);
  621. void bnx2i_get_rq_buf(struct bnx2i_conn *conn, char *ptr, int len);
  622. void bnx2i_put_rq_buf(struct bnx2i_conn *conn, int count);
  623. void bnx2i_iscsi_unmap_sg_list(struct bnx2i_cmd *cmd);
  624. void bnx2i_drop_session(struct iscsi_cls_session *session);
  625. extern int bnx2i_send_fw_iscsi_init_msg(struct bnx2i_hba *hba);
  626. extern int bnx2i_send_iscsi_login(struct bnx2i_conn *conn,
  627. struct iscsi_task *mtask);
  628. extern int bnx2i_send_iscsi_tmf(struct bnx2i_conn *conn,
  629. struct iscsi_task *mtask);
  630. extern int bnx2i_send_iscsi_scsicmd(struct bnx2i_conn *conn,
  631. struct bnx2i_cmd *cmnd);
  632. extern int bnx2i_send_iscsi_nopout(struct bnx2i_conn *conn,
  633. struct iscsi_task *mtask, u32 ttt,
  634. char *datap, int data_len, int unsol);
  635. extern int bnx2i_send_iscsi_logout(struct bnx2i_conn *conn,
  636. struct iscsi_task *mtask);
  637. extern void bnx2i_send_cmd_cleanup_req(struct bnx2i_hba *hba,
  638. struct bnx2i_cmd *cmd);
  639. extern void bnx2i_send_conn_ofld_req(struct bnx2i_hba *hba,
  640. struct bnx2i_endpoint *ep);
  641. extern void bnx2i_update_iscsi_conn(struct iscsi_conn *conn);
  642. extern void bnx2i_send_conn_destroy(struct bnx2i_hba *hba,
  643. struct bnx2i_endpoint *ep);
  644. extern int bnx2i_alloc_qp_resc(struct bnx2i_hba *hba,
  645. struct bnx2i_endpoint *ep);
  646. extern void bnx2i_free_qp_resc(struct bnx2i_hba *hba,
  647. struct bnx2i_endpoint *ep);
  648. extern void bnx2i_ep_ofld_timer(unsigned long data);
  649. extern struct bnx2i_endpoint *bnx2i_find_ep_in_ofld_list(
  650. struct bnx2i_hba *hba, u32 iscsi_cid);
  651. extern struct bnx2i_endpoint *bnx2i_find_ep_in_destroy_list(
  652. struct bnx2i_hba *hba, u32 iscsi_cid);
  653. extern int bnx2i_map_ep_dbell_regs(struct bnx2i_endpoint *ep);
  654. extern void bnx2i_arm_cq_event_coalescing(struct bnx2i_endpoint *ep, u8 action);
  655. /* Debug related function prototypes */
  656. extern void bnx2i_print_pend_cmd_queue(struct bnx2i_conn *conn);
  657. extern void bnx2i_print_active_cmd_queue(struct bnx2i_conn *conn);
  658. extern void bnx2i_print_xmit_pdu_queue(struct bnx2i_conn *conn);
  659. extern void bnx2i_print_recv_state(struct bnx2i_conn *conn);
  660. #endif