/kern_oII/drivers/video/backlight/tdo24m.c

http://omnia2droid.googlecode.com/ · C · 474 lines · 390 code · 72 blank · 12 comment · 31 complexity · 074b918b42d6f91f8de2e076642c7694 MD5 · raw file

  1. /*
  2. * tdo24m - SPI-based drivers for Toppoly TDO24M series LCD panels
  3. *
  4. * Copyright (C) 2008 Marvell International Ltd.
  5. * Eric Miao <eric.miao@marvell.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * publishhed by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/device.h>
  15. #include <linux/spi/spi.h>
  16. #include <linux/spi/tdo24m.h>
  17. #include <linux/fb.h>
  18. #include <linux/lcd.h>
  19. #define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL)
  20. #define TDO24M_SPI_BUFF_SIZE (4)
  21. #define MODE_QVGA 0
  22. #define MODE_VGA 1
  23. struct tdo24m {
  24. struct spi_device *spi_dev;
  25. struct lcd_device *lcd_dev;
  26. struct spi_message msg;
  27. struct spi_transfer xfer;
  28. uint8_t *buf;
  29. int (*adj_mode)(struct tdo24m *lcd, int mode);
  30. int color_invert;
  31. int power;
  32. int mode;
  33. };
  34. /* use bit 30, 31 as the indicator of command parameter number */
  35. #define CMD0(x) ((0 << 30) | (x))
  36. #define CMD1(x, x1) ((1 << 30) | ((x) << 9) | 0x100 | (x1))
  37. #define CMD2(x, x1, x2) ((2 << 30) | ((x) << 18) | 0x20000 |\
  38. ((x1) << 9) | 0x100 | (x2))
  39. #define CMD_NULL (-1)
  40. static uint32_t lcd_panel_reset[] = {
  41. CMD0(0x1), /* reset */
  42. CMD0(0x0), /* nop */
  43. CMD0(0x0), /* nop */
  44. CMD0(0x0), /* nop */
  45. CMD_NULL,
  46. };
  47. static uint32_t lcd_panel_on[] = {
  48. CMD0(0x29), /* Display ON */
  49. CMD2(0xB8, 0xFF, 0xF9), /* Output Control */
  50. CMD0(0x11), /* Sleep out */
  51. CMD1(0xB0, 0x16), /* Wake */
  52. CMD_NULL,
  53. };
  54. static uint32_t lcd_panel_off[] = {
  55. CMD0(0x28), /* Display OFF */
  56. CMD2(0xB8, 0x80, 0x02), /* Output Control */
  57. CMD0(0x10), /* Sleep in */
  58. CMD1(0xB0, 0x00), /* Deep stand by in */
  59. CMD_NULL,
  60. };
  61. static uint32_t lcd_vga_pass_through_tdo24m[] = {
  62. CMD1(0xB0, 0x16),
  63. CMD1(0xBC, 0x80),
  64. CMD1(0xE1, 0x00),
  65. CMD1(0x36, 0x50),
  66. CMD1(0x3B, 0x00),
  67. CMD_NULL,
  68. };
  69. static uint32_t lcd_qvga_pass_through_tdo24m[] = {
  70. CMD1(0xB0, 0x16),
  71. CMD1(0xBC, 0x81),
  72. CMD1(0xE1, 0x00),
  73. CMD1(0x36, 0x50),
  74. CMD1(0x3B, 0x22),
  75. CMD_NULL,
  76. };
  77. static uint32_t lcd_vga_transfer_tdo24m[] = {
  78. CMD1(0xcf, 0x02), /* Blanking period control (1) */
  79. CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
  80. CMD1(0xd1, 0x01), /* CKV timing control on/off */
  81. CMD2(0xd2, 0x14, 0x00), /* CKV 1,2 timing control */
  82. CMD2(0xd3, 0x1a, 0x0f), /* OEV timing control */
  83. CMD2(0xd4, 0x1f, 0xaf), /* ASW timing control (1) */
  84. CMD1(0xd5, 0x14), /* ASW timing control (2) */
  85. CMD0(0x21), /* Invert for normally black display */
  86. CMD0(0x29), /* Display on */
  87. CMD_NULL,
  88. };
  89. static uint32_t lcd_qvga_transfer[] = {
  90. CMD1(0xd6, 0x02), /* Blanking period control (1) */
  91. CMD2(0xd7, 0x08, 0x04), /* Blanking period control (2) */
  92. CMD1(0xd8, 0x01), /* CKV timing control on/off */
  93. CMD2(0xd9, 0x00, 0x08), /* CKV 1,2 timing control */
  94. CMD2(0xde, 0x05, 0x0a), /* OEV timing control */
  95. CMD2(0xdf, 0x0a, 0x19), /* ASW timing control (1) */
  96. CMD1(0xe0, 0x0a), /* ASW timing control (2) */
  97. CMD0(0x21), /* Invert for normally black display */
  98. CMD0(0x29), /* Display on */
  99. CMD_NULL,
  100. };
  101. static uint32_t lcd_vga_pass_through_tdo35s[] = {
  102. CMD1(0xB0, 0x16),
  103. CMD1(0xBC, 0x80),
  104. CMD1(0xE1, 0x00),
  105. CMD1(0x3B, 0x00),
  106. CMD_NULL,
  107. };
  108. static uint32_t lcd_qvga_pass_through_tdo35s[] = {
  109. CMD1(0xB0, 0x16),
  110. CMD1(0xBC, 0x81),
  111. CMD1(0xE1, 0x00),
  112. CMD1(0x3B, 0x22),
  113. CMD_NULL,
  114. };
  115. static uint32_t lcd_vga_transfer_tdo35s[] = {
  116. CMD1(0xcf, 0x02), /* Blanking period control (1) */
  117. CMD2(0xd0, 0x08, 0x04), /* Blanking period control (2) */
  118. CMD1(0xd1, 0x01), /* CKV timing control on/off */
  119. CMD2(0xd2, 0x00, 0x1e), /* CKV 1,2 timing control */
  120. CMD2(0xd3, 0x14, 0x28), /* OEV timing control */
  121. CMD2(0xd4, 0x28, 0x64), /* ASW timing control (1) */
  122. CMD1(0xd5, 0x28), /* ASW timing control (2) */
  123. CMD0(0x21), /* Invert for normally black display */
  124. CMD0(0x29), /* Display on */
  125. CMD_NULL,
  126. };
  127. static uint32_t lcd_panel_config[] = {
  128. CMD2(0xb8, 0xff, 0xf9), /* Output control */
  129. CMD0(0x11), /* sleep out */
  130. CMD1(0xba, 0x01), /* Display mode (1) */
  131. CMD1(0xbb, 0x00), /* Display mode (2) */
  132. CMD1(0x3a, 0x60), /* Display mode 18-bit RGB */
  133. CMD1(0xbf, 0x10), /* Drive system change control */
  134. CMD1(0xb1, 0x56), /* Booster operation setup */
  135. CMD1(0xb2, 0x33), /* Booster mode setup */
  136. CMD1(0xb3, 0x11), /* Booster frequency setup */
  137. CMD1(0xb4, 0x02), /* Op amp/system clock */
  138. CMD1(0xb5, 0x35), /* VCS voltage */
  139. CMD1(0xb6, 0x40), /* VCOM voltage */
  140. CMD1(0xb7, 0x03), /* External display signal */
  141. CMD1(0xbd, 0x00), /* ASW slew rate */
  142. CMD1(0xbe, 0x00), /* Dummy data for QuadData operation */
  143. CMD1(0xc0, 0x11), /* Sleep out FR count (A) */
  144. CMD1(0xc1, 0x11), /* Sleep out FR count (B) */
  145. CMD1(0xc2, 0x11), /* Sleep out FR count (C) */
  146. CMD2(0xc3, 0x20, 0x40), /* Sleep out FR count (D) */
  147. CMD2(0xc4, 0x60, 0xc0), /* Sleep out FR count (E) */
  148. CMD2(0xc5, 0x10, 0x20), /* Sleep out FR count (F) */
  149. CMD1(0xc6, 0xc0), /* Sleep out FR count (G) */
  150. CMD2(0xc7, 0x33, 0x43), /* Gamma 1 fine tuning (1) */
  151. CMD1(0xc8, 0x44), /* Gamma 1 fine tuning (2) */
  152. CMD1(0xc9, 0x33), /* Gamma 1 inclination adjustment */
  153. CMD1(0xca, 0x00), /* Gamma 1 blue offset adjustment */
  154. CMD2(0xec, 0x01, 0xf0), /* Horizontal clock cycles */
  155. CMD_NULL,
  156. };
  157. static int tdo24m_writes(struct tdo24m *lcd, uint32_t *array)
  158. {
  159. struct spi_transfer *x = &lcd->xfer;
  160. uint32_t data, *p = array;
  161. int nparams, err = 0;
  162. for (; *p != CMD_NULL; p++) {
  163. if (!lcd->color_invert && *p == CMD0(0x21))
  164. continue;
  165. nparams = (*p >> 30) & 0x3;
  166. data = *p << (7 - nparams);
  167. switch (nparams) {
  168. case 0:
  169. lcd->buf[0] = (data >> 8) & 0xff;
  170. lcd->buf[1] = data & 0xff;
  171. break;
  172. case 1:
  173. lcd->buf[0] = (data >> 16) & 0xff;
  174. lcd->buf[1] = (data >> 8) & 0xff;
  175. lcd->buf[2] = data & 0xff;
  176. break;
  177. case 2:
  178. lcd->buf[0] = (data >> 24) & 0xff;
  179. lcd->buf[1] = (data >> 16) & 0xff;
  180. lcd->buf[2] = (data >> 8) & 0xff;
  181. lcd->buf[3] = data & 0xff;
  182. break;
  183. default:
  184. continue;
  185. }
  186. x->len = nparams + 2;
  187. err = spi_sync(lcd->spi_dev, &lcd->msg);
  188. if (err)
  189. break;
  190. }
  191. return err;
  192. }
  193. static int tdo24m_adj_mode(struct tdo24m *lcd, int mode)
  194. {
  195. switch (mode) {
  196. case MODE_VGA:
  197. tdo24m_writes(lcd, lcd_vga_pass_through_tdo24m);
  198. tdo24m_writes(lcd, lcd_panel_config);
  199. tdo24m_writes(lcd, lcd_vga_transfer_tdo24m);
  200. break;
  201. case MODE_QVGA:
  202. tdo24m_writes(lcd, lcd_qvga_pass_through_tdo24m);
  203. tdo24m_writes(lcd, lcd_panel_config);
  204. tdo24m_writes(lcd, lcd_qvga_transfer);
  205. break;
  206. default:
  207. return -EINVAL;
  208. }
  209. lcd->mode = mode;
  210. return 0;
  211. }
  212. static int tdo35s_adj_mode(struct tdo24m *lcd, int mode)
  213. {
  214. switch (mode) {
  215. case MODE_VGA:
  216. tdo24m_writes(lcd, lcd_vga_pass_through_tdo35s);
  217. tdo24m_writes(lcd, lcd_panel_config);
  218. tdo24m_writes(lcd, lcd_vga_transfer_tdo35s);
  219. break;
  220. case MODE_QVGA:
  221. tdo24m_writes(lcd, lcd_qvga_pass_through_tdo35s);
  222. tdo24m_writes(lcd, lcd_panel_config);
  223. tdo24m_writes(lcd, lcd_qvga_transfer);
  224. break;
  225. default:
  226. return -EINVAL;
  227. }
  228. lcd->mode = mode;
  229. return 0;
  230. }
  231. static int tdo24m_power_on(struct tdo24m *lcd)
  232. {
  233. int err;
  234. err = tdo24m_writes(lcd, lcd_panel_on);
  235. if (err)
  236. goto out;
  237. err = tdo24m_writes(lcd, lcd_panel_reset);
  238. if (err)
  239. goto out;
  240. err = lcd->adj_mode(lcd, lcd->mode);
  241. out:
  242. return err;
  243. }
  244. static int tdo24m_power_off(struct tdo24m *lcd)
  245. {
  246. return tdo24m_writes(lcd, lcd_panel_off);
  247. }
  248. static int tdo24m_power(struct tdo24m *lcd, int power)
  249. {
  250. int ret = 0;
  251. if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power))
  252. ret = tdo24m_power_on(lcd);
  253. else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power))
  254. ret = tdo24m_power_off(lcd);
  255. if (!ret)
  256. lcd->power = power;
  257. return ret;
  258. }
  259. static int tdo24m_set_power(struct lcd_device *ld, int power)
  260. {
  261. struct tdo24m *lcd = lcd_get_data(ld);
  262. return tdo24m_power(lcd, power);
  263. }
  264. static int tdo24m_get_power(struct lcd_device *ld)
  265. {
  266. struct tdo24m *lcd = lcd_get_data(ld);
  267. return lcd->power;
  268. }
  269. static int tdo24m_set_mode(struct lcd_device *ld, struct fb_videomode *m)
  270. {
  271. struct tdo24m *lcd = lcd_get_data(ld);
  272. int mode = MODE_QVGA;
  273. if (m->xres == 640 || m->xres == 480)
  274. mode = MODE_VGA;
  275. if (lcd->mode == mode)
  276. return 0;
  277. return lcd->adj_mode(lcd, mode);
  278. }
  279. static struct lcd_ops tdo24m_ops = {
  280. .get_power = tdo24m_get_power,
  281. .set_power = tdo24m_set_power,
  282. .set_mode = tdo24m_set_mode,
  283. };
  284. static int __devinit tdo24m_probe(struct spi_device *spi)
  285. {
  286. struct tdo24m *lcd;
  287. struct spi_message *m;
  288. struct spi_transfer *x;
  289. struct tdo24m_platform_data *pdata;
  290. enum tdo24m_model model;
  291. int err;
  292. pdata = spi->dev.platform_data;
  293. if (pdata)
  294. model = pdata->model;
  295. else
  296. model = TDO24M;
  297. spi->bits_per_word = 8;
  298. spi->mode = SPI_MODE_3;
  299. err = spi_setup(spi);
  300. if (err)
  301. return err;
  302. lcd = kzalloc(sizeof(struct tdo24m), GFP_KERNEL);
  303. if (!lcd)
  304. return -ENOMEM;
  305. lcd->spi_dev = spi;
  306. lcd->power = FB_BLANK_POWERDOWN;
  307. lcd->mode = MODE_VGA; /* default to VGA */
  308. lcd->buf = kmalloc(TDO24M_SPI_BUFF_SIZE, sizeof(GFP_KERNEL));
  309. if (lcd->buf == NULL) {
  310. kfree(lcd);
  311. return -ENOMEM;
  312. }
  313. m = &lcd->msg;
  314. x = &lcd->xfer;
  315. spi_message_init(m);
  316. x->tx_buf = &lcd->buf[0];
  317. spi_message_add_tail(x, m);
  318. switch (model) {
  319. case TDO24M:
  320. lcd->color_invert = 1;
  321. lcd->adj_mode = tdo24m_adj_mode;
  322. break;
  323. case TDO35S:
  324. lcd->adj_mode = tdo35s_adj_mode;
  325. lcd->color_invert = 0;
  326. break;
  327. default:
  328. dev_err(&spi->dev, "Unsupported model");
  329. goto out_free;
  330. }
  331. lcd->lcd_dev = lcd_device_register("tdo24m", &spi->dev,
  332. lcd, &tdo24m_ops);
  333. if (IS_ERR(lcd->lcd_dev)) {
  334. err = PTR_ERR(lcd->lcd_dev);
  335. goto out_free;
  336. }
  337. dev_set_drvdata(&spi->dev, lcd);
  338. err = tdo24m_power(lcd, FB_BLANK_UNBLANK);
  339. if (err)
  340. goto out_unregister;
  341. return 0;
  342. out_unregister:
  343. lcd_device_unregister(lcd->lcd_dev);
  344. out_free:
  345. kfree(lcd->buf);
  346. kfree(lcd);
  347. return err;
  348. }
  349. static int __devexit tdo24m_remove(struct spi_device *spi)
  350. {
  351. struct tdo24m *lcd = dev_get_drvdata(&spi->dev);
  352. tdo24m_power(lcd, FB_BLANK_POWERDOWN);
  353. lcd_device_unregister(lcd->lcd_dev);
  354. kfree(lcd->buf);
  355. kfree(lcd);
  356. return 0;
  357. }
  358. #ifdef CONFIG_PM
  359. static int tdo24m_suspend(struct spi_device *spi, pm_message_t state)
  360. {
  361. struct tdo24m *lcd = dev_get_drvdata(&spi->dev);
  362. return tdo24m_power(lcd, FB_BLANK_POWERDOWN);
  363. }
  364. static int tdo24m_resume(struct spi_device *spi)
  365. {
  366. struct tdo24m *lcd = dev_get_drvdata(&spi->dev);
  367. return tdo24m_power(lcd, FB_BLANK_UNBLANK);
  368. }
  369. #else
  370. #define tdo24m_suspend NULL
  371. #define tdo24m_resume NULL
  372. #endif
  373. /* Power down all displays on reboot, poweroff or halt */
  374. static void tdo24m_shutdown(struct spi_device *spi)
  375. {
  376. struct tdo24m *lcd = dev_get_drvdata(&spi->dev);
  377. tdo24m_power(lcd, FB_BLANK_POWERDOWN);
  378. }
  379. static struct spi_driver tdo24m_driver = {
  380. .driver = {
  381. .name = "tdo24m",
  382. .owner = THIS_MODULE,
  383. },
  384. .probe = tdo24m_probe,
  385. .remove = __devexit_p(tdo24m_remove),
  386. .shutdown = tdo24m_shutdown,
  387. .suspend = tdo24m_suspend,
  388. .resume = tdo24m_resume,
  389. };
  390. static int __init tdo24m_init(void)
  391. {
  392. return spi_register_driver(&tdo24m_driver);
  393. }
  394. module_init(tdo24m_init);
  395. static void __exit tdo24m_exit(void)
  396. {
  397. spi_unregister_driver(&tdo24m_driver);
  398. }
  399. module_exit(tdo24m_exit);
  400. MODULE_AUTHOR("Eric Miao <eric.miao@marvell.com>");
  401. MODULE_DESCRIPTION("Driver for Toppoly TDO24M LCD Panel");
  402. MODULE_LICENSE("GPL");