/jEdit/tags/jedit-4-2-pre14/modes/vhdl.xml

<?xml version="1.0"?>

<!-- VHDL mode, contributed by Dante Fabrizio and Nitsan Vardi -->

<!DOCTYPE MODE SYSTEM "xmode.dtd">

<MODE>
	<PROPS>
		<PROPERTY NAME="label" VALUE="VHDL" />
		<PROPERTY NAME="lineComment" VALUE="--" />
	</PROPS>
	<RULES ESCAPE="\" IGNORE_CASE="TRUE">
		<SPAN TYPE="LITERAL1" NO_LINE_BREAK="TRUE">
			<BEGIN>"</BEGIN>
			<END>"</END>
		</SPAN>

		<SEQ TYPE="NULL">'event</SEQ>

		<SPAN TYPE="LITERAL1" NO_LINE_BREAK="TRUE">
			<BEGIN>'</BEGIN>
			<END>'</END>
		</SPAN>

		<EOL_SPAN TYPE="COMMENT1">--</EOL_SPAN>
		<SEQ TYPE="OPERATOR">=</SEQ>
		<SEQ TYPE="OPERATOR">/=</SEQ>
		<SEQ TYPE="OPERATOR">!</SEQ>
		<SEQ TYPE="OPERATOR">:</SEQ>
		<SEQ TYPE="OPERATOR">&gt;=</SEQ>
		<SEQ TYPE="OPERATOR">&gt;</SEQ>
		<SEQ TYPE="OPERATOR">&lt;=</SEQ>
		<SEQ TYPE="OPERATOR">&lt;</SEQ>
		<SEQ TYPE="OPERATOR">+</SEQ>
		<SEQ TYPE="OPERATOR">-</SEQ>
		<SEQ TYPE="OPERATOR">/</SEQ>
		<SEQ TYPE="OPERATOR">*</SEQ>

		<SEQ TYPE="OPERATOR">**</SEQ>
		<SEQ TYPE="OPERATOR">%</SEQ>
		<SEQ TYPE="OPERATOR">&amp;</SEQ>
		<SEQ TYPE="OPERATOR">|</SEQ>
		<SEQ TYPE="OPERATOR">^</SEQ>
		<SEQ TYPE="OPERATOR">~</SEQ>
		<MARK_PREVIOUS TYPE="LABEL" EXCLUDE_MATCH="TRUE"
			AT_LINE_START="FALSE">: </MARK_PREVIOUS>

		<KEYWORDS>
			<KEYWORD1>architecture</KEYWORD1>
			<KEYWORD1>alias</KEYWORD1>
 			<KEYWORD1>assert</KEYWORD1>
			<KEYWORD1>entity</KEYWORD1>
			<KEYWORD1>process</KEYWORD1>
			<KEYWORD1>variable</KEYWORD1>
			<KEYWORD1>signal</KEYWORD1>
			<KEYWORD1>function</KEYWORD1>
			<KEYWORD1>generic</KEYWORD1>
			<KEYWORD1>in</KEYWORD1>
			<KEYWORD1>out</KEYWORD1>
			<KEYWORD1>inout</KEYWORD1>
			<KEYWORD1>begin</KEYWORD1>
			<KEYWORD1>end</KEYWORD1>
			<KEYWORD1>component</KEYWORD1>
			<KEYWORD1>use</KEYWORD1>
			<KEYWORD1>library</KEYWORD1>
			<KEYWORD1>loop</KEYWORD1>
			<KEYWORD1>constant</KEYWORD1>
			<KEYWORD1>break</KEYWORD1>
			<KEYWORD1>case</KEYWORD1>
			<KEYWORD1>port</KEYWORD1>
			<KEYWORD1>is</KEYWORD1>
			<KEYWORD1>to</KEYWORD1>
			<KEYWORD1>of</KEYWORD1>
			<KEYWORD1>array</KEYWORD1>
			<KEYWORD1>catch</KEYWORD1>
			<KEYWORD1>continue</KEYWORD1>
			<KEYWORD1>default</KEYWORD1>
			<KEYWORD1>do</KEYWORD1>
			<KEYWORD1>else</KEYWORD1>
			<KEYWORD1>elsif</KEYWORD1>
			<KEYWORD1>when</KEYWORD1>
			<KEYWORD1>then</KEYWORD1>
			<KEYWORD1>downto</KEYWORD1>
			<KEYWORD1>upto</KEYWORD1>
			<KEYWORD1>extends</KEYWORD1>
			<KEYWORD1>for</KEYWORD1>
			<KEYWORD1>if</KEYWORD1>
			<KEYWORD1>implements</KEYWORD1>
			<KEYWORD1>instanceof</KEYWORD1>
			<KEYWORD1>return</KEYWORD1>
			<KEYWORD1>static</KEYWORD1>
			<KEYWORD1>switch</KEYWORD1>
			<KEYWORD1>type</KEYWORD1>
			<KEYWORD1>while</KEYWORD1>
			<KEYWORD1>others</KEYWORD1>
			<KEYWORD1>all</KEYWORD1>
			<KEYWORD1>record</KEYWORD1>
 			<KEYWORD1>range</KEYWORD1>
 			<KEYWORD1>wait</KEYWORD1>

			<KEYWORD2>package</KEYWORD2>
			<KEYWORD2>import</KEYWORD2>
			<KEYWORD2>std_logic</KEYWORD2>
			<KEYWORD2>std_ulogic</KEYWORD2>
			<KEYWORD2>std_logic_vector</KEYWORD2>
			<KEYWORD2>std_ulogic_vector</KEYWORD2>
			<KEYWORD2>integer</KEYWORD2>
			<KEYWORD2>natural</KEYWORD2>
			<KEYWORD2>bit</KEYWORD2>
			<KEYWORD2>bit_vector</KEYWORD2>
			

			<OPERATOR>or</OPERATOR>
			<OPERATOR>nor</OPERATOR>
			<OPERATOR>not</OPERATOR>
			<OPERATOR>nand</OPERATOR>
			<OPERATOR>and</OPERATOR>
			<OPERATOR>xnor</OPERATOR>
			<OPERATOR>sll</OPERATOR>
			<OPERATOR>srl</OPERATOR>
			<OPERATOR>sla</OPERATOR>
			<OPERATOR>sra</OPERATOR>
			<OPERATOR>rol</OPERATOR>
			<OPERATOR>ror</OPERATOR>
			<OPERATOR>or</OPERATOR>
			<OPERATOR>or</OPERATOR>
			<OPERATOR>mod</OPERATOR>
			<OPERATOR>rem</OPERATOR>
			<OPERATOR>abs</OPERATOR>
      
			<KEYWORD3>EVENT</KEYWORD3>
			<KEYWORD3>BASE</KEYWORD3>
			<KEYWORD3>LEFT</KEYWORD3>
			<KEYWORD3>RIGHT</KEYWORD3>
			<KEYWORD3>LOW</KEYWORD3>
			<KEYWORD3>HIGH</KEYWORD3>
			<KEYWORD3>ASCENDING</KEYWORD3>
			<KEYWORD3>IMAGE</KEYWORD3>
			<KEYWORD3>VALUE</KEYWORD3>
			<KEYWORD3>POS</KEYWORD3>
			<KEYWORD3>VAL</KEYWORD3>
			<KEYWORD3>SUCC</KEYWORD3>
			<KEYWORD3>VAL</KEYWORD3>
			<KEYWORD3>POS</KEYWORD3>
			<KEYWORD3>PRED</KEYWORD3>
			<KEYWORD3>VAL</KEYWORD3>
			<KEYWORD3>POS</KEYWORD3>
			<KEYWORD3>LEFTOF</KEYWORD3>
			<KEYWORD3>RIGHTOF</KEYWORD3>
			<KEYWORD3>LEFT</KEYWORD3>
			<KEYWORD3>RIGHT</KEYWORD3>
			<KEYWORD3>LOW</KEYWORD3>
			<KEYWORD3>HIGH</KEYWORD3>
			<KEYWORD3>RANGE</KEYWORD3>
			<KEYWORD3>REVERSE</KEYWORD3>
			<KEYWORD3>LENGTH</KEYWORD3>
			<KEYWORD3>ASCENDING</KEYWORD3>
			<KEYWORD3>DELAYED</KEYWORD3>
			<KEYWORD3>STABLE</KEYWORD3>
			<KEYWORD3>QUIET</KEYWORD3>
			<KEYWORD3>TRANSACTION</KEYWORD3>
			<KEYWORD3>EVENT</KEYWORD3>
			<KEYWORD3>ACTIVE</KEYWORD3>
			<KEYWORD3>LAST</KEYWORD3>
			<KEYWORD3>LAST</KEYWORD3>
			<KEYWORD3>LAST</KEYWORD3>
			<KEYWORD3>DRIVING</KEYWORD3>
			<KEYWORD3>DRIVING</KEYWORD3>
			<KEYWORD3>SIMPLE</KEYWORD3>
			<KEYWORD3>INSTANCE</KEYWORD3>
			<KEYWORD3>PATH</KEYWORD3>
      
			<FUNCTION>rising_edge</FUNCTION>
			<FUNCTION>shift_left</FUNCTION>
			<FUNCTION>shift_right</FUNCTION>
			<FUNCTION>rotate_left</FUNCTION>
			<FUNCTION>rotate_right</FUNCTION>
			<FUNCTION>resize</FUNCTION>
			<FUNCTION>std_match</FUNCTION>
			<FUNCTION>to_integer</FUNCTION>
			<FUNCTION>to_unsigned</FUNCTION>
			<FUNCTION>to_signed</FUNCTION>
			<FUNCTION>unsigned</FUNCTION>
			<FUNCTION>signed</FUNCTION>
			<FUNCTION>to_bit</FUNCTION>
			<FUNCTION>to_bitvector</FUNCTION>
			<FUNCTION>to_stdulogic</FUNCTION>
			<FUNCTION>to_stdlogicvector</FUNCTION>
			<FUNCTION>to_stdulogicvector</FUNCTION>
			
			<LITERAL2>false</LITERAL2>
			<LITERAL2>true</LITERAL2>
		</KEYWORDS>
	</RULES>
</MODE>