/3rd_party/llvm/lib/CodeGen/LiveIntervalUnion.h

https://code.google.com/p/softart/ · C++ Header · 210 lines · 115 code · 42 blank · 53 comment · 12 complexity · 3fcf73dc735998209b4a05a48b4fd427 MD5 · raw file

  1. //===-- LiveIntervalUnion.h - Live interval union data struct --*- C++ -*--===//
  2. //
  3. // The LLVM Compiler Infrastructure
  4. //
  5. // This file is distributed under the University of Illinois Open Source
  6. // License. See LICENSE.TXT for details.
  7. //
  8. //===----------------------------------------------------------------------===//
  9. //
  10. // LiveIntervalUnion is a union of live segments across multiple live virtual
  11. // registers. This may be used during coalescing to represent a congruence
  12. // class, or during register allocation to model liveness of a physical
  13. // register.
  14. //
  15. //===----------------------------------------------------------------------===//
  16. #ifndef LLVM_CODEGEN_LIVEINTERVALUNION
  17. #define LLVM_CODEGEN_LIVEINTERVALUNION
  18. #include "llvm/ADT/IntervalMap.h"
  19. #include "llvm/CodeGen/LiveInterval.h"
  20. namespace llvm {
  21. class MachineLoopRange;
  22. class TargetRegisterInfo;
  23. #ifndef NDEBUG
  24. // forward declaration
  25. template <unsigned Element> class SparseBitVector;
  26. typedef SparseBitVector<128> LiveVirtRegBitSet;
  27. #endif
  28. /// Compare a live virtual register segment to a LiveIntervalUnion segment.
  29. inline bool
  30. overlap(const LiveRange &VRSeg,
  31. const IntervalMap<SlotIndex, LiveInterval*>::const_iterator &LUSeg) {
  32. return VRSeg.start < LUSeg.stop() && LUSeg.start() < VRSeg.end;
  33. }
  34. /// Union of live intervals that are strong candidates for coalescing into a
  35. /// single register (either physical or virtual depending on the context). We
  36. /// expect the constituent live intervals to be disjoint, although we may
  37. /// eventually make exceptions to handle value-based interference.
  38. class LiveIntervalUnion {
  39. // A set of live virtual register segments that supports fast insertion,
  40. // intersection, and removal.
  41. // Mapping SlotIndex intervals to virtual register numbers.
  42. typedef IntervalMap<SlotIndex, LiveInterval*> LiveSegments;
  43. public:
  44. // SegmentIter can advance to the next segment ordered by starting position
  45. // which may belong to a different live virtual register. We also must be able
  46. // to reach the current segment's containing virtual register.
  47. typedef LiveSegments::iterator SegmentIter;
  48. // LiveIntervalUnions share an external allocator.
  49. typedef LiveSegments::Allocator Allocator;
  50. class Query;
  51. private:
  52. unsigned Tag; // unique tag for current contents.
  53. LiveSegments Segments; // union of virtual reg segments
  54. public:
  55. explicit LiveIntervalUnion(Allocator &a) : Tag(0), Segments(a) {}
  56. // Iterate over all segments in the union of live virtual registers ordered
  57. // by their starting position.
  58. SegmentIter begin() { return Segments.begin(); }
  59. SegmentIter end() { return Segments.end(); }
  60. SegmentIter find(SlotIndex x) { return Segments.find(x); }
  61. bool empty() const { return Segments.empty(); }
  62. SlotIndex startIndex() const { return Segments.start(); }
  63. // Provide public access to the underlying map to allow overlap iteration.
  64. typedef LiveSegments Map;
  65. const Map &getMap() { return Segments; }
  66. /// getTag - Return an opaque tag representing the current state of the union.
  67. unsigned getTag() const { return Tag; }
  68. /// changedSince - Return true if the union change since getTag returned tag.
  69. bool changedSince(unsigned tag) const { return tag != Tag; }
  70. // Add a live virtual register to this union and merge its segments.
  71. void unify(LiveInterval &VirtReg);
  72. // Remove a live virtual register's segments from this union.
  73. void extract(LiveInterval &VirtReg);
  74. // Remove all inserted virtual registers.
  75. void clear() { Segments.clear(); ++Tag; }
  76. // Print union, using TRI to translate register names
  77. void print(raw_ostream &OS, const TargetRegisterInfo *TRI) const;
  78. #ifndef NDEBUG
  79. // Verify the live intervals in this union and add them to the visited set.
  80. void verify(LiveVirtRegBitSet& VisitedVRegs);
  81. #endif
  82. /// Query interferences between a single live virtual register and a live
  83. /// interval union.
  84. class Query {
  85. LiveIntervalUnion *LiveUnion;
  86. LiveInterval *VirtReg;
  87. LiveInterval::iterator VirtRegI; // current position in VirtReg
  88. SegmentIter LiveUnionI; // current position in LiveUnion
  89. SmallVector<LiveInterval*,4> InterferingVRegs;
  90. bool CheckedFirstInterference;
  91. bool SeenAllInterferences;
  92. bool SeenUnspillableVReg;
  93. unsigned Tag, UserTag;
  94. public:
  95. Query(): LiveUnion(), VirtReg(), Tag(0), UserTag(0) {}
  96. Query(LiveInterval *VReg, LiveIntervalUnion *LIU):
  97. LiveUnion(LIU), VirtReg(VReg), CheckedFirstInterference(false),
  98. SeenAllInterferences(false), SeenUnspillableVReg(false)
  99. {}
  100. void clear() {
  101. LiveUnion = NULL;
  102. VirtReg = NULL;
  103. InterferingVRegs.clear();
  104. CheckedFirstInterference = false;
  105. SeenAllInterferences = false;
  106. SeenUnspillableVReg = false;
  107. Tag = 0;
  108. UserTag = 0;
  109. }
  110. void init(unsigned UTag, LiveInterval *VReg, LiveIntervalUnion *LIU) {
  111. assert(VReg && LIU && "Invalid arguments");
  112. if (UserTag == UTag && VirtReg == VReg &&
  113. LiveUnion == LIU && !LIU->changedSince(Tag)) {
  114. // Retain cached results, e.g. firstInterference.
  115. return;
  116. }
  117. clear();
  118. LiveUnion = LIU;
  119. VirtReg = VReg;
  120. Tag = LIU->getTag();
  121. UserTag = UTag;
  122. }
  123. LiveInterval &virtReg() const {
  124. assert(VirtReg && "uninitialized");
  125. return *VirtReg;
  126. }
  127. // Does this live virtual register interfere with the union?
  128. bool checkInterference() { return collectInterferingVRegs(1); }
  129. // Count the virtual registers in this union that interfere with this
  130. // query's live virtual register, up to maxInterferingRegs.
  131. unsigned collectInterferingVRegs(unsigned MaxInterferingRegs = UINT_MAX);
  132. // Was this virtual register visited during collectInterferingVRegs?
  133. bool isSeenInterference(LiveInterval *VReg) const;
  134. // Did collectInterferingVRegs collect all interferences?
  135. bool seenAllInterferences() const { return SeenAllInterferences; }
  136. // Did collectInterferingVRegs encounter an unspillable vreg?
  137. bool seenUnspillableVReg() const { return SeenUnspillableVReg; }
  138. // Vector generated by collectInterferingVRegs.
  139. const SmallVectorImpl<LiveInterval*> &interferingVRegs() const {
  140. return InterferingVRegs;
  141. }
  142. /// checkLoopInterference - Return true if there is interference overlapping
  143. /// Loop.
  144. bool checkLoopInterference(MachineLoopRange*);
  145. private:
  146. Query(const Query&); // DO NOT IMPLEMENT
  147. void operator=(const Query&); // DO NOT IMPLEMENT
  148. };
  149. // Array of LiveIntervalUnions.
  150. class Array {
  151. unsigned Size;
  152. LiveIntervalUnion *LIUs;
  153. public:
  154. Array() : Size(0), LIUs(0) {}
  155. ~Array() { clear(); }
  156. // Initialize the array to have Size entries.
  157. // Reuse an existing allocation if the size matches.
  158. void init(LiveIntervalUnion::Allocator&, unsigned Size);
  159. unsigned size() const { return Size; }
  160. void clear();
  161. LiveIntervalUnion& operator[](unsigned idx) {
  162. assert(idx < Size && "idx out of bounds");
  163. return LIUs[idx];
  164. }
  165. };
  166. };
  167. } // end namespace llvm
  168. #endif // !defined(LLVM_CODEGEN_LIVEINTERVALUNION)