/3rd_party/llvm/lib/CodeGen/LLVMTargetMachine.cpp

https://code.google.com/p/softart/ · C++ · 296 lines · 194 code · 45 blank · 57 comment · 27 complexity · 5a37bdaed04c2f60ca27e237228417d5 MD5 · raw file

  1. //===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
  2. //
  3. // The LLVM Compiler Infrastructure
  4. //
  5. // This file is distributed under the University of Illinois Open Source
  6. // License. See LICENSE.TXT for details.
  7. //
  8. //===----------------------------------------------------------------------===//
  9. //
  10. // This file implements the LLVMTargetMachine class.
  11. //
  12. //===----------------------------------------------------------------------===//
  13. #include "llvm/Target/TargetMachine.h"
  14. #include "llvm/ADT/OwningPtr.h"
  15. #include "llvm/Assembly/PrintModulePass.h"
  16. #include "llvm/CodeGen/AsmPrinter.h"
  17. #include "llvm/CodeGen/MachineFunctionAnalysis.h"
  18. #include "llvm/CodeGen/MachineModuleInfo.h"
  19. #include "llvm/CodeGen/Passes.h"
  20. #include "llvm/MC/MCAsmInfo.h"
  21. #include "llvm/MC/MCContext.h"
  22. #include "llvm/MC/MCInstrInfo.h"
  23. #include "llvm/MC/MCStreamer.h"
  24. #include "llvm/MC/MCSubtargetInfo.h"
  25. #include "llvm/PassManager.h"
  26. #include "llvm/Support/CommandLine.h"
  27. #include "llvm/Support/ErrorHandling.h"
  28. #include "llvm/Support/FormattedStream.h"
  29. #include "llvm/Support/TargetRegistry.h"
  30. #include "llvm/Target/TargetInstrInfo.h"
  31. #include "llvm/Target/TargetLowering.h"
  32. #include "llvm/Target/TargetLoweringObjectFile.h"
  33. #include "llvm/Target/TargetOptions.h"
  34. #include "llvm/Target/TargetRegisterInfo.h"
  35. #include "llvm/Target/TargetSubtargetInfo.h"
  36. #include "llvm/Transforms/Scalar.h"
  37. using namespace llvm;
  38. // Enable or disable FastISel. Both options are needed, because
  39. // FastISel is enabled by default with -fast, and we wish to be
  40. // able to enable or disable fast-isel independently from -O0.
  41. static cl::opt<cl::boolOrDefault>
  42. EnableFastISelOption("fast-isel", cl::Hidden,
  43. cl::desc("Enable the \"fast\" instruction selector"));
  44. static cl::opt<bool> ShowMCEncoding("show-mc-encoding", cl::Hidden,
  45. cl::desc("Show encoding in .s output"));
  46. static cl::opt<bool> ShowMCInst("show-mc-inst", cl::Hidden,
  47. cl::desc("Show instruction structure in .s output"));
  48. static cl::opt<cl::boolOrDefault>
  49. AsmVerbose("asm-verbose", cl::desc("Add comments to directives."),
  50. cl::init(cl::BOU_UNSET));
  51. static bool getVerboseAsm() {
  52. switch (AsmVerbose) {
  53. case cl::BOU_UNSET: return TargetMachine::getAsmVerbosityDefault();
  54. case cl::BOU_TRUE: return true;
  55. case cl::BOU_FALSE: return false;
  56. }
  57. llvm_unreachable("Invalid verbose asm state");
  58. }
  59. void LLVMTargetMachine::initAsmInfo() {
  60. AsmInfo = TheTarget.createMCAsmInfo(*getRegisterInfo(), TargetTriple);
  61. // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
  62. // and if the old one gets included then MCAsmInfo will be NULL and
  63. // we'll crash later.
  64. // Provide the user with a useful error message about what's wrong.
  65. assert(AsmInfo && "MCAsmInfo not initialized. "
  66. "Make sure you include the correct TargetSelect.h"
  67. "and that InitializeAllTargetMCs() is being invoked!");
  68. }
  69. LLVMTargetMachine::LLVMTargetMachine(const Target &T, StringRef Triple,
  70. StringRef CPU, StringRef FS,
  71. TargetOptions Options,
  72. Reloc::Model RM, CodeModel::Model CM,
  73. CodeGenOpt::Level OL)
  74. : TargetMachine(T, Triple, CPU, FS, Options) {
  75. CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM, OL);
  76. }
  77. void LLVMTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
  78. PM.add(createBasicTargetTransformInfoPass(this));
  79. }
  80. /// addPassesToX helper drives creation and initialization of TargetPassConfig.
  81. static MCContext *addPassesToGenerateCode(LLVMTargetMachine *TM,
  82. PassManagerBase &PM,
  83. bool DisableVerify,
  84. AnalysisID StartAfter,
  85. AnalysisID StopAfter) {
  86. // Targets may override createPassConfig to provide a target-specific sublass.
  87. TargetPassConfig *PassConfig = TM->createPassConfig(PM);
  88. PassConfig->setStartStopPasses(StartAfter, StopAfter);
  89. // Set PassConfig options provided by TargetMachine.
  90. PassConfig->setDisableVerify(DisableVerify);
  91. PM.add(PassConfig);
  92. PassConfig->addIRPasses();
  93. PassConfig->addCodeGenPrepare();
  94. PassConfig->addPassesToHandleExceptions();
  95. PassConfig->addISelPrepare();
  96. // Install a MachineModuleInfo class, which is an immutable pass that holds
  97. // all the per-module stuff we're generating, including MCContext.
  98. MachineModuleInfo *MMI =
  99. new MachineModuleInfo(*TM->getMCAsmInfo(), *TM->getRegisterInfo(),
  100. &TM->getTargetLowering()->getObjFileLowering());
  101. PM.add(MMI);
  102. // Set up a MachineFunction for the rest of CodeGen to work on.
  103. PM.add(new MachineFunctionAnalysis(*TM));
  104. // Enable FastISel with -fast, but allow that to be overridden.
  105. if (EnableFastISelOption == cl::BOU_TRUE ||
  106. (TM->getOptLevel() == CodeGenOpt::None &&
  107. EnableFastISelOption != cl::BOU_FALSE))
  108. TM->setFastISel(true);
  109. // Ask the target for an isel.
  110. if (PassConfig->addInstSelector())
  111. return NULL;
  112. PassConfig->addMachinePasses();
  113. PassConfig->setInitialized();
  114. return &MMI->getContext();
  115. }
  116. bool LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
  117. formatted_raw_ostream &Out,
  118. CodeGenFileType FileType,
  119. bool DisableVerify,
  120. AnalysisID StartAfter,
  121. AnalysisID StopAfter) {
  122. // Add common CodeGen passes.
  123. MCContext *Context = addPassesToGenerateCode(this, PM, DisableVerify,
  124. StartAfter, StopAfter);
  125. if (!Context)
  126. return true;
  127. if (StopAfter) {
  128. // FIXME: The intent is that this should eventually write out a YAML file,
  129. // containing the LLVM IR, the machine-level IR (when stopping after a
  130. // machine-level pass), and whatever other information is needed to
  131. // deserialize the code and resume compilation. For now, just write the
  132. // LLVM IR.
  133. PM.add(createPrintModulePass(&Out));
  134. return false;
  135. }
  136. if (hasMCSaveTempLabels())
  137. Context->setAllowTemporaryLabels(false);
  138. const MCAsmInfo &MAI = *getMCAsmInfo();
  139. const MCRegisterInfo &MRI = *getRegisterInfo();
  140. const MCInstrInfo &MII = *getInstrInfo();
  141. const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
  142. OwningPtr<MCStreamer> AsmStreamer;
  143. switch (FileType) {
  144. case CGFT_AssemblyFile: {
  145. MCInstPrinter *InstPrinter =
  146. getTarget().createMCInstPrinter(MAI.getAssemblerDialect(), MAI,
  147. MII, MRI, STI);
  148. // Create a code emitter if asked to show the encoding.
  149. MCCodeEmitter *MCE = 0;
  150. if (ShowMCEncoding)
  151. MCE = getTarget().createMCCodeEmitter(MII, MRI, STI, *Context);
  152. MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(),
  153. TargetCPU);
  154. MCStreamer *S = getTarget().createAsmStreamer(*Context, Out,
  155. getVerboseAsm(),
  156. hasMCUseLoc(),
  157. hasMCUseCFI(),
  158. hasMCUseDwarfDirectory(),
  159. InstPrinter,
  160. MCE, MAB,
  161. ShowMCInst);
  162. AsmStreamer.reset(S);
  163. break;
  164. }
  165. case CGFT_ObjectFile: {
  166. // Create the code emitter for the target if it exists. If not, .o file
  167. // emission fails.
  168. MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(MII, MRI, STI,
  169. *Context);
  170. MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(),
  171. TargetCPU);
  172. if (MCE == 0 || MAB == 0)
  173. return true;
  174. AsmStreamer.reset(getTarget().createMCObjectStreamer(getTargetTriple(),
  175. *Context, *MAB, Out,
  176. MCE, hasMCRelaxAll(),
  177. hasMCNoExecStack()));
  178. AsmStreamer.get()->setAutoInitSections(true);
  179. break;
  180. }
  181. case CGFT_Null:
  182. // The Null output is intended for use for performance analysis and testing,
  183. // not real users.
  184. AsmStreamer.reset(createNullStreamer(*Context));
  185. break;
  186. }
  187. // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
  188. FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer);
  189. if (Printer == 0)
  190. return true;
  191. // If successful, createAsmPrinter took ownership of AsmStreamer.
  192. AsmStreamer.take();
  193. PM.add(Printer);
  194. return false;
  195. }
  196. /// addPassesToEmitMachineCode - Add passes to the specified pass manager to
  197. /// get machine code emitted. This uses a JITCodeEmitter object to handle
  198. /// actually outputting the machine code and resolving things like the address
  199. /// of functions. This method should return true if machine code emission is
  200. /// not supported.
  201. ///
  202. bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
  203. JITCodeEmitter &JCE,
  204. bool DisableVerify) {
  205. // Add common CodeGen passes.
  206. MCContext *Context = addPassesToGenerateCode(this, PM, DisableVerify, 0, 0);
  207. if (!Context)
  208. return true;
  209. addCodeEmitter(PM, JCE);
  210. return false; // success!
  211. }
  212. /// addPassesToEmitMC - Add passes to the specified pass manager to get
  213. /// machine code emitted with the MCJIT. This method returns true if machine
  214. /// code is not supported. It fills the MCContext Ctx pointer which can be
  215. /// used to build custom MCStreamer.
  216. ///
  217. bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM,
  218. MCContext *&Ctx,
  219. raw_ostream &Out,
  220. bool DisableVerify) {
  221. // Add common CodeGen passes.
  222. Ctx = addPassesToGenerateCode(this, PM, DisableVerify, 0, 0);
  223. if (!Ctx)
  224. return true;
  225. if (hasMCSaveTempLabels())
  226. Ctx->setAllowTemporaryLabels(false);
  227. // Create the code emitter for the target if it exists. If not, .o file
  228. // emission fails.
  229. const MCRegisterInfo &MRI = *getRegisterInfo();
  230. const MCSubtargetInfo &STI = getSubtarget<MCSubtargetInfo>();
  231. MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(*getInstrInfo(), MRI,
  232. STI, *Ctx);
  233. MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(),
  234. TargetCPU);
  235. if (MCE == 0 || MAB == 0)
  236. return true;
  237. OwningPtr<MCStreamer> AsmStreamer;
  238. AsmStreamer.reset(getTarget().createMCObjectStreamer(getTargetTriple(), *Ctx,
  239. *MAB, Out, MCE,
  240. hasMCRelaxAll(),
  241. hasMCNoExecStack()));
  242. AsmStreamer.get()->InitSections();
  243. // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
  244. FunctionPass *Printer = getTarget().createAsmPrinter(*this, *AsmStreamer);
  245. if (Printer == 0)
  246. return true;
  247. // If successful, createAsmPrinter took ownership of AsmStreamer.
  248. AsmStreamer.take();
  249. PM.add(Printer);
  250. return false; // success!
  251. }