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/3rd_party/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h

https://code.google.com/p/softart/
C Header | 557 lines | 420 code | 35 blank | 102 comment | 0 complexity | 0a78a5ff080efd97c16425eed47e8333 MD5 | raw file
Possible License(s): LGPL-2.1, BSD-3-Clause, JSON, MPL-2.0-no-copyleft-exception, GPL-2.0, GPL-3.0, LGPL-3.0, BSD-2-Clause
  1/*===-- X86DisassemblerDecoderCommon.h - Disassembler decoder -----*- C -*-===*
  2 *
  3 *                     The LLVM Compiler Infrastructure
  4 *
  5 * This file is distributed under the University of Illinois Open Source
  6 * License. See LICENSE.TXT for details.
  7 *
  8 *===----------------------------------------------------------------------===*
  9 *
 10 * This file is part of the X86 Disassembler.
 11 * It contains common definitions used by both the disassembler and the table
 12 *  generator.
 13 * Documentation for the disassembler can be found in X86Disassembler.h.
 14 *
 15 *===----------------------------------------------------------------------===*/
 16
 17/*
 18 * This header file provides those definitions that need to be shared between
 19 * the decoder and the table generator in a C-friendly manner.
 20 */
 21
 22#ifndef X86DISASSEMBLERDECODERCOMMON_H
 23#define X86DISASSEMBLERDECODERCOMMON_H
 24
 25#include "llvm/Support/DataTypes.h"
 26
 27#define INSTRUCTIONS_SYM  x86DisassemblerInstrSpecifiers
 28#define CONTEXTS_SYM      x86DisassemblerContexts
 29#define ONEBYTE_SYM       x86DisassemblerOneByteOpcodes
 30#define TWOBYTE_SYM       x86DisassemblerTwoByteOpcodes
 31#define THREEBYTE38_SYM   x86DisassemblerThreeByte38Opcodes
 32#define THREEBYTE3A_SYM   x86DisassemblerThreeByte3AOpcodes
 33#define THREEBYTEA6_SYM   x86DisassemblerThreeByteA6Opcodes
 34#define THREEBYTEA7_SYM   x86DisassemblerThreeByteA7Opcodes
 35#define XOP8_MAP_SYM      x86DisassemblerXOP8Opcodes
 36#define XOP9_MAP_SYM      x86DisassemblerXOP9Opcodes
 37#define XOPA_MAP_SYM      x86DisassemblerXOPAOpcodes
 38
 39#define INSTRUCTIONS_STR  "x86DisassemblerInstrSpecifiers"
 40#define CONTEXTS_STR      "x86DisassemblerContexts"
 41#define ONEBYTE_STR       "x86DisassemblerOneByteOpcodes"
 42#define TWOBYTE_STR       "x86DisassemblerTwoByteOpcodes"
 43#define THREEBYTE38_STR   "x86DisassemblerThreeByte38Opcodes"
 44#define THREEBYTE3A_STR   "x86DisassemblerThreeByte3AOpcodes"
 45#define THREEBYTEA6_STR   "x86DisassemblerThreeByteA6Opcodes"
 46#define THREEBYTEA7_STR   "x86DisassemblerThreeByteA7Opcodes"
 47#define XOP8_MAP_STR      "x86DisassemblerXOP8Opcodes"
 48#define XOP9_MAP_STR      "x86DisassemblerXOP9Opcodes"
 49#define XOPA_MAP_STR      "x86DisassemblerXOPAOpcodes"
 50
 51/*
 52 * Attributes of an instruction that must be known before the opcode can be
 53 * processed correctly.  Most of these indicate the presence of particular
 54 * prefixes, but ATTR_64BIT is simply an attribute of the decoding context.
 55 */
 56#define ATTRIBUTE_BITS          \
 57  ENUM_ENTRY(ATTR_NONE,   0x00) \
 58  ENUM_ENTRY(ATTR_64BIT,  0x01) \
 59  ENUM_ENTRY(ATTR_XS,     0x02) \
 60  ENUM_ENTRY(ATTR_XD,     0x04) \
 61  ENUM_ENTRY(ATTR_REXW,   0x08) \
 62  ENUM_ENTRY(ATTR_OPSIZE, 0x10) \
 63  ENUM_ENTRY(ATTR_ADSIZE, 0x20) \
 64  ENUM_ENTRY(ATTR_VEX,    0x40) \
 65  ENUM_ENTRY(ATTR_VEXL,   0x80)
 66
 67#define ENUM_ENTRY(n, v) n = v,
 68enum attributeBits {
 69  ATTRIBUTE_BITS
 70  ATTR_max
 71};
 72#undef ENUM_ENTRY
 73
 74/*
 75 * Combinations of the above attributes that are relevant to instruction
 76 * decode.  Although other combinations are possible, they can be reduced to
 77 * these without affecting the ultimately decoded instruction.
 78 */
 79
 80/*           Class name           Rank  Rationale for rank assignment         */
 81#define INSTRUCTION_CONTEXTS                                                   \
 82  ENUM_ENTRY(IC,                    0,  "says nothing about the instruction")  \
 83  ENUM_ENTRY(IC_64BIT,              1,  "says the instruction applies in "     \
 84                                        "64-bit mode but no more")             \
 85  ENUM_ENTRY(IC_OPSIZE,             3,  "requires an OPSIZE prefix, so "       \
 86                                        "operands change width")               \
 87  ENUM_ENTRY(IC_ADSIZE,             3,  "requires an ADSIZE prefix, so "       \
 88                                        "operands change width")               \
 89  ENUM_ENTRY(IC_XD,                 2,  "may say something about the opcode "  \
 90                                        "but not the operands")                \
 91  ENUM_ENTRY(IC_XS,                 2,  "may say something about the opcode "  \
 92                                        "but not the operands")                \
 93  ENUM_ENTRY(IC_XD_OPSIZE,          3,  "requires an OPSIZE prefix, so "       \
 94                                        "operands change width")               \
 95  ENUM_ENTRY(IC_XS_OPSIZE,          3,  "requires an OPSIZE prefix, so "       \
 96                                        "operands change width")               \
 97  ENUM_ENTRY(IC_64BIT_REXW,         4,  "requires a REX.W prefix, so operands "\
 98                                        "change width; overrides IC_OPSIZE")   \
 99  ENUM_ENTRY(IC_64BIT_OPSIZE,       3,  "Just as meaningful as IC_OPSIZE")     \
100  ENUM_ENTRY(IC_64BIT_ADSIZE,       3,  "Just as meaningful as IC_ADSIZE")     \
101  ENUM_ENTRY(IC_64BIT_XD,           5,  "XD instructions are SSE; REX.W is "   \
102                                        "secondary")                           \
103  ENUM_ENTRY(IC_64BIT_XS,           5,  "Just as meaningful as IC_64BIT_XD")   \
104  ENUM_ENTRY(IC_64BIT_XD_OPSIZE,    3,  "Just as meaningful as IC_XD_OPSIZE")  \
105  ENUM_ENTRY(IC_64BIT_XS_OPSIZE,    3,  "Just as meaningful as IC_XS_OPSIZE")  \
106  ENUM_ENTRY(IC_64BIT_REXW_XS,      6,  "OPSIZE could mean a different "       \
107                                        "opcode")                              \
108  ENUM_ENTRY(IC_64BIT_REXW_XD,      6,  "Just as meaningful as "               \
109                                        "IC_64BIT_REXW_XS")                    \
110  ENUM_ENTRY(IC_64BIT_REXW_OPSIZE,  7,  "The Dynamic Duo!  Prefer over all "   \
111                                        "else because this changes most "      \
112                                        "operands' meaning")                   \
113  ENUM_ENTRY(IC_VEX,                1,  "requires a VEX prefix")               \
114  ENUM_ENTRY(IC_VEX_XS,             2,  "requires VEX and the XS prefix")      \
115  ENUM_ENTRY(IC_VEX_XD,             2,  "requires VEX and the XD prefix")      \
116  ENUM_ENTRY(IC_VEX_OPSIZE,         2,  "requires VEX and the OpSize prefix")  \
117  ENUM_ENTRY(IC_VEX_W,              3,  "requires VEX and the W prefix")       \
118  ENUM_ENTRY(IC_VEX_W_XS,           4,  "requires VEX, W, and XS prefix")      \
119  ENUM_ENTRY(IC_VEX_W_XD,           4,  "requires VEX, W, and XD prefix")      \
120  ENUM_ENTRY(IC_VEX_W_OPSIZE,       4,  "requires VEX, W, and OpSize")         \
121  ENUM_ENTRY(IC_VEX_L,              3,  "requires VEX and the L prefix")       \
122  ENUM_ENTRY(IC_VEX_L_XS,           4,  "requires VEX and the L and XS prefix")\
123  ENUM_ENTRY(IC_VEX_L_XD,           4,  "requires VEX and the L and XD prefix")\
124  ENUM_ENTRY(IC_VEX_L_OPSIZE,       4,  "requires VEX, L, and OpSize")         \
125  ENUM_ENTRY(IC_VEX_L_W,            4,  "requires VEX, L and W")               \
126  ENUM_ENTRY(IC_VEX_L_W_XS,         5,  "requires VEX, L, W and XS prefix")    \
127  ENUM_ENTRY(IC_VEX_L_W_XD,         5,  "requires VEX, L, W and XD prefix")    \
128  ENUM_ENTRY(IC_VEX_L_W_OPSIZE,     5,  "requires VEX, L, W and OpSize")       \
129  ENUM_ENTRY(IC_EVEX,               1,  "requires an EVEX prefix")             \
130  ENUM_ENTRY(IC_EVEX_XS,            2,  "requires EVEX and the XS prefix")     \
131  ENUM_ENTRY(IC_EVEX_XD,            2,  "requires EVEX and the XD prefix")     \
132  ENUM_ENTRY(IC_EVEX_OPSIZE,        2,  "requires EVEX and the OpSize prefix") \
133  ENUM_ENTRY(IC_EVEX_W,             3,  "requires EVEX and the W prefix")      \
134  ENUM_ENTRY(IC_EVEX_W_XS,          4,  "requires EVEX, W, and XS prefix")     \
135  ENUM_ENTRY(IC_EVEX_W_XD,          4,  "requires EVEX, W, and XD prefix")     \
136  ENUM_ENTRY(IC_EVEX_W_OPSIZE,      4,  "requires EVEX, W, and OpSize")        \
137  ENUM_ENTRY(IC_EVEX_L,             3,  "requires EVEX and the L prefix")       \
138  ENUM_ENTRY(IC_EVEX_L_XS,          4,  "requires EVEX and the L and XS prefix")\
139  ENUM_ENTRY(IC_EVEX_L_XD,          4,  "requires EVEX and the L and XD prefix")\
140  ENUM_ENTRY(IC_EVEX_L_OPSIZE,      4,  "requires EVEX, L, and OpSize")         \
141  ENUM_ENTRY(IC_EVEX_L_W,           3,  "requires EVEX, L and W")               \
142  ENUM_ENTRY(IC_EVEX_L_W_XS,        4,  "requires EVEX, L, W and XS prefix")    \
143  ENUM_ENTRY(IC_EVEX_L_W_XD,        4,  "requires EVEX, L, W and XD prefix")    \
144  ENUM_ENTRY(IC_EVEX_L_W_OPSIZE,    4,  "requires EVEX, L, W and OpSize")       \
145  ENUM_ENTRY(IC_EVEX_L2,            3,  "requires EVEX and the L2 prefix")       \
146  ENUM_ENTRY(IC_EVEX_L2_XS,         4,  "requires EVEX and the L2 and XS prefix")\
147  ENUM_ENTRY(IC_EVEX_L2_XD,         4,  "requires EVEX and the L2 and XD prefix")\
148  ENUM_ENTRY(IC_EVEX_L2_OPSIZE,     4,  "requires EVEX, L2, and OpSize")         \
149  ENUM_ENTRY(IC_EVEX_L2_W,          3,  "requires EVEX, L2 and W")               \
150  ENUM_ENTRY(IC_EVEX_L2_W_XS,       4,  "requires EVEX, L2, W and XS prefix")    \
151  ENUM_ENTRY(IC_EVEX_L2_W_XD,       4,  "requires EVEX, L2, W and XD prefix")    \
152  ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE,   4,  "requires EVEX, L2, W and OpSize")       \
153  ENUM_ENTRY(IC_EVEX_K,             1,  "requires an EVEX_K prefix")             \
154  ENUM_ENTRY(IC_EVEX_XS_K,          2,  "requires EVEX_K and the XS prefix")     \
155  ENUM_ENTRY(IC_EVEX_XD_K,          2,  "requires EVEX_K and the XD prefix")     \
156  ENUM_ENTRY(IC_EVEX_OPSIZE_K,      2,  "requires EVEX_K and the OpSize prefix") \
157  ENUM_ENTRY(IC_EVEX_W_K,           3,  "requires EVEX_K and the W prefix")      \
158  ENUM_ENTRY(IC_EVEX_W_XS_K,        4,  "requires EVEX_K, W, and XS prefix")     \
159  ENUM_ENTRY(IC_EVEX_W_XD_K,        4,  "requires EVEX_K, W, and XD prefix")     \
160  ENUM_ENTRY(IC_EVEX_W_OPSIZE_K,    4,  "requires EVEX_K, W, and OpSize")        \
161  ENUM_ENTRY(IC_EVEX_L_K,           3,  "requires EVEX_K and the L prefix")       \
162  ENUM_ENTRY(IC_EVEX_L_XS_K,        4,  "requires EVEX_K and the L and XS prefix")\
163  ENUM_ENTRY(IC_EVEX_L_XD_K,        4,  "requires EVEX_K and the L and XD prefix")\
164  ENUM_ENTRY(IC_EVEX_L_OPSIZE_K,    4,  "requires EVEX_K, L, and OpSize")         \
165  ENUM_ENTRY(IC_EVEX_L_W_K,         3,  "requires EVEX_K, L and W")               \
166  ENUM_ENTRY(IC_EVEX_L_W_XS_K,      4,  "requires EVEX_K, L, W and XS prefix")    \
167  ENUM_ENTRY(IC_EVEX_L_W_XD_K,      4,  "requires EVEX_K, L, W and XD prefix")    \
168  ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K,  4,  "requires EVEX_K, L, W and OpSize")       \
169  ENUM_ENTRY(IC_EVEX_L2_K,          3,  "requires EVEX_K and the L2 prefix")       \
170  ENUM_ENTRY(IC_EVEX_L2_XS_K,       4,  "requires EVEX_K and the L2 and XS prefix")\
171  ENUM_ENTRY(IC_EVEX_L2_XD_K,       4,  "requires EVEX_K and the L2 and XD prefix")\
172  ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K,   4,  "requires EVEX_K, L2, and OpSize")         \
173  ENUM_ENTRY(IC_EVEX_L2_W_K,        3,  "requires EVEX_K, L2 and W")               \
174  ENUM_ENTRY(IC_EVEX_L2_W_XS_K,     4,  "requires EVEX_K, L2, W and XS prefix")    \
175  ENUM_ENTRY(IC_EVEX_L2_W_XD_K,     4,  "requires EVEX_K, L2, W and XD prefix")    \
176  ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K, 4,  "requires EVEX_K, L2, W and OpSize")     \
177  ENUM_ENTRY(IC_EVEX_B,             1,  "requires an EVEX_B prefix")             \
178  ENUM_ENTRY(IC_EVEX_XS_B,          2,  "requires EVEX_B and the XS prefix")     \
179  ENUM_ENTRY(IC_EVEX_XD_B,          2,  "requires EVEX_B and the XD prefix")     \
180  ENUM_ENTRY(IC_EVEX_OPSIZE_B,      2,  "requires EVEX_B and the OpSize prefix") \
181  ENUM_ENTRY(IC_EVEX_W_B,           3,  "requires EVEX_B and the W prefix")      \
182  ENUM_ENTRY(IC_EVEX_W_XS_B,        4,  "requires EVEX_B, W, and XS prefix")     \
183  ENUM_ENTRY(IC_EVEX_W_XD_B,        4,  "requires EVEX_B, W, and XD prefix")     \
184  ENUM_ENTRY(IC_EVEX_W_OPSIZE_B,    4,  "requires EVEX_B, W, and OpSize")        \
185  ENUM_ENTRY(IC_EVEX_L_B,           3,  "requires EVEX_B and the L prefix")       \
186  ENUM_ENTRY(IC_EVEX_L_XS_B,        4,  "requires EVEX_B and the L and XS prefix")\
187  ENUM_ENTRY(IC_EVEX_L_XD_B,        4,  "requires EVEX_B and the L and XD prefix")\
188  ENUM_ENTRY(IC_EVEX_L_OPSIZE_B,    4,  "requires EVEX_B, L, and OpSize")         \
189  ENUM_ENTRY(IC_EVEX_L_W_B,         3,  "requires EVEX_B, L and W")               \
190  ENUM_ENTRY(IC_EVEX_L_W_XS_B,      4,  "requires EVEX_B, L, W and XS prefix")    \
191  ENUM_ENTRY(IC_EVEX_L_W_XD_B,      4,  "requires EVEX_B, L, W and XD prefix")    \
192  ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_B,  4,  "requires EVEX_B, L, W and OpSize")       \
193  ENUM_ENTRY(IC_EVEX_L2_B,          3,  "requires EVEX_B and the L2 prefix")       \
194  ENUM_ENTRY(IC_EVEX_L2_XS_B,       4,  "requires EVEX_B and the L2 and XS prefix")\
195  ENUM_ENTRY(IC_EVEX_L2_XD_B,       4,  "requires EVEX_B and the L2 and XD prefix")\
196  ENUM_ENTRY(IC_EVEX_L2_OPSIZE_B,   4,  "requires EVEX_B, L2, and OpSize")         \
197  ENUM_ENTRY(IC_EVEX_L2_W_B,        3,  "requires EVEX_B, L2 and W")               \
198  ENUM_ENTRY(IC_EVEX_L2_W_XS_B,     4,  "requires EVEX_B, L2, W and XS prefix")    \
199  ENUM_ENTRY(IC_EVEX_L2_W_XD_B,     4,  "requires EVEX_B, L2, W and XD prefix")    \
200  ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_B, 4,  "requires EVEX_B, L2, W and OpSize")       \
201  ENUM_ENTRY(IC_EVEX_K_B,             1,  "requires EVEX_B and EVEX_K prefix")             \
202  ENUM_ENTRY(IC_EVEX_XS_K_B,          2,  "requires EVEX_B, EVEX_K and the XS prefix")     \
203  ENUM_ENTRY(IC_EVEX_XD_K_B,          2,  "requires EVEX_B, EVEX_K and the XD prefix")     \
204  ENUM_ENTRY(IC_EVEX_OPSIZE_K_B,      2,  "requires EVEX_B, EVEX_K and the OpSize prefix") \
205  ENUM_ENTRY(IC_EVEX_W_K_B,           3,  "requires EVEX_B, EVEX_K and the W prefix")      \
206  ENUM_ENTRY(IC_EVEX_W_XS_K_B,        4,  "requires EVEX_B, EVEX_K, W, and XS prefix")     \
207  ENUM_ENTRY(IC_EVEX_W_XD_K_B,        4,  "requires EVEX_B, EVEX_K, W, and XD prefix")     \
208  ENUM_ENTRY(IC_EVEX_W_OPSIZE_K_B,    4,  "requires EVEX_B, EVEX_K, W, and OpSize")        \
209  ENUM_ENTRY(IC_EVEX_L_K_B,           3,  "requires EVEX_B, EVEX_K and the L prefix")       \
210  ENUM_ENTRY(IC_EVEX_L_XS_K_B,        4,  "requires EVEX_B, EVEX_K and the L and XS prefix")\
211  ENUM_ENTRY(IC_EVEX_L_XD_K_B,        4,  "requires EVEX_B, EVEX_K and the L and XD prefix")\
212  ENUM_ENTRY(IC_EVEX_L_OPSIZE_K_B,    4,  "requires EVEX_B, EVEX_K, L, and OpSize")         \
213  ENUM_ENTRY(IC_EVEX_L_W_K_B,         3,  "requires EVEX_B, EVEX_K, L and W")               \
214  ENUM_ENTRY(IC_EVEX_L_W_XS_K_B,      4,  "requires EVEX_B, EVEX_K, L, W and XS prefix")    \
215  ENUM_ENTRY(IC_EVEX_L_W_XD_K_B,      4,  "requires EVEX_B, EVEX_K, L, W and XD prefix")    \
216  ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K_B,  4,  "requires EVEX_B, EVEX_K, L, W and OpSize")       \
217  ENUM_ENTRY(IC_EVEX_L2_K_B,          3,  "requires EVEX_B, EVEX_K and the L2 prefix")       \
218  ENUM_ENTRY(IC_EVEX_L2_XS_K_B,       4,  "requires EVEX_B, EVEX_K and the L2 and XS prefix")\
219  ENUM_ENTRY(IC_EVEX_L2_XD_K_B,       4,  "requires EVEX_B, EVEX_K and the L2 and XD prefix")\
220  ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K_B,   4,  "requires EVEX_B, EVEX_K, L2, and OpSize")         \
221  ENUM_ENTRY(IC_EVEX_L2_W_K_B,        3,  "requires EVEX_B, EVEX_K, L2 and W")               \
222  ENUM_ENTRY(IC_EVEX_L2_W_XS_K_B,     4,  "requires EVEX_B, EVEX_K, L2, W and XS prefix")    \
223  ENUM_ENTRY(IC_EVEX_L2_W_XD_K_B,     4,  "requires EVEX_B, EVEX_K, L2, W and XD prefix")    \
224  ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K_B, 4,  "requires EVEX_B, EVEX_K, L2, W and OpSize")       \
225  ENUM_ENTRY(IC_EVEX_KZ_B,             1,  "requires EVEX_B and EVEX_KZ prefix")             \
226  ENUM_ENTRY(IC_EVEX_XS_KZ_B,          2,  "requires EVEX_B, EVEX_KZ and the XS prefix")     \
227  ENUM_ENTRY(IC_EVEX_XD_KZ_B,          2,  "requires EVEX_B, EVEX_KZ and the XD prefix")     \
228  ENUM_ENTRY(IC_EVEX_OPSIZE_KZ_B,      2,  "requires EVEX_B, EVEX_KZ and the OpSize prefix") \
229  ENUM_ENTRY(IC_EVEX_W_KZ_B,           3,  "requires EVEX_B, EVEX_KZ and the W prefix")      \
230  ENUM_ENTRY(IC_EVEX_W_XS_KZ_B,        4,  "requires EVEX_B, EVEX_KZ, W, and XS prefix")     \
231  ENUM_ENTRY(IC_EVEX_W_XD_KZ_B,        4,  "requires EVEX_B, EVEX_KZ, W, and XD prefix")     \
232  ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ_B,    4,  "requires EVEX_B, EVEX_KZ, W, and OpSize")        \
233  ENUM_ENTRY(IC_EVEX_L_KZ_B,           3,  "requires EVEX_B, EVEX_KZ and the L prefix")       \
234  ENUM_ENTRY(IC_EVEX_L_XS_KZ_B,        4,  "requires EVEX_B, EVEX_KZ and the L and XS prefix")\
235  ENUM_ENTRY(IC_EVEX_L_XD_KZ_B,        4,  "requires EVEX_B, EVEX_KZ and the L and XD prefix")\
236  ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ_B,    4,  "requires EVEX_B, EVEX_KZ, L, and OpSize")         \
237  ENUM_ENTRY(IC_EVEX_L_W_KZ_B,         3,  "requires EVEX_B, EVEX_KZ, L and W")               \
238  ENUM_ENTRY(IC_EVEX_L_W_XS_KZ_B,      4,  "requires EVEX_B, EVEX_KZ, L, W and XS prefix")    \
239  ENUM_ENTRY(IC_EVEX_L_W_XD_KZ_B,      4,  "requires EVEX_B, EVEX_KZ, L, W and XD prefix")    \
240  ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ_B,  4,  "requires EVEX_B, EVEX_KZ, L, W and OpSize")       \
241  ENUM_ENTRY(IC_EVEX_L2_KZ_B,          3,  "requires EVEX_B, EVEX_KZ and the L2 prefix")       \
242  ENUM_ENTRY(IC_EVEX_L2_XS_KZ_B,       4,  "requires EVEX_B, EVEX_KZ and the L2 and XS prefix")\
243  ENUM_ENTRY(IC_EVEX_L2_XD_KZ_B,       4,  "requires EVEX_B, EVEX_KZ and the L2 and XD prefix")\
244  ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ_B,   4,  "requires EVEX_B, EVEX_KZ, L2, and OpSize")         \
245  ENUM_ENTRY(IC_EVEX_L2_W_KZ_B,        3,  "requires EVEX_B, EVEX_KZ, L2 and W")               \
246  ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ_B,     4,  "requires EVEX_B, EVEX_KZ, L2, W and XS prefix")    \
247  ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ_B,     4,  "requires EVEX_B, EVEX_KZ, L2, W and XD prefix")    \
248  ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ_B, 4,  "requires EVEX_B, EVEX_KZ, L2, W and OpSize")       \
249  ENUM_ENTRY(IC_EVEX_KZ,             1,  "requires an EVEX_KZ prefix")             \
250  ENUM_ENTRY(IC_EVEX_XS_KZ,          2,  "requires EVEX_KZ and the XS prefix")     \
251  ENUM_ENTRY(IC_EVEX_XD_KZ,          2,  "requires EVEX_KZ and the XD prefix")     \
252  ENUM_ENTRY(IC_EVEX_OPSIZE_KZ,      2,  "requires EVEX_KZ and the OpSize prefix") \
253  ENUM_ENTRY(IC_EVEX_W_KZ,           3,  "requires EVEX_KZ and the W prefix")      \
254  ENUM_ENTRY(IC_EVEX_W_XS_KZ,        4,  "requires EVEX_KZ, W, and XS prefix")     \
255  ENUM_ENTRY(IC_EVEX_W_XD_KZ,        4,  "requires EVEX_KZ, W, and XD prefix")     \
256  ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ,    4,  "requires EVEX_KZ, W, and OpSize")        \
257  ENUM_ENTRY(IC_EVEX_L_KZ,           3,  "requires EVEX_KZ and the L prefix")       \
258  ENUM_ENTRY(IC_EVEX_L_XS_KZ,        4,  "requires EVEX_KZ and the L and XS prefix")\
259  ENUM_ENTRY(IC_EVEX_L_XD_KZ,        4,  "requires EVEX_KZ and the L and XD prefix")\
260  ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ,    4,  "requires EVEX_KZ, L, and OpSize")         \
261  ENUM_ENTRY(IC_EVEX_L_W_KZ,         3,  "requires EVEX_KZ, L and W")               \
262  ENUM_ENTRY(IC_EVEX_L_W_XS_KZ,      4,  "requires EVEX_KZ, L, W and XS prefix")    \
263  ENUM_ENTRY(IC_EVEX_L_W_XD_KZ,      4,  "requires EVEX_KZ, L, W and XD prefix")    \
264  ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ,  4,  "requires EVEX_KZ, L, W and OpSize")       \
265  ENUM_ENTRY(IC_EVEX_L2_KZ,          3,  "requires EVEX_KZ and the L2 prefix")       \
266  ENUM_ENTRY(IC_EVEX_L2_XS_KZ,       4,  "requires EVEX_KZ and the L2 and XS prefix")\
267  ENUM_ENTRY(IC_EVEX_L2_XD_KZ,       4,  "requires EVEX_KZ and the L2 and XD prefix")\
268  ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ,   4,  "requires EVEX_KZ, L2, and OpSize")         \
269  ENUM_ENTRY(IC_EVEX_L2_W_KZ,        3,  "requires EVEX_KZ, L2 and W")               \
270  ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ,     4,  "requires EVEX_KZ, L2, W and XS prefix")    \
271  ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ,     4,  "requires EVEX_KZ, L2, W and XD prefix")    \
272  ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ, 4,  "requires EVEX_KZ, L2, W and OpSize")     
273
274#define ENUM_ENTRY(n, r, d) n,
275typedef enum {
276  INSTRUCTION_CONTEXTS
277  IC_max
278} InstructionContext;
279#undef ENUM_ENTRY
280
281/*
282 * Opcode types, which determine which decode table to use, both in the Intel
283 * manual and also for the decoder.
284 */
285typedef enum {
286  ONEBYTE       = 0,
287  TWOBYTE       = 1,
288  THREEBYTE_38  = 2,
289  THREEBYTE_3A  = 3,
290  THREEBYTE_A6  = 4,
291  THREEBYTE_A7  = 5,
292  XOP8_MAP      = 6,
293  XOP9_MAP      = 7,
294  XOPA_MAP      = 8
295} OpcodeType;
296
297/*
298 * The following structs are used for the hierarchical decode table.  After
299 * determining the instruction's class (i.e., which IC_* constant applies to
300 * it), the decoder reads the opcode.  Some instructions require specific
301 * values of the ModR/M byte, so the ModR/M byte indexes into the final table.
302 *
303 * If a ModR/M byte is not required, "required" is left unset, and the values
304 * for each instructionID are identical.
305 */
306
307typedef uint16_t InstrUID;
308
309/*
310 * ModRMDecisionType - describes the type of ModR/M decision, allowing the
311 * consumer to determine the number of entries in it.
312 *
313 * MODRM_ONEENTRY - No matter what the value of the ModR/M byte is, the decoded
314 *                  instruction is the same.
315 * MODRM_SPLITRM  - If the ModR/M byte is between 0x00 and 0xbf, the opcode
316 *                  corresponds to one instruction; otherwise, it corresponds to
317 *                  a different instruction.
318 * MODRM_SPLITMISC- If the ModR/M byte is between 0x00 and 0xbf, ModR/M byte
319 *                  divided by 8 is used to select instruction; otherwise, each
320 *                  value of the ModR/M byte could correspond to a different
321 *                  instruction.
322 * MODRM_SPLITREG - ModR/M byte divided by 8 is used to select instruction. This
323                    corresponds to instructions that use reg field as opcode
324 * MODRM_FULL     - Potentially, each value of the ModR/M byte could correspond
325 *                  to a different instruction.
326 */
327
328#define MODRMTYPES            \
329  ENUM_ENTRY(MODRM_ONEENTRY)  \
330  ENUM_ENTRY(MODRM_SPLITRM)   \
331  ENUM_ENTRY(MODRM_SPLITMISC)  \
332  ENUM_ENTRY(MODRM_SPLITREG)  \
333  ENUM_ENTRY(MODRM_FULL)
334
335#define ENUM_ENTRY(n) n,
336typedef enum {
337  MODRMTYPES
338  MODRM_max
339} ModRMDecisionType;
340#undef ENUM_ENTRY
341
342/*
343 * ModRMDecision - Specifies whether a ModR/M byte is needed and (if so) which
344 *  instruction each possible value of the ModR/M byte corresponds to.  Once
345 *  this information is known, we have narrowed down to a single instruction.
346 */
347struct ModRMDecision {
348  uint8_t     modrm_type;
349
350  /* The macro below must be defined wherever this file is included. */
351  INSTRUCTION_IDS
352};
353
354/*
355 * OpcodeDecision - Specifies which set of ModR/M->instruction tables to look at
356 *   given a particular opcode.
357 */
358struct OpcodeDecision {
359  struct ModRMDecision modRMDecisions[256];
360};
361
362/*
363 * ContextDecision - Specifies which opcode->instruction tables to look at given
364 *   a particular context (set of attributes).  Since there are many possible
365 *   contexts, the decoder first uses CONTEXTS_SYM to determine which context
366 *   applies given a specific set of attributes.  Hence there are only IC_max
367 *   entries in this table, rather than 2^(ATTR_max).
368 */
369struct ContextDecision {
370  struct OpcodeDecision opcodeDecisions[IC_max];
371};
372
373/*
374 * Physical encodings of instruction operands.
375 */
376
377#define ENCODINGS                                                              \
378  ENUM_ENTRY(ENCODING_NONE,   "")                                              \
379  ENUM_ENTRY(ENCODING_REG,    "Register operand in ModR/M byte.")              \
380  ENUM_ENTRY(ENCODING_RM,     "R/M operand in ModR/M byte.")                   \
381  ENUM_ENTRY(ENCODING_VVVV,   "Register operand in VEX.vvvv byte.")            \
382  ENUM_ENTRY(ENCODING_WRITEMASK, "Register operand in EVEX.aaa byte.")         \
383  ENUM_ENTRY(ENCODING_CB,     "1-byte code offset (possible new CS value)")    \
384  ENUM_ENTRY(ENCODING_CW,     "2-byte")                                        \
385  ENUM_ENTRY(ENCODING_CD,     "4-byte")                                        \
386  ENUM_ENTRY(ENCODING_CP,     "6-byte")                                        \
387  ENUM_ENTRY(ENCODING_CO,     "8-byte")                                        \
388  ENUM_ENTRY(ENCODING_CT,     "10-byte")                                       \
389  ENUM_ENTRY(ENCODING_IB,     "1-byte immediate")                              \
390  ENUM_ENTRY(ENCODING_IW,     "2-byte")                                        \
391  ENUM_ENTRY(ENCODING_ID,     "4-byte")                                        \
392  ENUM_ENTRY(ENCODING_IO,     "8-byte")                                        \
393  ENUM_ENTRY(ENCODING_RB,     "(AL..DIL, R8L..R15L) Register code added to "   \
394                              "the opcode byte")                               \
395  ENUM_ENTRY(ENCODING_RW,     "(AX..DI, R8W..R15W)")                           \
396  ENUM_ENTRY(ENCODING_RD,     "(EAX..EDI, R8D..R15D)")                         \
397  ENUM_ENTRY(ENCODING_RO,     "(RAX..RDI, R8..R15)")                           \
398  ENUM_ENTRY(ENCODING_I,      "Position on floating-point stack added to the " \
399                              "opcode byte")                                   \
400                                                                               \
401  ENUM_ENTRY(ENCODING_Iv,     "Immediate of operand size")                     \
402  ENUM_ENTRY(ENCODING_Ia,     "Immediate of address size")                     \
403  ENUM_ENTRY(ENCODING_Rv,     "Register code of operand size added to the "    \
404                              "opcode byte")                                   \
405  ENUM_ENTRY(ENCODING_DUP,    "Duplicate of another operand; ID is encoded "   \
406                              "in type")
407
408#define ENUM_ENTRY(n, d) n,
409  typedef enum {
410    ENCODINGS
411    ENCODING_max
412  } OperandEncoding;
413#undef ENUM_ENTRY
414
415/*
416 * Semantic interpretations of instruction operands.
417 */
418
419#define TYPES                                                                  \
420  ENUM_ENTRY(TYPE_NONE,       "")                                              \
421  ENUM_ENTRY(TYPE_REL8,       "1-byte immediate address")                      \
422  ENUM_ENTRY(TYPE_REL16,      "2-byte")                                        \
423  ENUM_ENTRY(TYPE_REL32,      "4-byte")                                        \
424  ENUM_ENTRY(TYPE_REL64,      "8-byte")                                        \
425  ENUM_ENTRY(TYPE_PTR1616,    "2+2-byte segment+offset address")               \
426  ENUM_ENTRY(TYPE_PTR1632,    "2+4-byte")                                      \
427  ENUM_ENTRY(TYPE_PTR1664,    "2+8-byte")                                      \
428  ENUM_ENTRY(TYPE_R8,         "1-byte register operand")                       \
429  ENUM_ENTRY(TYPE_R16,        "2-byte")                                        \
430  ENUM_ENTRY(TYPE_R32,        "4-byte")                                        \
431  ENUM_ENTRY(TYPE_R64,        "8-byte")                                        \
432  ENUM_ENTRY(TYPE_IMM8,       "1-byte immediate operand")                      \
433  ENUM_ENTRY(TYPE_IMM16,      "2-byte")                                        \
434  ENUM_ENTRY(TYPE_IMM32,      "4-byte")                                        \
435  ENUM_ENTRY(TYPE_IMM64,      "8-byte")                                        \
436  ENUM_ENTRY(TYPE_IMM3,       "1-byte immediate operand between 0 and 7")      \
437  ENUM_ENTRY(TYPE_IMM5,       "1-byte immediate operand between 0 and 31")     \
438  ENUM_ENTRY(TYPE_RM8,        "1-byte register or memory operand")             \
439  ENUM_ENTRY(TYPE_RM16,       "2-byte")                                        \
440  ENUM_ENTRY(TYPE_RM32,       "4-byte")                                        \
441  ENUM_ENTRY(TYPE_RM64,       "8-byte")                                        \
442  ENUM_ENTRY(TYPE_M,          "Memory operand")                                \
443  ENUM_ENTRY(TYPE_M8,         "1-byte")                                        \
444  ENUM_ENTRY(TYPE_M16,        "2-byte")                                        \
445  ENUM_ENTRY(TYPE_M32,        "4-byte")                                        \
446  ENUM_ENTRY(TYPE_M64,        "8-byte")                                        \
447  ENUM_ENTRY(TYPE_LEA,        "Effective address")                             \
448  ENUM_ENTRY(TYPE_M128,       "16-byte (SSE/SSE2)")                            \
449  ENUM_ENTRY(TYPE_M256,       "256-byte (AVX)")                                \
450  ENUM_ENTRY(TYPE_M1616,      "2+2-byte segment+offset address")               \
451  ENUM_ENTRY(TYPE_M1632,      "2+4-byte")                                      \
452  ENUM_ENTRY(TYPE_M1664,      "2+8-byte")                                      \
453  ENUM_ENTRY(TYPE_M16_32,     "2+4-byte two-part memory operand (LIDT, LGDT)") \
454  ENUM_ENTRY(TYPE_M16_16,     "2+2-byte (BOUND)")                              \
455  ENUM_ENTRY(TYPE_M32_32,     "4+4-byte (BOUND)")                              \
456  ENUM_ENTRY(TYPE_M16_64,     "2+8-byte (LIDT, LGDT)")                         \
457  ENUM_ENTRY(TYPE_MOFFS8,     "1-byte memory offset (relative to segment "     \
458                              "base)")                                         \
459  ENUM_ENTRY(TYPE_MOFFS16,    "2-byte")                                        \
460  ENUM_ENTRY(TYPE_MOFFS32,    "4-byte")                                        \
461  ENUM_ENTRY(TYPE_MOFFS64,    "8-byte")                                        \
462  ENUM_ENTRY(TYPE_SREG,       "Byte with single bit set: 0 = ES, 1 = CS, "     \
463                              "2 = SS, 3 = DS, 4 = FS, 5 = GS")                \
464  ENUM_ENTRY(TYPE_M32FP,      "32-bit IEE754 memory floating-point operand")   \
465  ENUM_ENTRY(TYPE_M64FP,      "64-bit")                                        \
466  ENUM_ENTRY(TYPE_M80FP,      "80-bit extended")                               \
467  ENUM_ENTRY(TYPE_M16INT,     "2-byte memory integer operand for use in "      \
468                              "floating-point instructions")                   \
469  ENUM_ENTRY(TYPE_M32INT,     "4-byte")                                        \
470  ENUM_ENTRY(TYPE_M64INT,     "8-byte")                                        \
471  ENUM_ENTRY(TYPE_ST,         "Position on the floating-point stack")          \
472  ENUM_ENTRY(TYPE_MM,         "MMX register operand")                          \
473  ENUM_ENTRY(TYPE_MM32,       "4-byte MMX register or memory operand")         \
474  ENUM_ENTRY(TYPE_MM64,       "8-byte")                                        \
475  ENUM_ENTRY(TYPE_XMM,        "XMM register operand")                          \
476  ENUM_ENTRY(TYPE_XMM32,      "4-byte XMM register or memory operand")         \
477  ENUM_ENTRY(TYPE_XMM64,      "8-byte")                                        \
478  ENUM_ENTRY(TYPE_XMM128,     "16-byte")                                       \
479  ENUM_ENTRY(TYPE_XMM256,     "32-byte")                                       \
480  ENUM_ENTRY(TYPE_XMM512,     "64-byte")                                       \
481  ENUM_ENTRY(TYPE_VK8,        "8-bit")                                         \
482  ENUM_ENTRY(TYPE_VK16,       "16-bit")                                        \
483  ENUM_ENTRY(TYPE_XMM0,       "Implicit use of XMM0")                          \
484  ENUM_ENTRY(TYPE_SEGMENTREG, "Segment register operand")                      \
485  ENUM_ENTRY(TYPE_DEBUGREG,   "Debug register operand")                        \
486  ENUM_ENTRY(TYPE_CONTROLREG, "Control register operand")                      \
487                                                                               \
488  ENUM_ENTRY(TYPE_Mv,         "Memory operand of operand size")                \
489  ENUM_ENTRY(TYPE_Rv,         "Register operand of operand size")              \
490  ENUM_ENTRY(TYPE_IMMv,       "Immediate operand of operand size")             \
491  ENUM_ENTRY(TYPE_RELv,       "Immediate address of operand size")             \
492  ENUM_ENTRY(TYPE_DUP0,       "Duplicate of operand 0")                        \
493  ENUM_ENTRY(TYPE_DUP1,       "operand 1")                                     \
494  ENUM_ENTRY(TYPE_DUP2,       "operand 2")                                     \
495  ENUM_ENTRY(TYPE_DUP3,       "operand 3")                                     \
496  ENUM_ENTRY(TYPE_DUP4,       "operand 4")                                     \
497  ENUM_ENTRY(TYPE_M512,       "512-bit FPU/MMX/XMM/MXCSR state")
498
499#define ENUM_ENTRY(n, d) n,
500typedef enum {
501  TYPES
502  TYPE_max
503} OperandType;
504#undef ENUM_ENTRY
505
506/*
507 * OperandSpecifier - The specification for how to extract and interpret one
508 *   operand.
509 */
510struct OperandSpecifier {
511  uint8_t encoding;
512  uint8_t type;
513};
514
515/*
516 * Indicates where the opcode modifier (if any) is to be found.  Extended
517 * opcodes with AddRegFrm have the opcode modifier in the ModR/M byte.
518 */
519
520#define MODIFIER_TYPES        \
521  ENUM_ENTRY(MODIFIER_NONE)   \
522  ENUM_ENTRY(MODIFIER_OPCODE) \
523  ENUM_ENTRY(MODIFIER_MODRM)
524
525#define ENUM_ENTRY(n) n,
526typedef enum {
527  MODIFIER_TYPES
528  MODIFIER_max
529} ModifierType;
530#undef ENUM_ENTRY
531
532#define X86_MAX_OPERANDS 5
533
534/*
535 * The specification for how to extract and interpret a full instruction and
536 * its operands.
537 */
538struct InstructionSpecifier {
539  uint8_t modifierType;
540  uint8_t modifierBase;
541
542  /* The macro below must be defined wherever this file is included. */
543  INSTRUCTION_SPECIFIER_FIELDS
544};
545
546/*
547 * Decoding mode for the Intel disassembler.  16-bit, 32-bit, and 64-bit mode
548 * are supported, and represent real mode, IA-32e, and IA-32e in 64-bit mode,
549 * respectively.
550 */
551typedef enum {
552  MODE_16BIT,
553  MODE_32BIT,
554  MODE_64BIT
555} DisassemblerMode;
556
557#endif