/3rd_party/llvm/lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h

https://code.google.com/p/softart/ · C Header · 557 lines · 420 code · 35 blank · 102 comment · 0 complexity · 0a78a5ff080efd97c16425eed47e8333 MD5 · raw file

  1. /*===-- X86DisassemblerDecoderCommon.h - Disassembler decoder -----*- C -*-===*
  2. *
  3. * The LLVM Compiler Infrastructure
  4. *
  5. * This file is distributed under the University of Illinois Open Source
  6. * License. See LICENSE.TXT for details.
  7. *
  8. *===----------------------------------------------------------------------===*
  9. *
  10. * This file is part of the X86 Disassembler.
  11. * It contains common definitions used by both the disassembler and the table
  12. * generator.
  13. * Documentation for the disassembler can be found in X86Disassembler.h.
  14. *
  15. *===----------------------------------------------------------------------===*/
  16. /*
  17. * This header file provides those definitions that need to be shared between
  18. * the decoder and the table generator in a C-friendly manner.
  19. */
  20. #ifndef X86DISASSEMBLERDECODERCOMMON_H
  21. #define X86DISASSEMBLERDECODERCOMMON_H
  22. #include "llvm/Support/DataTypes.h"
  23. #define INSTRUCTIONS_SYM x86DisassemblerInstrSpecifiers
  24. #define CONTEXTS_SYM x86DisassemblerContexts
  25. #define ONEBYTE_SYM x86DisassemblerOneByteOpcodes
  26. #define TWOBYTE_SYM x86DisassemblerTwoByteOpcodes
  27. #define THREEBYTE38_SYM x86DisassemblerThreeByte38Opcodes
  28. #define THREEBYTE3A_SYM x86DisassemblerThreeByte3AOpcodes
  29. #define THREEBYTEA6_SYM x86DisassemblerThreeByteA6Opcodes
  30. #define THREEBYTEA7_SYM x86DisassemblerThreeByteA7Opcodes
  31. #define XOP8_MAP_SYM x86DisassemblerXOP8Opcodes
  32. #define XOP9_MAP_SYM x86DisassemblerXOP9Opcodes
  33. #define XOPA_MAP_SYM x86DisassemblerXOPAOpcodes
  34. #define INSTRUCTIONS_STR "x86DisassemblerInstrSpecifiers"
  35. #define CONTEXTS_STR "x86DisassemblerContexts"
  36. #define ONEBYTE_STR "x86DisassemblerOneByteOpcodes"
  37. #define TWOBYTE_STR "x86DisassemblerTwoByteOpcodes"
  38. #define THREEBYTE38_STR "x86DisassemblerThreeByte38Opcodes"
  39. #define THREEBYTE3A_STR "x86DisassemblerThreeByte3AOpcodes"
  40. #define THREEBYTEA6_STR "x86DisassemblerThreeByteA6Opcodes"
  41. #define THREEBYTEA7_STR "x86DisassemblerThreeByteA7Opcodes"
  42. #define XOP8_MAP_STR "x86DisassemblerXOP8Opcodes"
  43. #define XOP9_MAP_STR "x86DisassemblerXOP9Opcodes"
  44. #define XOPA_MAP_STR "x86DisassemblerXOPAOpcodes"
  45. /*
  46. * Attributes of an instruction that must be known before the opcode can be
  47. * processed correctly. Most of these indicate the presence of particular
  48. * prefixes, but ATTR_64BIT is simply an attribute of the decoding context.
  49. */
  50. #define ATTRIBUTE_BITS \
  51. ENUM_ENTRY(ATTR_NONE, 0x00) \
  52. ENUM_ENTRY(ATTR_64BIT, 0x01) \
  53. ENUM_ENTRY(ATTR_XS, 0x02) \
  54. ENUM_ENTRY(ATTR_XD, 0x04) \
  55. ENUM_ENTRY(ATTR_REXW, 0x08) \
  56. ENUM_ENTRY(ATTR_OPSIZE, 0x10) \
  57. ENUM_ENTRY(ATTR_ADSIZE, 0x20) \
  58. ENUM_ENTRY(ATTR_VEX, 0x40) \
  59. ENUM_ENTRY(ATTR_VEXL, 0x80)
  60. #define ENUM_ENTRY(n, v) n = v,
  61. enum attributeBits {
  62. ATTRIBUTE_BITS
  63. ATTR_max
  64. };
  65. #undef ENUM_ENTRY
  66. /*
  67. * Combinations of the above attributes that are relevant to instruction
  68. * decode. Although other combinations are possible, they can be reduced to
  69. * these without affecting the ultimately decoded instruction.
  70. */
  71. /* Class name Rank Rationale for rank assignment */
  72. #define INSTRUCTION_CONTEXTS \
  73. ENUM_ENTRY(IC, 0, "says nothing about the instruction") \
  74. ENUM_ENTRY(IC_64BIT, 1, "says the instruction applies in " \
  75. "64-bit mode but no more") \
  76. ENUM_ENTRY(IC_OPSIZE, 3, "requires an OPSIZE prefix, so " \
  77. "operands change width") \
  78. ENUM_ENTRY(IC_ADSIZE, 3, "requires an ADSIZE prefix, so " \
  79. "operands change width") \
  80. ENUM_ENTRY(IC_XD, 2, "may say something about the opcode " \
  81. "but not the operands") \
  82. ENUM_ENTRY(IC_XS, 2, "may say something about the opcode " \
  83. "but not the operands") \
  84. ENUM_ENTRY(IC_XD_OPSIZE, 3, "requires an OPSIZE prefix, so " \
  85. "operands change width") \
  86. ENUM_ENTRY(IC_XS_OPSIZE, 3, "requires an OPSIZE prefix, so " \
  87. "operands change width") \
  88. ENUM_ENTRY(IC_64BIT_REXW, 4, "requires a REX.W prefix, so operands "\
  89. "change width; overrides IC_OPSIZE") \
  90. ENUM_ENTRY(IC_64BIT_OPSIZE, 3, "Just as meaningful as IC_OPSIZE") \
  91. ENUM_ENTRY(IC_64BIT_ADSIZE, 3, "Just as meaningful as IC_ADSIZE") \
  92. ENUM_ENTRY(IC_64BIT_XD, 5, "XD instructions are SSE; REX.W is " \
  93. "secondary") \
  94. ENUM_ENTRY(IC_64BIT_XS, 5, "Just as meaningful as IC_64BIT_XD") \
  95. ENUM_ENTRY(IC_64BIT_XD_OPSIZE, 3, "Just as meaningful as IC_XD_OPSIZE") \
  96. ENUM_ENTRY(IC_64BIT_XS_OPSIZE, 3, "Just as meaningful as IC_XS_OPSIZE") \
  97. ENUM_ENTRY(IC_64BIT_REXW_XS, 6, "OPSIZE could mean a different " \
  98. "opcode") \
  99. ENUM_ENTRY(IC_64BIT_REXW_XD, 6, "Just as meaningful as " \
  100. "IC_64BIT_REXW_XS") \
  101. ENUM_ENTRY(IC_64BIT_REXW_OPSIZE, 7, "The Dynamic Duo! Prefer over all " \
  102. "else because this changes most " \
  103. "operands' meaning") \
  104. ENUM_ENTRY(IC_VEX, 1, "requires a VEX prefix") \
  105. ENUM_ENTRY(IC_VEX_XS, 2, "requires VEX and the XS prefix") \
  106. ENUM_ENTRY(IC_VEX_XD, 2, "requires VEX and the XD prefix") \
  107. ENUM_ENTRY(IC_VEX_OPSIZE, 2, "requires VEX and the OpSize prefix") \
  108. ENUM_ENTRY(IC_VEX_W, 3, "requires VEX and the W prefix") \
  109. ENUM_ENTRY(IC_VEX_W_XS, 4, "requires VEX, W, and XS prefix") \
  110. ENUM_ENTRY(IC_VEX_W_XD, 4, "requires VEX, W, and XD prefix") \
  111. ENUM_ENTRY(IC_VEX_W_OPSIZE, 4, "requires VEX, W, and OpSize") \
  112. ENUM_ENTRY(IC_VEX_L, 3, "requires VEX and the L prefix") \
  113. ENUM_ENTRY(IC_VEX_L_XS, 4, "requires VEX and the L and XS prefix")\
  114. ENUM_ENTRY(IC_VEX_L_XD, 4, "requires VEX and the L and XD prefix")\
  115. ENUM_ENTRY(IC_VEX_L_OPSIZE, 4, "requires VEX, L, and OpSize") \
  116. ENUM_ENTRY(IC_VEX_L_W, 4, "requires VEX, L and W") \
  117. ENUM_ENTRY(IC_VEX_L_W_XS, 5, "requires VEX, L, W and XS prefix") \
  118. ENUM_ENTRY(IC_VEX_L_W_XD, 5, "requires VEX, L, W and XD prefix") \
  119. ENUM_ENTRY(IC_VEX_L_W_OPSIZE, 5, "requires VEX, L, W and OpSize") \
  120. ENUM_ENTRY(IC_EVEX, 1, "requires an EVEX prefix") \
  121. ENUM_ENTRY(IC_EVEX_XS, 2, "requires EVEX and the XS prefix") \
  122. ENUM_ENTRY(IC_EVEX_XD, 2, "requires EVEX and the XD prefix") \
  123. ENUM_ENTRY(IC_EVEX_OPSIZE, 2, "requires EVEX and the OpSize prefix") \
  124. ENUM_ENTRY(IC_EVEX_W, 3, "requires EVEX and the W prefix") \
  125. ENUM_ENTRY(IC_EVEX_W_XS, 4, "requires EVEX, W, and XS prefix") \
  126. ENUM_ENTRY(IC_EVEX_W_XD, 4, "requires EVEX, W, and XD prefix") \
  127. ENUM_ENTRY(IC_EVEX_W_OPSIZE, 4, "requires EVEX, W, and OpSize") \
  128. ENUM_ENTRY(IC_EVEX_L, 3, "requires EVEX and the L prefix") \
  129. ENUM_ENTRY(IC_EVEX_L_XS, 4, "requires EVEX and the L and XS prefix")\
  130. ENUM_ENTRY(IC_EVEX_L_XD, 4, "requires EVEX and the L and XD prefix")\
  131. ENUM_ENTRY(IC_EVEX_L_OPSIZE, 4, "requires EVEX, L, and OpSize") \
  132. ENUM_ENTRY(IC_EVEX_L_W, 3, "requires EVEX, L and W") \
  133. ENUM_ENTRY(IC_EVEX_L_W_XS, 4, "requires EVEX, L, W and XS prefix") \
  134. ENUM_ENTRY(IC_EVEX_L_W_XD, 4, "requires EVEX, L, W and XD prefix") \
  135. ENUM_ENTRY(IC_EVEX_L_W_OPSIZE, 4, "requires EVEX, L, W and OpSize") \
  136. ENUM_ENTRY(IC_EVEX_L2, 3, "requires EVEX and the L2 prefix") \
  137. ENUM_ENTRY(IC_EVEX_L2_XS, 4, "requires EVEX and the L2 and XS prefix")\
  138. ENUM_ENTRY(IC_EVEX_L2_XD, 4, "requires EVEX and the L2 and XD prefix")\
  139. ENUM_ENTRY(IC_EVEX_L2_OPSIZE, 4, "requires EVEX, L2, and OpSize") \
  140. ENUM_ENTRY(IC_EVEX_L2_W, 3, "requires EVEX, L2 and W") \
  141. ENUM_ENTRY(IC_EVEX_L2_W_XS, 4, "requires EVEX, L2, W and XS prefix") \
  142. ENUM_ENTRY(IC_EVEX_L2_W_XD, 4, "requires EVEX, L2, W and XD prefix") \
  143. ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE, 4, "requires EVEX, L2, W and OpSize") \
  144. ENUM_ENTRY(IC_EVEX_K, 1, "requires an EVEX_K prefix") \
  145. ENUM_ENTRY(IC_EVEX_XS_K, 2, "requires EVEX_K and the XS prefix") \
  146. ENUM_ENTRY(IC_EVEX_XD_K, 2, "requires EVEX_K and the XD prefix") \
  147. ENUM_ENTRY(IC_EVEX_OPSIZE_K, 2, "requires EVEX_K and the OpSize prefix") \
  148. ENUM_ENTRY(IC_EVEX_W_K, 3, "requires EVEX_K and the W prefix") \
  149. ENUM_ENTRY(IC_EVEX_W_XS_K, 4, "requires EVEX_K, W, and XS prefix") \
  150. ENUM_ENTRY(IC_EVEX_W_XD_K, 4, "requires EVEX_K, W, and XD prefix") \
  151. ENUM_ENTRY(IC_EVEX_W_OPSIZE_K, 4, "requires EVEX_K, W, and OpSize") \
  152. ENUM_ENTRY(IC_EVEX_L_K, 3, "requires EVEX_K and the L prefix") \
  153. ENUM_ENTRY(IC_EVEX_L_XS_K, 4, "requires EVEX_K and the L and XS prefix")\
  154. ENUM_ENTRY(IC_EVEX_L_XD_K, 4, "requires EVEX_K and the L and XD prefix")\
  155. ENUM_ENTRY(IC_EVEX_L_OPSIZE_K, 4, "requires EVEX_K, L, and OpSize") \
  156. ENUM_ENTRY(IC_EVEX_L_W_K, 3, "requires EVEX_K, L and W") \
  157. ENUM_ENTRY(IC_EVEX_L_W_XS_K, 4, "requires EVEX_K, L, W and XS prefix") \
  158. ENUM_ENTRY(IC_EVEX_L_W_XD_K, 4, "requires EVEX_K, L, W and XD prefix") \
  159. ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K, 4, "requires EVEX_K, L, W and OpSize") \
  160. ENUM_ENTRY(IC_EVEX_L2_K, 3, "requires EVEX_K and the L2 prefix") \
  161. ENUM_ENTRY(IC_EVEX_L2_XS_K, 4, "requires EVEX_K and the L2 and XS prefix")\
  162. ENUM_ENTRY(IC_EVEX_L2_XD_K, 4, "requires EVEX_K and the L2 and XD prefix")\
  163. ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K, 4, "requires EVEX_K, L2, and OpSize") \
  164. ENUM_ENTRY(IC_EVEX_L2_W_K, 3, "requires EVEX_K, L2 and W") \
  165. ENUM_ENTRY(IC_EVEX_L2_W_XS_K, 4, "requires EVEX_K, L2, W and XS prefix") \
  166. ENUM_ENTRY(IC_EVEX_L2_W_XD_K, 4, "requires EVEX_K, L2, W and XD prefix") \
  167. ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K, 4, "requires EVEX_K, L2, W and OpSize") \
  168. ENUM_ENTRY(IC_EVEX_B, 1, "requires an EVEX_B prefix") \
  169. ENUM_ENTRY(IC_EVEX_XS_B, 2, "requires EVEX_B and the XS prefix") \
  170. ENUM_ENTRY(IC_EVEX_XD_B, 2, "requires EVEX_B and the XD prefix") \
  171. ENUM_ENTRY(IC_EVEX_OPSIZE_B, 2, "requires EVEX_B and the OpSize prefix") \
  172. ENUM_ENTRY(IC_EVEX_W_B, 3, "requires EVEX_B and the W prefix") \
  173. ENUM_ENTRY(IC_EVEX_W_XS_B, 4, "requires EVEX_B, W, and XS prefix") \
  174. ENUM_ENTRY(IC_EVEX_W_XD_B, 4, "requires EVEX_B, W, and XD prefix") \
  175. ENUM_ENTRY(IC_EVEX_W_OPSIZE_B, 4, "requires EVEX_B, W, and OpSize") \
  176. ENUM_ENTRY(IC_EVEX_L_B, 3, "requires EVEX_B and the L prefix") \
  177. ENUM_ENTRY(IC_EVEX_L_XS_B, 4, "requires EVEX_B and the L and XS prefix")\
  178. ENUM_ENTRY(IC_EVEX_L_XD_B, 4, "requires EVEX_B and the L and XD prefix")\
  179. ENUM_ENTRY(IC_EVEX_L_OPSIZE_B, 4, "requires EVEX_B, L, and OpSize") \
  180. ENUM_ENTRY(IC_EVEX_L_W_B, 3, "requires EVEX_B, L and W") \
  181. ENUM_ENTRY(IC_EVEX_L_W_XS_B, 4, "requires EVEX_B, L, W and XS prefix") \
  182. ENUM_ENTRY(IC_EVEX_L_W_XD_B, 4, "requires EVEX_B, L, W and XD prefix") \
  183. ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_B, 4, "requires EVEX_B, L, W and OpSize") \
  184. ENUM_ENTRY(IC_EVEX_L2_B, 3, "requires EVEX_B and the L2 prefix") \
  185. ENUM_ENTRY(IC_EVEX_L2_XS_B, 4, "requires EVEX_B and the L2 and XS prefix")\
  186. ENUM_ENTRY(IC_EVEX_L2_XD_B, 4, "requires EVEX_B and the L2 and XD prefix")\
  187. ENUM_ENTRY(IC_EVEX_L2_OPSIZE_B, 4, "requires EVEX_B, L2, and OpSize") \
  188. ENUM_ENTRY(IC_EVEX_L2_W_B, 3, "requires EVEX_B, L2 and W") \
  189. ENUM_ENTRY(IC_EVEX_L2_W_XS_B, 4, "requires EVEX_B, L2, W and XS prefix") \
  190. ENUM_ENTRY(IC_EVEX_L2_W_XD_B, 4, "requires EVEX_B, L2, W and XD prefix") \
  191. ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_B, 4, "requires EVEX_B, L2, W and OpSize") \
  192. ENUM_ENTRY(IC_EVEX_K_B, 1, "requires EVEX_B and EVEX_K prefix") \
  193. ENUM_ENTRY(IC_EVEX_XS_K_B, 2, "requires EVEX_B, EVEX_K and the XS prefix") \
  194. ENUM_ENTRY(IC_EVEX_XD_K_B, 2, "requires EVEX_B, EVEX_K and the XD prefix") \
  195. ENUM_ENTRY(IC_EVEX_OPSIZE_K_B, 2, "requires EVEX_B, EVEX_K and the OpSize prefix") \
  196. ENUM_ENTRY(IC_EVEX_W_K_B, 3, "requires EVEX_B, EVEX_K and the W prefix") \
  197. ENUM_ENTRY(IC_EVEX_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, W, and XS prefix") \
  198. ENUM_ENTRY(IC_EVEX_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, W, and XD prefix") \
  199. ENUM_ENTRY(IC_EVEX_W_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, W, and OpSize") \
  200. ENUM_ENTRY(IC_EVEX_L_K_B, 3, "requires EVEX_B, EVEX_K and the L prefix") \
  201. ENUM_ENTRY(IC_EVEX_L_XS_K_B, 4, "requires EVEX_B, EVEX_K and the L and XS prefix")\
  202. ENUM_ENTRY(IC_EVEX_L_XD_K_B, 4, "requires EVEX_B, EVEX_K and the L and XD prefix")\
  203. ENUM_ENTRY(IC_EVEX_L_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, L, and OpSize") \
  204. ENUM_ENTRY(IC_EVEX_L_W_K_B, 3, "requires EVEX_B, EVEX_K, L and W") \
  205. ENUM_ENTRY(IC_EVEX_L_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, L, W and XS prefix") \
  206. ENUM_ENTRY(IC_EVEX_L_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, L, W and XD prefix") \
  207. ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, L, W and OpSize") \
  208. ENUM_ENTRY(IC_EVEX_L2_K_B, 3, "requires EVEX_B, EVEX_K and the L2 prefix") \
  209. ENUM_ENTRY(IC_EVEX_L2_XS_K_B, 4, "requires EVEX_B, EVEX_K and the L2 and XS prefix")\
  210. ENUM_ENTRY(IC_EVEX_L2_XD_K_B, 4, "requires EVEX_B, EVEX_K and the L2 and XD prefix")\
  211. ENUM_ENTRY(IC_EVEX_L2_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, L2, and OpSize") \
  212. ENUM_ENTRY(IC_EVEX_L2_W_K_B, 3, "requires EVEX_B, EVEX_K, L2 and W") \
  213. ENUM_ENTRY(IC_EVEX_L2_W_XS_K_B, 4, "requires EVEX_B, EVEX_K, L2, W and XS prefix") \
  214. ENUM_ENTRY(IC_EVEX_L2_W_XD_K_B, 4, "requires EVEX_B, EVEX_K, L2, W and XD prefix") \
  215. ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_K_B, 4, "requires EVEX_B, EVEX_K, L2, W and OpSize") \
  216. ENUM_ENTRY(IC_EVEX_KZ_B, 1, "requires EVEX_B and EVEX_KZ prefix") \
  217. ENUM_ENTRY(IC_EVEX_XS_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the XS prefix") \
  218. ENUM_ENTRY(IC_EVEX_XD_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the XD prefix") \
  219. ENUM_ENTRY(IC_EVEX_OPSIZE_KZ_B, 2, "requires EVEX_B, EVEX_KZ and the OpSize prefix") \
  220. ENUM_ENTRY(IC_EVEX_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the W prefix") \
  221. ENUM_ENTRY(IC_EVEX_W_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ, W, and XS prefix") \
  222. ENUM_ENTRY(IC_EVEX_W_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ, W, and XD prefix") \
  223. ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, W, and OpSize") \
  224. ENUM_ENTRY(IC_EVEX_L_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the L prefix") \
  225. ENUM_ENTRY(IC_EVEX_L_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L and XS prefix")\
  226. ENUM_ENTRY(IC_EVEX_L_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L and XD prefix")\
  227. ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, and OpSize") \
  228. ENUM_ENTRY(IC_EVEX_L_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ, L and W") \
  229. ENUM_ENTRY(IC_EVEX_L_W_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, W and XS prefix") \
  230. ENUM_ENTRY(IC_EVEX_L_W_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, W and XD prefix") \
  231. ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L, W and OpSize") \
  232. ENUM_ENTRY(IC_EVEX_L2_KZ_B, 3, "requires EVEX_B, EVEX_KZ and the L2 prefix") \
  233. ENUM_ENTRY(IC_EVEX_L2_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L2 and XS prefix")\
  234. ENUM_ENTRY(IC_EVEX_L2_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ and the L2 and XD prefix")\
  235. ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, and OpSize") \
  236. ENUM_ENTRY(IC_EVEX_L2_W_KZ_B, 3, "requires EVEX_B, EVEX_KZ, L2 and W") \
  237. ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, W and XS prefix") \
  238. ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, W and XD prefix") \
  239. ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ_B, 4, "requires EVEX_B, EVEX_KZ, L2, W and OpSize") \
  240. ENUM_ENTRY(IC_EVEX_KZ, 1, "requires an EVEX_KZ prefix") \
  241. ENUM_ENTRY(IC_EVEX_XS_KZ, 2, "requires EVEX_KZ and the XS prefix") \
  242. ENUM_ENTRY(IC_EVEX_XD_KZ, 2, "requires EVEX_KZ and the XD prefix") \
  243. ENUM_ENTRY(IC_EVEX_OPSIZE_KZ, 2, "requires EVEX_KZ and the OpSize prefix") \
  244. ENUM_ENTRY(IC_EVEX_W_KZ, 3, "requires EVEX_KZ and the W prefix") \
  245. ENUM_ENTRY(IC_EVEX_W_XS_KZ, 4, "requires EVEX_KZ, W, and XS prefix") \
  246. ENUM_ENTRY(IC_EVEX_W_XD_KZ, 4, "requires EVEX_KZ, W, and XD prefix") \
  247. ENUM_ENTRY(IC_EVEX_W_OPSIZE_KZ, 4, "requires EVEX_KZ, W, and OpSize") \
  248. ENUM_ENTRY(IC_EVEX_L_KZ, 3, "requires EVEX_KZ and the L prefix") \
  249. ENUM_ENTRY(IC_EVEX_L_XS_KZ, 4, "requires EVEX_KZ and the L and XS prefix")\
  250. ENUM_ENTRY(IC_EVEX_L_XD_KZ, 4, "requires EVEX_KZ and the L and XD prefix")\
  251. ENUM_ENTRY(IC_EVEX_L_OPSIZE_KZ, 4, "requires EVEX_KZ, L, and OpSize") \
  252. ENUM_ENTRY(IC_EVEX_L_W_KZ, 3, "requires EVEX_KZ, L and W") \
  253. ENUM_ENTRY(IC_EVEX_L_W_XS_KZ, 4, "requires EVEX_KZ, L, W and XS prefix") \
  254. ENUM_ENTRY(IC_EVEX_L_W_XD_KZ, 4, "requires EVEX_KZ, L, W and XD prefix") \
  255. ENUM_ENTRY(IC_EVEX_L_W_OPSIZE_KZ, 4, "requires EVEX_KZ, L, W and OpSize") \
  256. ENUM_ENTRY(IC_EVEX_L2_KZ, 3, "requires EVEX_KZ and the L2 prefix") \
  257. ENUM_ENTRY(IC_EVEX_L2_XS_KZ, 4, "requires EVEX_KZ and the L2 and XS prefix")\
  258. ENUM_ENTRY(IC_EVEX_L2_XD_KZ, 4, "requires EVEX_KZ and the L2 and XD prefix")\
  259. ENUM_ENTRY(IC_EVEX_L2_OPSIZE_KZ, 4, "requires EVEX_KZ, L2, and OpSize") \
  260. ENUM_ENTRY(IC_EVEX_L2_W_KZ, 3, "requires EVEX_KZ, L2 and W") \
  261. ENUM_ENTRY(IC_EVEX_L2_W_XS_KZ, 4, "requires EVEX_KZ, L2, W and XS prefix") \
  262. ENUM_ENTRY(IC_EVEX_L2_W_XD_KZ, 4, "requires EVEX_KZ, L2, W and XD prefix") \
  263. ENUM_ENTRY(IC_EVEX_L2_W_OPSIZE_KZ, 4, "requires EVEX_KZ, L2, W and OpSize")
  264. #define ENUM_ENTRY(n, r, d) n,
  265. typedef enum {
  266. INSTRUCTION_CONTEXTS
  267. IC_max
  268. } InstructionContext;
  269. #undef ENUM_ENTRY
  270. /*
  271. * Opcode types, which determine which decode table to use, both in the Intel
  272. * manual and also for the decoder.
  273. */
  274. typedef enum {
  275. ONEBYTE = 0,
  276. TWOBYTE = 1,
  277. THREEBYTE_38 = 2,
  278. THREEBYTE_3A = 3,
  279. THREEBYTE_A6 = 4,
  280. THREEBYTE_A7 = 5,
  281. XOP8_MAP = 6,
  282. XOP9_MAP = 7,
  283. XOPA_MAP = 8
  284. } OpcodeType;
  285. /*
  286. * The following structs are used for the hierarchical decode table. After
  287. * determining the instruction's class (i.e., which IC_* constant applies to
  288. * it), the decoder reads the opcode. Some instructions require specific
  289. * values of the ModR/M byte, so the ModR/M byte indexes into the final table.
  290. *
  291. * If a ModR/M byte is not required, "required" is left unset, and the values
  292. * for each instructionID are identical.
  293. */
  294. typedef uint16_t InstrUID;
  295. /*
  296. * ModRMDecisionType - describes the type of ModR/M decision, allowing the
  297. * consumer to determine the number of entries in it.
  298. *
  299. * MODRM_ONEENTRY - No matter what the value of the ModR/M byte is, the decoded
  300. * instruction is the same.
  301. * MODRM_SPLITRM - If the ModR/M byte is between 0x00 and 0xbf, the opcode
  302. * corresponds to one instruction; otherwise, it corresponds to
  303. * a different instruction.
  304. * MODRM_SPLITMISC- If the ModR/M byte is between 0x00 and 0xbf, ModR/M byte
  305. * divided by 8 is used to select instruction; otherwise, each
  306. * value of the ModR/M byte could correspond to a different
  307. * instruction.
  308. * MODRM_SPLITREG - ModR/M byte divided by 8 is used to select instruction. This
  309. corresponds to instructions that use reg field as opcode
  310. * MODRM_FULL - Potentially, each value of the ModR/M byte could correspond
  311. * to a different instruction.
  312. */
  313. #define MODRMTYPES \
  314. ENUM_ENTRY(MODRM_ONEENTRY) \
  315. ENUM_ENTRY(MODRM_SPLITRM) \
  316. ENUM_ENTRY(MODRM_SPLITMISC) \
  317. ENUM_ENTRY(MODRM_SPLITREG) \
  318. ENUM_ENTRY(MODRM_FULL)
  319. #define ENUM_ENTRY(n) n,
  320. typedef enum {
  321. MODRMTYPES
  322. MODRM_max
  323. } ModRMDecisionType;
  324. #undef ENUM_ENTRY
  325. /*
  326. * ModRMDecision - Specifies whether a ModR/M byte is needed and (if so) which
  327. * instruction each possible value of the ModR/M byte corresponds to. Once
  328. * this information is known, we have narrowed down to a single instruction.
  329. */
  330. struct ModRMDecision {
  331. uint8_t modrm_type;
  332. /* The macro below must be defined wherever this file is included. */
  333. INSTRUCTION_IDS
  334. };
  335. /*
  336. * OpcodeDecision - Specifies which set of ModR/M->instruction tables to look at
  337. * given a particular opcode.
  338. */
  339. struct OpcodeDecision {
  340. struct ModRMDecision modRMDecisions[256];
  341. };
  342. /*
  343. * ContextDecision - Specifies which opcode->instruction tables to look at given
  344. * a particular context (set of attributes). Since there are many possible
  345. * contexts, the decoder first uses CONTEXTS_SYM to determine which context
  346. * applies given a specific set of attributes. Hence there are only IC_max
  347. * entries in this table, rather than 2^(ATTR_max).
  348. */
  349. struct ContextDecision {
  350. struct OpcodeDecision opcodeDecisions[IC_max];
  351. };
  352. /*
  353. * Physical encodings of instruction operands.
  354. */
  355. #define ENCODINGS \
  356. ENUM_ENTRY(ENCODING_NONE, "") \
  357. ENUM_ENTRY(ENCODING_REG, "Register operand in ModR/M byte.") \
  358. ENUM_ENTRY(ENCODING_RM, "R/M operand in ModR/M byte.") \
  359. ENUM_ENTRY(ENCODING_VVVV, "Register operand in VEX.vvvv byte.") \
  360. ENUM_ENTRY(ENCODING_WRITEMASK, "Register operand in EVEX.aaa byte.") \
  361. ENUM_ENTRY(ENCODING_CB, "1-byte code offset (possible new CS value)") \
  362. ENUM_ENTRY(ENCODING_CW, "2-byte") \
  363. ENUM_ENTRY(ENCODING_CD, "4-byte") \
  364. ENUM_ENTRY(ENCODING_CP, "6-byte") \
  365. ENUM_ENTRY(ENCODING_CO, "8-byte") \
  366. ENUM_ENTRY(ENCODING_CT, "10-byte") \
  367. ENUM_ENTRY(ENCODING_IB, "1-byte immediate") \
  368. ENUM_ENTRY(ENCODING_IW, "2-byte") \
  369. ENUM_ENTRY(ENCODING_ID, "4-byte") \
  370. ENUM_ENTRY(ENCODING_IO, "8-byte") \
  371. ENUM_ENTRY(ENCODING_RB, "(AL..DIL, R8L..R15L) Register code added to " \
  372. "the opcode byte") \
  373. ENUM_ENTRY(ENCODING_RW, "(AX..DI, R8W..R15W)") \
  374. ENUM_ENTRY(ENCODING_RD, "(EAX..EDI, R8D..R15D)") \
  375. ENUM_ENTRY(ENCODING_RO, "(RAX..RDI, R8..R15)") \
  376. ENUM_ENTRY(ENCODING_I, "Position on floating-point stack added to the " \
  377. "opcode byte") \
  378. \
  379. ENUM_ENTRY(ENCODING_Iv, "Immediate of operand size") \
  380. ENUM_ENTRY(ENCODING_Ia, "Immediate of address size") \
  381. ENUM_ENTRY(ENCODING_Rv, "Register code of operand size added to the " \
  382. "opcode byte") \
  383. ENUM_ENTRY(ENCODING_DUP, "Duplicate of another operand; ID is encoded " \
  384. "in type")
  385. #define ENUM_ENTRY(n, d) n,
  386. typedef enum {
  387. ENCODINGS
  388. ENCODING_max
  389. } OperandEncoding;
  390. #undef ENUM_ENTRY
  391. /*
  392. * Semantic interpretations of instruction operands.
  393. */
  394. #define TYPES \
  395. ENUM_ENTRY(TYPE_NONE, "") \
  396. ENUM_ENTRY(TYPE_REL8, "1-byte immediate address") \
  397. ENUM_ENTRY(TYPE_REL16, "2-byte") \
  398. ENUM_ENTRY(TYPE_REL32, "4-byte") \
  399. ENUM_ENTRY(TYPE_REL64, "8-byte") \
  400. ENUM_ENTRY(TYPE_PTR1616, "2+2-byte segment+offset address") \
  401. ENUM_ENTRY(TYPE_PTR1632, "2+4-byte") \
  402. ENUM_ENTRY(TYPE_PTR1664, "2+8-byte") \
  403. ENUM_ENTRY(TYPE_R8, "1-byte register operand") \
  404. ENUM_ENTRY(TYPE_R16, "2-byte") \
  405. ENUM_ENTRY(TYPE_R32, "4-byte") \
  406. ENUM_ENTRY(TYPE_R64, "8-byte") \
  407. ENUM_ENTRY(TYPE_IMM8, "1-byte immediate operand") \
  408. ENUM_ENTRY(TYPE_IMM16, "2-byte") \
  409. ENUM_ENTRY(TYPE_IMM32, "4-byte") \
  410. ENUM_ENTRY(TYPE_IMM64, "8-byte") \
  411. ENUM_ENTRY(TYPE_IMM3, "1-byte immediate operand between 0 and 7") \
  412. ENUM_ENTRY(TYPE_IMM5, "1-byte immediate operand between 0 and 31") \
  413. ENUM_ENTRY(TYPE_RM8, "1-byte register or memory operand") \
  414. ENUM_ENTRY(TYPE_RM16, "2-byte") \
  415. ENUM_ENTRY(TYPE_RM32, "4-byte") \
  416. ENUM_ENTRY(TYPE_RM64, "8-byte") \
  417. ENUM_ENTRY(TYPE_M, "Memory operand") \
  418. ENUM_ENTRY(TYPE_M8, "1-byte") \
  419. ENUM_ENTRY(TYPE_M16, "2-byte") \
  420. ENUM_ENTRY(TYPE_M32, "4-byte") \
  421. ENUM_ENTRY(TYPE_M64, "8-byte") \
  422. ENUM_ENTRY(TYPE_LEA, "Effective address") \
  423. ENUM_ENTRY(TYPE_M128, "16-byte (SSE/SSE2)") \
  424. ENUM_ENTRY(TYPE_M256, "256-byte (AVX)") \
  425. ENUM_ENTRY(TYPE_M1616, "2+2-byte segment+offset address") \
  426. ENUM_ENTRY(TYPE_M1632, "2+4-byte") \
  427. ENUM_ENTRY(TYPE_M1664, "2+8-byte") \
  428. ENUM_ENTRY(TYPE_M16_32, "2+4-byte two-part memory operand (LIDT, LGDT)") \
  429. ENUM_ENTRY(TYPE_M16_16, "2+2-byte (BOUND)") \
  430. ENUM_ENTRY(TYPE_M32_32, "4+4-byte (BOUND)") \
  431. ENUM_ENTRY(TYPE_M16_64, "2+8-byte (LIDT, LGDT)") \
  432. ENUM_ENTRY(TYPE_MOFFS8, "1-byte memory offset (relative to segment " \
  433. "base)") \
  434. ENUM_ENTRY(TYPE_MOFFS16, "2-byte") \
  435. ENUM_ENTRY(TYPE_MOFFS32, "4-byte") \
  436. ENUM_ENTRY(TYPE_MOFFS64, "8-byte") \
  437. ENUM_ENTRY(TYPE_SREG, "Byte with single bit set: 0 = ES, 1 = CS, " \
  438. "2 = SS, 3 = DS, 4 = FS, 5 = GS") \
  439. ENUM_ENTRY(TYPE_M32FP, "32-bit IEE754 memory floating-point operand") \
  440. ENUM_ENTRY(TYPE_M64FP, "64-bit") \
  441. ENUM_ENTRY(TYPE_M80FP, "80-bit extended") \
  442. ENUM_ENTRY(TYPE_M16INT, "2-byte memory integer operand for use in " \
  443. "floating-point instructions") \
  444. ENUM_ENTRY(TYPE_M32INT, "4-byte") \
  445. ENUM_ENTRY(TYPE_M64INT, "8-byte") \
  446. ENUM_ENTRY(TYPE_ST, "Position on the floating-point stack") \
  447. ENUM_ENTRY(TYPE_MM, "MMX register operand") \
  448. ENUM_ENTRY(TYPE_MM32, "4-byte MMX register or memory operand") \
  449. ENUM_ENTRY(TYPE_MM64, "8-byte") \
  450. ENUM_ENTRY(TYPE_XMM, "XMM register operand") \
  451. ENUM_ENTRY(TYPE_XMM32, "4-byte XMM register or memory operand") \
  452. ENUM_ENTRY(TYPE_XMM64, "8-byte") \
  453. ENUM_ENTRY(TYPE_XMM128, "16-byte") \
  454. ENUM_ENTRY(TYPE_XMM256, "32-byte") \
  455. ENUM_ENTRY(TYPE_XMM512, "64-byte") \
  456. ENUM_ENTRY(TYPE_VK8, "8-bit") \
  457. ENUM_ENTRY(TYPE_VK16, "16-bit") \
  458. ENUM_ENTRY(TYPE_XMM0, "Implicit use of XMM0") \
  459. ENUM_ENTRY(TYPE_SEGMENTREG, "Segment register operand") \
  460. ENUM_ENTRY(TYPE_DEBUGREG, "Debug register operand") \
  461. ENUM_ENTRY(TYPE_CONTROLREG, "Control register operand") \
  462. \
  463. ENUM_ENTRY(TYPE_Mv, "Memory operand of operand size") \
  464. ENUM_ENTRY(TYPE_Rv, "Register operand of operand size") \
  465. ENUM_ENTRY(TYPE_IMMv, "Immediate operand of operand size") \
  466. ENUM_ENTRY(TYPE_RELv, "Immediate address of operand size") \
  467. ENUM_ENTRY(TYPE_DUP0, "Duplicate of operand 0") \
  468. ENUM_ENTRY(TYPE_DUP1, "operand 1") \
  469. ENUM_ENTRY(TYPE_DUP2, "operand 2") \
  470. ENUM_ENTRY(TYPE_DUP3, "operand 3") \
  471. ENUM_ENTRY(TYPE_DUP4, "operand 4") \
  472. ENUM_ENTRY(TYPE_M512, "512-bit FPU/MMX/XMM/MXCSR state")
  473. #define ENUM_ENTRY(n, d) n,
  474. typedef enum {
  475. TYPES
  476. TYPE_max
  477. } OperandType;
  478. #undef ENUM_ENTRY
  479. /*
  480. * OperandSpecifier - The specification for how to extract and interpret one
  481. * operand.
  482. */
  483. struct OperandSpecifier {
  484. uint8_t encoding;
  485. uint8_t type;
  486. };
  487. /*
  488. * Indicates where the opcode modifier (if any) is to be found. Extended
  489. * opcodes with AddRegFrm have the opcode modifier in the ModR/M byte.
  490. */
  491. #define MODIFIER_TYPES \
  492. ENUM_ENTRY(MODIFIER_NONE) \
  493. ENUM_ENTRY(MODIFIER_OPCODE) \
  494. ENUM_ENTRY(MODIFIER_MODRM)
  495. #define ENUM_ENTRY(n) n,
  496. typedef enum {
  497. MODIFIER_TYPES
  498. MODIFIER_max
  499. } ModifierType;
  500. #undef ENUM_ENTRY
  501. #define X86_MAX_OPERANDS 5
  502. /*
  503. * The specification for how to extract and interpret a full instruction and
  504. * its operands.
  505. */
  506. struct InstructionSpecifier {
  507. uint8_t modifierType;
  508. uint8_t modifierBase;
  509. /* The macro below must be defined wherever this file is included. */
  510. INSTRUCTION_SPECIFIER_FIELDS
  511. };
  512. /*
  513. * Decoding mode for the Intel disassembler. 16-bit, 32-bit, and 64-bit mode
  514. * are supported, and represent real mode, IA-32e, and IA-32e in 64-bit mode,
  515. * respectively.
  516. */
  517. typedef enum {
  518. MODE_16BIT,
  519. MODE_32BIT,
  520. MODE_64BIT
  521. } DisassemblerMode;
  522. #endif