/3rd_party/llvm/lib/Target/PowerPC/PPCInstrFormats.td

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  1. //===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=//
  2. //
  3. // The LLVM Compiler Infrastructure
  4. //
  5. // This file is distributed under the University of Illinois Open Source
  6. // License. See LICENSE.TXT for details.
  7. //
  8. //===----------------------------------------------------------------------===//
  9. //===----------------------------------------------------------------------===//
  10. //
  11. // PowerPC instruction formats
  12. class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
  13. : Instruction {
  14. field bits<32> Inst;
  15. bit PPC64 = 0; // Default value, override with isPPC64
  16. let Namespace = "PPC";
  17. let Inst{0-5} = opcode;
  18. let OutOperandList = OOL;
  19. let InOperandList = IOL;
  20. let AsmString = asmstr;
  21. let Itinerary = itin;
  22. bits<1> PPC970_First = 0;
  23. bits<1> PPC970_Single = 0;
  24. bits<1> PPC970_Cracked = 0;
  25. bits<3> PPC970_Unit = 0;
  26. /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to
  27. /// these must be reflected there! See comments there for what these are.
  28. let TSFlags{0} = PPC970_First;
  29. let TSFlags{1} = PPC970_Single;
  30. let TSFlags{2} = PPC970_Cracked;
  31. let TSFlags{5-3} = PPC970_Unit;
  32. // Fields used for relation models.
  33. string BaseName = "";
  34. // For cases where multiple instruction definitions really represent the
  35. // same underlying instruction but with one definition for 64-bit arguments
  36. // and one for 32-bit arguments, this bit breaks the degeneracy between
  37. // the two forms and allows TableGen to generate mapping tables.
  38. bit Interpretation64Bit = 0;
  39. }
  40. class PPC970_DGroup_First { bits<1> PPC970_First = 1; }
  41. class PPC970_DGroup_Single { bits<1> PPC970_Single = 1; }
  42. class PPC970_DGroup_Cracked { bits<1> PPC970_Cracked = 1; }
  43. class PPC970_MicroCode;
  44. class PPC970_Unit_Pseudo { bits<3> PPC970_Unit = 0; }
  45. class PPC970_Unit_FXU { bits<3> PPC970_Unit = 1; }
  46. class PPC970_Unit_LSU { bits<3> PPC970_Unit = 2; }
  47. class PPC970_Unit_FPU { bits<3> PPC970_Unit = 3; }
  48. class PPC970_Unit_CRU { bits<3> PPC970_Unit = 4; }
  49. class PPC970_Unit_VALU { bits<3> PPC970_Unit = 5; }
  50. class PPC970_Unit_VPERM { bits<3> PPC970_Unit = 6; }
  51. class PPC970_Unit_BRU { bits<3> PPC970_Unit = 7; }
  52. // Two joined instructions; used to emit two adjacent instructions as one.
  53. // The itinerary from the first instruction is used for scheduling and
  54. // classification.
  55. class I2<bits<6> opcode1, bits<6> opcode2, dag OOL, dag IOL, string asmstr,
  56. InstrItinClass itin>
  57. : Instruction {
  58. field bits<64> Inst;
  59. bit PPC64 = 0; // Default value, override with isPPC64
  60. let Namespace = "PPC";
  61. let Inst{0-5} = opcode1;
  62. let Inst{32-37} = opcode2;
  63. let OutOperandList = OOL;
  64. let InOperandList = IOL;
  65. let AsmString = asmstr;
  66. let Itinerary = itin;
  67. bits<1> PPC970_First = 0;
  68. bits<1> PPC970_Single = 0;
  69. bits<1> PPC970_Cracked = 0;
  70. bits<3> PPC970_Unit = 0;
  71. /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to
  72. /// these must be reflected there! See comments there for what these are.
  73. let TSFlags{0} = PPC970_First;
  74. let TSFlags{1} = PPC970_Single;
  75. let TSFlags{2} = PPC970_Cracked;
  76. let TSFlags{5-3} = PPC970_Unit;
  77. // Fields used for relation models.
  78. string BaseName = "";
  79. bit Interpretation64Bit = 0;
  80. }
  81. // 1.7.1 I-Form
  82. class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr,
  83. InstrItinClass itin, list<dag> pattern>
  84. : I<opcode, OOL, IOL, asmstr, itin> {
  85. let Pattern = pattern;
  86. bits<24> LI;
  87. let Inst{6-29} = LI;
  88. let Inst{30} = aa;
  89. let Inst{31} = lk;
  90. }
  91. // 1.7.2 B-Form
  92. class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr>
  93. : I<opcode, OOL, IOL, asmstr, BrB> {
  94. bits<7> BIBO; // 2 bits of BI and 5 bits of BO.
  95. bits<3> CR;
  96. bits<14> BD;
  97. bits<5> BI;
  98. let BI{0-1} = BIBO{5-6};
  99. let BI{2-4} = CR{0-2};
  100. let Inst{6-10} = BIBO{4-0};
  101. let Inst{11-15} = BI;
  102. let Inst{16-29} = BD;
  103. let Inst{30} = aa;
  104. let Inst{31} = lk;
  105. }
  106. class BForm_1<bits<6> opcode, bits<5> bo, bit aa, bit lk, dag OOL, dag IOL,
  107. string asmstr>
  108. : BForm<opcode, aa, lk, OOL, IOL, asmstr> {
  109. let BIBO{4-0} = bo;
  110. let BIBO{6-5} = 0;
  111. let CR = 0;
  112. }
  113. class BForm_2<bits<6> opcode, bits<5> bo, bits<5> bi, bit aa, bit lk,
  114. dag OOL, dag IOL, string asmstr>
  115. : I<opcode, OOL, IOL, asmstr, BrB> {
  116. bits<14> BD;
  117. let Inst{6-10} = bo;
  118. let Inst{11-15} = bi;
  119. let Inst{16-29} = BD;
  120. let Inst{30} = aa;
  121. let Inst{31} = lk;
  122. }
  123. class BForm_3<bits<6> opcode, bit aa, bit lk,
  124. dag OOL, dag IOL, string asmstr>
  125. : I<opcode, OOL, IOL, asmstr, BrB> {
  126. bits<5> BO;
  127. bits<5> BI;
  128. bits<14> BD;
  129. let Inst{6-10} = BO;
  130. let Inst{11-15} = BI;
  131. let Inst{16-29} = BD;
  132. let Inst{30} = aa;
  133. let Inst{31} = lk;
  134. }
  135. // 1.7.3 SC-Form
  136. class SCForm<bits<6> opcode, bits<1> xo,
  137. dag OOL, dag IOL, string asmstr, InstrItinClass itin,
  138. list<dag> pattern>
  139. : I<opcode, OOL, IOL, asmstr, itin> {
  140. bits<7> LEV;
  141. let Pattern = pattern;
  142. let Inst{20-26} = LEV;
  143. let Inst{30} = xo;
  144. }
  145. // 1.7.4 D-Form
  146. class DForm_base<bits<6> opcode, dag OOL, dag IOL, string asmstr,
  147. InstrItinClass itin, list<dag> pattern>
  148. : I<opcode, OOL, IOL, asmstr, itin> {
  149. bits<5> A;
  150. bits<5> B;
  151. bits<16> C;
  152. let Pattern = pattern;
  153. let Inst{6-10} = A;
  154. let Inst{11-15} = B;
  155. let Inst{16-31} = C;
  156. }
  157. class DForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr,
  158. InstrItinClass itin, list<dag> pattern>
  159. : I<opcode, OOL, IOL, asmstr, itin> {
  160. bits<5> A;
  161. bits<21> Addr;
  162. let Pattern = pattern;
  163. let Inst{6-10} = A;
  164. let Inst{11-15} = Addr{20-16}; // Base Reg
  165. let Inst{16-31} = Addr{15-0}; // Displacement
  166. }
  167. class DForm_1a<bits<6> opcode, dag OOL, dag IOL, string asmstr,
  168. InstrItinClass itin, list<dag> pattern>
  169. : I<opcode, OOL, IOL, asmstr, itin> {
  170. bits<5> A;
  171. bits<16> C;
  172. bits<5> B;
  173. let Pattern = pattern;
  174. let Inst{6-10} = A;
  175. let Inst{11-15} = B;
  176. let Inst{16-31} = C;
  177. }
  178. class DForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr,
  179. InstrItinClass itin, list<dag> pattern>
  180. : DForm_base<opcode, OOL, IOL, asmstr, itin, pattern> {
  181. // Even though ADDICo does not really have an RC bit, provide
  182. // the declaration of one here so that isDOT has something to set.
  183. bit RC = 0;
  184. }
  185. class DForm_2_r0<bits<6> opcode, dag OOL, dag IOL, string asmstr,
  186. InstrItinClass itin, list<dag> pattern>
  187. : I<opcode, OOL, IOL, asmstr, itin> {
  188. bits<5> A;
  189. bits<16> B;
  190. let Pattern = pattern;
  191. let Inst{6-10} = A;
  192. let Inst{11-15} = 0;
  193. let Inst{16-31} = B;
  194. }
  195. class DForm_4<bits<6> opcode, dag OOL, dag IOL, string asmstr,
  196. InstrItinClass itin, list<dag> pattern>
  197. : I<opcode, OOL, IOL, asmstr, itin> {
  198. bits<5> B;
  199. bits<5> A;
  200. bits<16> C;
  201. let Pattern = pattern;
  202. let Inst{6-10} = A;
  203. let Inst{11-15} = B;
  204. let Inst{16-31} = C;
  205. }
  206. class DForm_4_zero<bits<6> opcode, dag OOL, dag IOL, string asmstr,
  207. InstrItinClass itin, list<dag> pattern>
  208. : DForm_1<opcode, OOL, IOL, asmstr, itin, pattern> {
  209. let A = 0;
  210. let Addr = 0;
  211. }
  212. class IForm_and_DForm_1<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2,
  213. dag OOL, dag IOL, string asmstr,
  214. InstrItinClass itin, list<dag> pattern>
  215. : I2<opcode1, opcode2, OOL, IOL, asmstr, itin> {
  216. bits<5> A;
  217. bits<21> Addr;
  218. let Pattern = pattern;
  219. bits<24> LI;
  220. let Inst{6-29} = LI;
  221. let Inst{30} = aa;
  222. let Inst{31} = lk;
  223. let Inst{38-42} = A;
  224. let Inst{43-47} = Addr{20-16}; // Base Reg
  225. let Inst{48-63} = Addr{15-0}; // Displacement
  226. }
  227. // This is used to emit BL8+NOP.
  228. class IForm_and_DForm_4_zero<bits<6> opcode1, bit aa, bit lk, bits<6> opcode2,
  229. dag OOL, dag IOL, string asmstr,
  230. InstrItinClass itin, list<dag> pattern>
  231. : IForm_and_DForm_1<opcode1, aa, lk, opcode2,
  232. OOL, IOL, asmstr, itin, pattern> {
  233. let A = 0;
  234. let Addr = 0;
  235. }
  236. class DForm_5<bits<6> opcode, dag OOL, dag IOL, string asmstr,
  237. InstrItinClass itin>
  238. : I<opcode, OOL, IOL, asmstr, itin> {
  239. bits<3> BF;
  240. bits<1> L;
  241. bits<5> RA;
  242. bits<16> I;
  243. let Inst{6-8} = BF;
  244. let Inst{9} = 0;
  245. let Inst{10} = L;
  246. let Inst{11-15} = RA;
  247. let Inst{16-31} = I;
  248. }
  249. class DForm_5_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr,
  250. InstrItinClass itin>
  251. : DForm_5<opcode, OOL, IOL, asmstr, itin> {
  252. let L = PPC64;
  253. }
  254. class DForm_6<bits<6> opcode, dag OOL, dag IOL, string asmstr,
  255. InstrItinClass itin>
  256. : DForm_5<opcode, OOL, IOL, asmstr, itin>;
  257. class DForm_6_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr,
  258. InstrItinClass itin>
  259. : DForm_6<opcode, OOL, IOL, asmstr, itin> {
  260. let L = PPC64;
  261. }
  262. // 1.7.5 DS-Form
  263. class DSForm_1<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr,
  264. InstrItinClass itin, list<dag> pattern>
  265. : I<opcode, OOL, IOL, asmstr, itin> {
  266. bits<5> RST;
  267. bits<19> DS_RA;
  268. let Pattern = pattern;
  269. let Inst{6-10} = RST;
  270. let Inst{11-15} = DS_RA{18-14}; // Register #
  271. let Inst{16-29} = DS_RA{13-0}; // Displacement.
  272. let Inst{30-31} = xo;
  273. }
  274. class DSForm_1a<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr,
  275. InstrItinClass itin, list<dag> pattern>
  276. : I<opcode, OOL, IOL, asmstr, itin> {
  277. bits<5> RST;
  278. bits<14> DS;
  279. bits<5> RA;
  280. let Pattern = pattern;
  281. let Inst{6-10} = RST;
  282. let Inst{11-15} = RA;
  283. let Inst{16-29} = DS;
  284. let Inst{30-31} = xo;
  285. }
  286. // 1.7.6 X-Form
  287. class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  288. InstrItinClass itin, list<dag> pattern>
  289. : I<opcode, OOL, IOL, asmstr, itin> {
  290. bits<5> RST;
  291. bits<5> A;
  292. bits<5> B;
  293. let Pattern = pattern;
  294. bit RC = 0; // set by isDOT
  295. let Inst{6-10} = RST;
  296. let Inst{11-15} = A;
  297. let Inst{16-20} = B;
  298. let Inst{21-30} = xo;
  299. let Inst{31} = RC;
  300. }
  301. // This is the same as XForm_base_r3xo, but the first two operands are swapped
  302. // when code is emitted.
  303. class XForm_base_r3xo_swapped
  304. <bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  305. InstrItinClass itin>
  306. : I<opcode, OOL, IOL, asmstr, itin> {
  307. bits<5> A;
  308. bits<5> RST;
  309. bits<5> B;
  310. bit RC = 0; // set by isDOT
  311. let Inst{6-10} = RST;
  312. let Inst{11-15} = A;
  313. let Inst{16-20} = B;
  314. let Inst{21-30} = xo;
  315. let Inst{31} = RC;
  316. }
  317. class XForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  318. InstrItinClass itin, list<dag> pattern>
  319. : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>;
  320. class XForm_1a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  321. InstrItinClass itin, list<dag> pattern>
  322. : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
  323. let RST = 0;
  324. }
  325. class XForm_rs<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  326. InstrItinClass itin, list<dag> pattern>
  327. : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
  328. let A = 0;
  329. let B = 0;
  330. }
  331. class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  332. InstrItinClass itin, list<dag> pattern>
  333. : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {
  334. let Pattern = pattern;
  335. }
  336. class XForm_8<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  337. InstrItinClass itin, list<dag> pattern>
  338. : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>;
  339. class XForm_10<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  340. InstrItinClass itin, list<dag> pattern>
  341. : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {
  342. let Pattern = pattern;
  343. }
  344. class XForm_11<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  345. InstrItinClass itin, list<dag> pattern>
  346. : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> {
  347. let B = 0;
  348. let Pattern = pattern;
  349. }
  350. class XForm_16<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  351. InstrItinClass itin>
  352. : I<opcode, OOL, IOL, asmstr, itin> {
  353. bits<3> BF;
  354. bits<1> L;
  355. bits<5> RA;
  356. bits<5> RB;
  357. let Inst{6-8} = BF;
  358. let Inst{9} = 0;
  359. let Inst{10} = L;
  360. let Inst{11-15} = RA;
  361. let Inst{16-20} = RB;
  362. let Inst{21-30} = xo;
  363. let Inst{31} = 0;
  364. }
  365. class XForm_mtmsr<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  366. InstrItinClass itin>
  367. : I<opcode, OOL, IOL, asmstr, itin> {
  368. bits<5> RS;
  369. bits<1> L;
  370. let Inst{6-10} = RS;
  371. let Inst{15} = L;
  372. let Inst{21-30} = xo;
  373. }
  374. class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  375. InstrItinClass itin>
  376. : XForm_16<opcode, xo, OOL, IOL, asmstr, itin> {
  377. let L = PPC64;
  378. }
  379. class XForm_17<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  380. InstrItinClass itin>
  381. : I<opcode, OOL, IOL, asmstr, itin> {
  382. bits<3> BF;
  383. bits<5> FRA;
  384. bits<5> FRB;
  385. let Inst{6-8} = BF;
  386. let Inst{9-10} = 0;
  387. let Inst{11-15} = FRA;
  388. let Inst{16-20} = FRB;
  389. let Inst{21-30} = xo;
  390. let Inst{31} = 0;
  391. }
  392. class XForm_24<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  393. InstrItinClass itin, list<dag> pattern>
  394. : I<opcode, OOL, IOL, asmstr, itin> {
  395. let Pattern = pattern;
  396. let Inst{6-10} = 31;
  397. let Inst{11-15} = 0;
  398. let Inst{16-20} = 0;
  399. let Inst{21-30} = xo;
  400. let Inst{31} = 0;
  401. }
  402. class XForm_24_sync<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
  403. string asmstr, InstrItinClass itin, list<dag> pattern>
  404. : I<opcode, OOL, IOL, asmstr, itin> {
  405. bits<2> L;
  406. let Pattern = pattern;
  407. let Inst{6-8} = 0;
  408. let Inst{9-10} = L;
  409. let Inst{11-15} = 0;
  410. let Inst{16-20} = 0;
  411. let Inst{21-30} = xo;
  412. let Inst{31} = 0;
  413. }
  414. class XForm_24_eieio<bits<6> opcode, bits<10> xo, dag OOL, dag IOL,
  415. string asmstr, InstrItinClass itin, list<dag> pattern>
  416. : XForm_24_sync<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
  417. let L = 0;
  418. }
  419. class XForm_25<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  420. InstrItinClass itin, list<dag> pattern>
  421. : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
  422. }
  423. class XForm_26<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  424. InstrItinClass itin, list<dag> pattern>
  425. : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
  426. let A = 0;
  427. }
  428. class XForm_28<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  429. InstrItinClass itin, list<dag> pattern>
  430. : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
  431. }
  432. // This is used for MFFS, MTFSB0, MTFSB1. 42 is arbitrary; this series of
  433. // numbers presumably relates to some document, but I haven't found it.
  434. class XForm_42<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  435. InstrItinClass itin, list<dag> pattern>
  436. : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
  437. let Pattern = pattern;
  438. bit RC = 0; // set by isDOT
  439. let Inst{6-10} = RST;
  440. let Inst{11-20} = 0;
  441. let Inst{21-30} = xo;
  442. let Inst{31} = RC;
  443. }
  444. class XForm_43<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  445. InstrItinClass itin, list<dag> pattern>
  446. : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
  447. let Pattern = pattern;
  448. bits<5> FM;
  449. bit RC = 0; // set by isDOT
  450. let Inst{6-10} = FM;
  451. let Inst{11-20} = 0;
  452. let Inst{21-30} = xo;
  453. let Inst{31} = RC;
  454. }
  455. class XForm_0<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  456. InstrItinClass itin, list<dag> pattern>
  457. : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
  458. let RST = 0;
  459. let A = 0;
  460. let B = 0;
  461. }
  462. class XForm_16b<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  463. InstrItinClass itin, list<dag> pattern>
  464. : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
  465. let RST = 0;
  466. let A = 0;
  467. }
  468. // DCB_Form - Form X instruction, used for dcb* instructions.
  469. class DCB_Form<bits<10> xo, bits<5> immfield, dag OOL, dag IOL, string asmstr,
  470. InstrItinClass itin, list<dag> pattern>
  471. : I<31, OOL, IOL, asmstr, itin> {
  472. bits<5> A;
  473. bits<5> B;
  474. let Pattern = pattern;
  475. let Inst{6-10} = immfield;
  476. let Inst{11-15} = A;
  477. let Inst{16-20} = B;
  478. let Inst{21-30} = xo;
  479. let Inst{31} = 0;
  480. }
  481. // DSS_Form - Form X instruction, used for altivec dss* instructions.
  482. class DSS_Form<bits<10> xo, dag OOL, dag IOL, string asmstr,
  483. InstrItinClass itin, list<dag> pattern>
  484. : I<31, OOL, IOL, asmstr, itin> {
  485. bits<1> T;
  486. bits<2> STRM;
  487. bits<5> A;
  488. bits<5> B;
  489. let Pattern = pattern;
  490. let Inst{6} = T;
  491. let Inst{7-8} = 0;
  492. let Inst{9-10} = STRM;
  493. let Inst{11-15} = A;
  494. let Inst{16-20} = B;
  495. let Inst{21-30} = xo;
  496. let Inst{31} = 0;
  497. }
  498. // 1.7.7 XL-Form
  499. class XLForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  500. InstrItinClass itin, list<dag> pattern>
  501. : I<opcode, OOL, IOL, asmstr, itin> {
  502. bits<5> CRD;
  503. bits<5> CRA;
  504. bits<5> CRB;
  505. let Pattern = pattern;
  506. let Inst{6-10} = CRD;
  507. let Inst{11-15} = CRA;
  508. let Inst{16-20} = CRB;
  509. let Inst{21-30} = xo;
  510. let Inst{31} = 0;
  511. }
  512. class XLForm_1_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  513. InstrItinClass itin, list<dag> pattern>
  514. : I<opcode, OOL, IOL, asmstr, itin> {
  515. bits<5> CRD;
  516. let Pattern = pattern;
  517. let Inst{6-10} = CRD;
  518. let Inst{11-15} = CRD;
  519. let Inst{16-20} = CRD;
  520. let Inst{21-30} = xo;
  521. let Inst{31} = 0;
  522. }
  523. class XLForm_2<bits<6> opcode, bits<10> xo, bit lk, dag OOL, dag IOL, string asmstr,
  524. InstrItinClass itin, list<dag> pattern>
  525. : I<opcode, OOL, IOL, asmstr, itin> {
  526. bits<5> BO;
  527. bits<5> BI;
  528. bits<2> BH;
  529. let Pattern = pattern;
  530. let Inst{6-10} = BO;
  531. let Inst{11-15} = BI;
  532. let Inst{16-18} = 0;
  533. let Inst{19-20} = BH;
  534. let Inst{21-30} = xo;
  535. let Inst{31} = lk;
  536. }
  537. class XLForm_2_br<bits<6> opcode, bits<10> xo, bit lk,
  538. dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
  539. : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> {
  540. bits<7> BIBO; // 2 bits of BI and 5 bits of BO.
  541. bits<3> CR;
  542. let BO = BIBO{4-0};
  543. let BI{0-1} = BIBO{5-6};
  544. let BI{2-4} = CR{0-2};
  545. let BH = 0;
  546. }
  547. class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo, bits<5> bi, bit lk,
  548. dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
  549. : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> {
  550. let BO = bo;
  551. let BI = bi;
  552. let BH = 0;
  553. }
  554. class XLForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  555. InstrItinClass itin>
  556. : I<opcode, OOL, IOL, asmstr, itin> {
  557. bits<3> BF;
  558. bits<3> BFA;
  559. let Inst{6-8} = BF;
  560. let Inst{9-10} = 0;
  561. let Inst{11-13} = BFA;
  562. let Inst{14-15} = 0;
  563. let Inst{16-20} = 0;
  564. let Inst{21-30} = xo;
  565. let Inst{31} = 0;
  566. }
  567. // 1.7.8 XFX-Form
  568. class XFXForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  569. InstrItinClass itin>
  570. : I<opcode, OOL, IOL, asmstr, itin> {
  571. bits<5> RT;
  572. bits<10> SPR;
  573. let Inst{6-10} = RT;
  574. let Inst{11} = SPR{4};
  575. let Inst{12} = SPR{3};
  576. let Inst{13} = SPR{2};
  577. let Inst{14} = SPR{1};
  578. let Inst{15} = SPR{0};
  579. let Inst{16} = SPR{9};
  580. let Inst{17} = SPR{8};
  581. let Inst{18} = SPR{7};
  582. let Inst{19} = SPR{6};
  583. let Inst{20} = SPR{5};
  584. let Inst{21-30} = xo;
  585. let Inst{31} = 0;
  586. }
  587. class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
  588. dag OOL, dag IOL, string asmstr, InstrItinClass itin>
  589. : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin> {
  590. let SPR = spr;
  591. }
  592. class XFXForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  593. InstrItinClass itin>
  594. : I<opcode, OOL, IOL, asmstr, itin> {
  595. bits<5> RT;
  596. let Inst{6-10} = RT;
  597. let Inst{11-20} = 0;
  598. let Inst{21-30} = xo;
  599. let Inst{31} = 0;
  600. }
  601. class XFXForm_5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  602. InstrItinClass itin>
  603. : I<opcode, OOL, IOL, asmstr, itin> {
  604. bits<8> FXM;
  605. bits<5> rS;
  606. let Inst{6-10} = rS;
  607. let Inst{11} = 0;
  608. let Inst{12-19} = FXM;
  609. let Inst{20} = 0;
  610. let Inst{21-30} = xo;
  611. let Inst{31} = 0;
  612. }
  613. class XFXForm_5a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  614. InstrItinClass itin>
  615. : I<opcode, OOL, IOL, asmstr, itin> {
  616. bits<5> ST;
  617. bits<8> FXM;
  618. let Inst{6-10} = ST;
  619. let Inst{11} = 1;
  620. let Inst{12-19} = FXM;
  621. let Inst{20} = 0;
  622. let Inst{21-30} = xo;
  623. let Inst{31} = 0;
  624. }
  625. class XFXForm_7<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  626. InstrItinClass itin>
  627. : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin>;
  628. class XFXForm_7_ext<bits<6> opcode, bits<10> xo, bits<10> spr,
  629. dag OOL, dag IOL, string asmstr, InstrItinClass itin>
  630. : XFXForm_7<opcode, xo, OOL, IOL, asmstr, itin> {
  631. let SPR = spr;
  632. }
  633. // XFL-Form - MTFSF
  634. // This is probably 1.7.9, but I don't have the reference that uses this
  635. // numbering scheme...
  636. class XFLForm<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr,
  637. InstrItinClass itin, list<dag>pattern>
  638. : I<opcode, OOL, IOL, asmstr, itin> {
  639. bits<8> FM;
  640. bits<5> rT;
  641. bit RC = 0; // set by isDOT
  642. let Pattern = pattern;
  643. let Inst{6} = 0;
  644. let Inst{7-14} = FM;
  645. let Inst{15} = 0;
  646. let Inst{16-20} = rT;
  647. let Inst{21-30} = xo;
  648. let Inst{31} = RC;
  649. }
  650. // 1.7.10 XS-Form - SRADI.
  651. class XSForm_1<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr,
  652. InstrItinClass itin, list<dag> pattern>
  653. : I<opcode, OOL, IOL, asmstr, itin> {
  654. bits<5> A;
  655. bits<5> RS;
  656. bits<6> SH;
  657. bit RC = 0; // set by isDOT
  658. let Pattern = pattern;
  659. let Inst{6-10} = RS;
  660. let Inst{11-15} = A;
  661. let Inst{16-20} = SH{4,3,2,1,0};
  662. let Inst{21-29} = xo;
  663. let Inst{30} = SH{5};
  664. let Inst{31} = RC;
  665. }
  666. // 1.7.11 XO-Form
  667. class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL, string asmstr,
  668. InstrItinClass itin, list<dag> pattern>
  669. : I<opcode, OOL, IOL, asmstr, itin> {
  670. bits<5> RT;
  671. bits<5> RA;
  672. bits<5> RB;
  673. let Pattern = pattern;
  674. bit RC = 0; // set by isDOT
  675. let Inst{6-10} = RT;
  676. let Inst{11-15} = RA;
  677. let Inst{16-20} = RB;
  678. let Inst{21} = oe;
  679. let Inst{22-30} = xo;
  680. let Inst{31} = RC;
  681. }
  682. class XOForm_3<bits<6> opcode, bits<9> xo, bit oe,
  683. dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern>
  684. : XOForm_1<opcode, xo, oe, OOL, IOL, asmstr, itin, pattern> {
  685. let RB = 0;
  686. }
  687. // 1.7.12 A-Form
  688. class AForm_1<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
  689. InstrItinClass itin, list<dag> pattern>
  690. : I<opcode, OOL, IOL, asmstr, itin> {
  691. bits<5> FRT;
  692. bits<5> FRA;
  693. bits<5> FRC;
  694. bits<5> FRB;
  695. let Pattern = pattern;
  696. bit RC = 0; // set by isDOT
  697. let Inst{6-10} = FRT;
  698. let Inst{11-15} = FRA;
  699. let Inst{16-20} = FRB;
  700. let Inst{21-25} = FRC;
  701. let Inst{26-30} = xo;
  702. let Inst{31} = RC;
  703. }
  704. class AForm_2<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
  705. InstrItinClass itin, list<dag> pattern>
  706. : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
  707. let FRC = 0;
  708. }
  709. class AForm_3<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
  710. InstrItinClass itin, list<dag> pattern>
  711. : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> {
  712. let FRB = 0;
  713. }
  714. class AForm_4<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr,
  715. InstrItinClass itin, list<dag> pattern>
  716. : I<opcode, OOL, IOL, asmstr, itin> {
  717. bits<5> RT;
  718. bits<5> RA;
  719. bits<5> RB;
  720. bits<5> COND;
  721. let Pattern = pattern;
  722. let Inst{6-10} = RT;
  723. let Inst{11-15} = RA;
  724. let Inst{16-20} = RB;
  725. let Inst{21-25} = COND;
  726. let Inst{26-30} = xo;
  727. let Inst{31} = 0;
  728. }
  729. // 1.7.13 M-Form
  730. class MForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr,
  731. InstrItinClass itin, list<dag> pattern>
  732. : I<opcode, OOL, IOL, asmstr, itin> {
  733. bits<5> RA;
  734. bits<5> RS;
  735. bits<5> RB;
  736. bits<5> MB;
  737. bits<5> ME;
  738. let Pattern = pattern;
  739. bit RC = 0; // set by isDOT
  740. let Inst{6-10} = RS;
  741. let Inst{11-15} = RA;
  742. let Inst{16-20} = RB;
  743. let Inst{21-25} = MB;
  744. let Inst{26-30} = ME;
  745. let Inst{31} = RC;
  746. }
  747. class MForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr,
  748. InstrItinClass itin, list<dag> pattern>
  749. : MForm_1<opcode, OOL, IOL, asmstr, itin, pattern> {
  750. }
  751. // 1.7.14 MD-Form
  752. class MDForm_1<bits<6> opcode, bits<3> xo, dag OOL, dag IOL, string asmstr,
  753. InstrItinClass itin, list<dag> pattern>
  754. : I<opcode, OOL, IOL, asmstr, itin> {
  755. bits<5> RA;
  756. bits<5> RS;
  757. bits<6> SH;
  758. bits<6> MBE;
  759. let Pattern = pattern;
  760. bit RC = 0; // set by isDOT
  761. let Inst{6-10} = RS;
  762. let Inst{11-15} = RA;
  763. let Inst{16-20} = SH{4,3,2,1,0};
  764. let Inst{21-26} = MBE{4,3,2,1,0,5};
  765. let Inst{27-29} = xo;
  766. let Inst{30} = SH{5};
  767. let Inst{31} = RC;
  768. }
  769. class MDSForm_1<bits<6> opcode, bits<4> xo, dag OOL, dag IOL, string asmstr,
  770. InstrItinClass itin, list<dag> pattern>
  771. : I<opcode, OOL, IOL, asmstr, itin> {
  772. bits<5> RA;
  773. bits<5> RS;
  774. bits<5> RB;
  775. bits<6> MBE;
  776. let Pattern = pattern;
  777. bit RC = 0; // set by isDOT
  778. let Inst{6-10} = RS;
  779. let Inst{11-15} = RA;
  780. let Inst{16-20} = RB;
  781. let Inst{21-26} = MBE{4,3,2,1,0,5};
  782. let Inst{27-30} = xo;
  783. let Inst{31} = RC;
  784. }
  785. // E-1 VA-Form
  786. // VAForm_1 - DACB ordering.
  787. class VAForm_1<bits<6> xo, dag OOL, dag IOL, string asmstr,
  788. InstrItinClass itin, list<dag> pattern>
  789. : I<4, OOL, IOL, asmstr, itin> {
  790. bits<5> VD;
  791. bits<5> VA;
  792. bits<5> VC;
  793. bits<5> VB;
  794. let Pattern = pattern;
  795. let Inst{6-10} = VD;
  796. let Inst{11-15} = VA;
  797. let Inst{16-20} = VB;
  798. let Inst{21-25} = VC;
  799. let Inst{26-31} = xo;
  800. }
  801. // VAForm_1a - DABC ordering.
  802. class VAForm_1a<bits<6> xo, dag OOL, dag IOL, string asmstr,
  803. InstrItinClass itin, list<dag> pattern>
  804. : I<4, OOL, IOL, asmstr, itin> {
  805. bits<5> VD;
  806. bits<5> VA;
  807. bits<5> VB;
  808. bits<5> VC;
  809. let Pattern = pattern;
  810. let Inst{6-10} = VD;
  811. let Inst{11-15} = VA;
  812. let Inst{16-20} = VB;
  813. let Inst{21-25} = VC;
  814. let Inst{26-31} = xo;
  815. }
  816. class VAForm_2<bits<6> xo, dag OOL, dag IOL, string asmstr,
  817. InstrItinClass itin, list<dag> pattern>
  818. : I<4, OOL, IOL, asmstr, itin> {
  819. bits<5> VD;
  820. bits<5> VA;
  821. bits<5> VB;
  822. bits<4> SH;
  823. let Pattern = pattern;
  824. let Inst{6-10} = VD;
  825. let Inst{11-15} = VA;
  826. let Inst{16-20} = VB;
  827. let Inst{21} = 0;
  828. let Inst{22-25} = SH;
  829. let Inst{26-31} = xo;
  830. }
  831. // E-2 VX-Form
  832. class VXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr,
  833. InstrItinClass itin, list<dag> pattern>
  834. : I<4, OOL, IOL, asmstr, itin> {
  835. bits<5> VD;
  836. bits<5> VA;
  837. bits<5> VB;
  838. let Pattern = pattern;
  839. let Inst{6-10} = VD;
  840. let Inst{11-15} = VA;
  841. let Inst{16-20} = VB;
  842. let Inst{21-31} = xo;
  843. }
  844. class VXForm_setzero<bits<11> xo, dag OOL, dag IOL, string asmstr,
  845. InstrItinClass itin, list<dag> pattern>
  846. : VXForm_1<xo, OOL, IOL, asmstr, itin, pattern> {
  847. let VA = VD;
  848. let VB = VD;
  849. }
  850. class VXForm_2<bits<11> xo, dag OOL, dag IOL, string asmstr,
  851. InstrItinClass itin, list<dag> pattern>
  852. : I<4, OOL, IOL, asmstr, itin> {
  853. bits<5> VD;
  854. bits<5> VB;
  855. let Pattern = pattern;
  856. let Inst{6-10} = VD;
  857. let Inst{11-15} = 0;
  858. let Inst{16-20} = VB;
  859. let Inst{21-31} = xo;
  860. }
  861. class VXForm_3<bits<11> xo, dag OOL, dag IOL, string asmstr,
  862. InstrItinClass itin, list<dag> pattern>
  863. : I<4, OOL, IOL, asmstr, itin> {
  864. bits<5> VD;
  865. bits<5> IMM;
  866. let Pattern = pattern;
  867. let Inst{6-10} = VD;
  868. let Inst{11-15} = IMM;
  869. let Inst{16-20} = 0;
  870. let Inst{21-31} = xo;
  871. }
  872. /// VXForm_4 - VX instructions with "VD,0,0" register fields, like mfvscr.
  873. class VXForm_4<bits<11> xo, dag OOL, dag IOL, string asmstr,
  874. InstrItinClass itin, list<dag> pattern>
  875. : I<4, OOL, IOL, asmstr, itin> {
  876. bits<5> VD;
  877. let Pattern = pattern;
  878. let Inst{6-10} = VD;
  879. let Inst{11-15} = 0;
  880. let Inst{16-20} = 0;
  881. let Inst{21-31} = xo;
  882. }
  883. /// VXForm_5 - VX instructions with "0,0,VB" register fields, like mtvscr.
  884. class VXForm_5<bits<11> xo, dag OOL, dag IOL, string asmstr,
  885. InstrItinClass itin, list<dag> pattern>
  886. : I<4, OOL, IOL, asmstr, itin> {
  887. bits<5> VB;
  888. let Pattern = pattern;
  889. let Inst{6-10} = 0;
  890. let Inst{11-15} = 0;
  891. let Inst{16-20} = VB;
  892. let Inst{21-31} = xo;
  893. }
  894. // E-4 VXR-Form
  895. class VXRForm_1<bits<10> xo, dag OOL, dag IOL, string asmstr,
  896. InstrItinClass itin, list<dag> pattern>
  897. : I<4, OOL, IOL, asmstr, itin> {
  898. bits<5> VD;
  899. bits<5> VA;
  900. bits<5> VB;
  901. bit RC = 0;
  902. let Pattern = pattern;
  903. let Inst{6-10} = VD;
  904. let Inst{11-15} = VA;
  905. let Inst{16-20} = VB;
  906. let Inst{21} = RC;
  907. let Inst{22-31} = xo;
  908. }
  909. //===----------------------------------------------------------------------===//
  910. class Pseudo<dag OOL, dag IOL, string asmstr, list<dag> pattern>
  911. : I<0, OOL, IOL, asmstr, NoItinerary> {
  912. let isCodeGenOnly = 1;
  913. let PPC64 = 0;
  914. let Pattern = pattern;
  915. let Inst{31-0} = 0;
  916. }