/3rd_party/llvm/utils/TableGen/CodeGenTarget.h

https://code.google.com/p/softart/ · C++ Header · 211 lines · 119 code · 39 blank · 53 comment · 11 complexity · c80d6a0775cadc83da54b952d8a9f7d8 MD5 · raw file

  1. //===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
  2. //
  3. // The LLVM Compiler Infrastructure
  4. //
  5. // This file is distributed under the University of Illinois Open Source
  6. // License. See LICENSE.TXT for details.
  7. //
  8. //===----------------------------------------------------------------------===//
  9. //
  10. // This file defines wrappers for the Target class and related global
  11. // functionality. This makes it easier to access the data and provides a single
  12. // place that needs to check it for validity. All of these classes abort
  13. // on error conditions.
  14. //
  15. //===----------------------------------------------------------------------===//
  16. #ifndef CODEGEN_TARGET_H
  17. #define CODEGEN_TARGET_H
  18. #include "CodeGenInstruction.h"
  19. #include "CodeGenRegisters.h"
  20. #include "llvm/Support/raw_ostream.h"
  21. #include "llvm/TableGen/Record.h"
  22. #include <algorithm>
  23. namespace llvm {
  24. struct CodeGenRegister;
  25. class CodeGenSchedModels;
  26. class CodeGenTarget;
  27. // SelectionDAG node properties.
  28. // SDNPMemOperand: indicates that a node touches memory and therefore must
  29. // have an associated memory operand that describes the access.
  30. enum SDNP {
  31. SDNPCommutative,
  32. SDNPAssociative,
  33. SDNPHasChain,
  34. SDNPOutGlue,
  35. SDNPInGlue,
  36. SDNPOptInGlue,
  37. SDNPMayLoad,
  38. SDNPMayStore,
  39. SDNPSideEffect,
  40. SDNPMemOperand,
  41. SDNPVariadic,
  42. SDNPWantRoot,
  43. SDNPWantParent
  44. };
  45. /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
  46. /// record corresponds to.
  47. MVT::SimpleValueType getValueType(Record *Rec);
  48. std::string getName(MVT::SimpleValueType T);
  49. std::string getEnumName(MVT::SimpleValueType T);
  50. /// getQualifiedName - Return the name of the specified record, with a
  51. /// namespace qualifier if the record contains one.
  52. std::string getQualifiedName(const Record *R);
  53. /// CodeGenTarget - This class corresponds to the Target class in the .td files.
  54. ///
  55. class CodeGenTarget {
  56. RecordKeeper &Records;
  57. Record *TargetRec;
  58. mutable DenseMap<const Record*, CodeGenInstruction*> Instructions;
  59. mutable CodeGenRegBank *RegBank;
  60. mutable std::vector<Record*> RegAltNameIndices;
  61. mutable SmallVector<MVT::SimpleValueType, 8> LegalValueTypes;
  62. void ReadRegAltNameIndices() const;
  63. void ReadInstructions() const;
  64. void ReadLegalValueTypes() const;
  65. mutable CodeGenSchedModels *SchedModels;
  66. mutable std::vector<const CodeGenInstruction*> InstrsByEnum;
  67. public:
  68. CodeGenTarget(RecordKeeper &Records);
  69. ~CodeGenTarget();
  70. Record *getTargetRecord() const { return TargetRec; }
  71. const std::string &getName() const;
  72. /// getInstNamespace - Return the target-specific instruction namespace.
  73. ///
  74. std::string getInstNamespace() const;
  75. /// getInstructionSet - Return the InstructionSet object.
  76. ///
  77. Record *getInstructionSet() const;
  78. /// getAsmParser - Return the AssemblyParser definition for this target.
  79. ///
  80. Record *getAsmParser() const;
  81. /// getAsmParserVariant - Return the AssmblyParserVariant definition for
  82. /// this target.
  83. ///
  84. Record *getAsmParserVariant(unsigned i) const;
  85. /// getAsmParserVariantCount - Return the AssmblyParserVariant definition
  86. /// available for this target.
  87. ///
  88. unsigned getAsmParserVariantCount() const;
  89. /// getAsmWriter - Return the AssemblyWriter definition for this target.
  90. ///
  91. Record *getAsmWriter() const;
  92. /// getRegBank - Return the register bank description.
  93. CodeGenRegBank &getRegBank() const;
  94. /// getRegisterByName - If there is a register with the specific AsmName,
  95. /// return it.
  96. const CodeGenRegister *getRegisterByName(StringRef Name) const;
  97. const std::vector<Record*> &getRegAltNameIndices() const {
  98. if (RegAltNameIndices.empty()) ReadRegAltNameIndices();
  99. return RegAltNameIndices;
  100. }
  101. const CodeGenRegisterClass &getRegisterClass(Record *R) const {
  102. return *getRegBank().getRegClass(R);
  103. }
  104. /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
  105. /// specified physical register.
  106. std::vector<MVT::SimpleValueType> getRegisterVTs(Record *R) const;
  107. ArrayRef<MVT::SimpleValueType> getLegalValueTypes() const {
  108. if (LegalValueTypes.empty()) ReadLegalValueTypes();
  109. return LegalValueTypes;
  110. }
  111. /// isLegalValueType - Return true if the specified value type is natively
  112. /// supported by the target (i.e. there are registers that directly hold it).
  113. bool isLegalValueType(MVT::SimpleValueType VT) const {
  114. ArrayRef<MVT::SimpleValueType> LegalVTs = getLegalValueTypes();
  115. for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
  116. if (LegalVTs[i] == VT) return true;
  117. return false;
  118. }
  119. CodeGenSchedModels &getSchedModels() const;
  120. private:
  121. DenseMap<const Record*, CodeGenInstruction*> &getInstructions() const {
  122. if (Instructions.empty()) ReadInstructions();
  123. return Instructions;
  124. }
  125. public:
  126. CodeGenInstruction &getInstruction(const Record *InstRec) const {
  127. if (Instructions.empty()) ReadInstructions();
  128. DenseMap<const Record*, CodeGenInstruction*>::iterator I =
  129. Instructions.find(InstRec);
  130. assert(I != Instructions.end() && "Not an instruction");
  131. return *I->second;
  132. }
  133. /// getInstructionsByEnumValue - Return all of the instructions defined by the
  134. /// target, ordered by their enum value.
  135. const std::vector<const CodeGenInstruction*> &
  136. getInstructionsByEnumValue() const {
  137. if (InstrsByEnum.empty()) ComputeInstrsByEnum();
  138. return InstrsByEnum;
  139. }
  140. typedef std::vector<const CodeGenInstruction*>::const_iterator inst_iterator;
  141. inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();}
  142. inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); }
  143. /// isLittleEndianEncoding - are instruction bit patterns defined as [0..n]?
  144. ///
  145. bool isLittleEndianEncoding() const;
  146. /// guessInstructionProperties - should we just guess unset instruction
  147. /// properties?
  148. bool guessInstructionProperties() const;
  149. private:
  150. void ComputeInstrsByEnum() const;
  151. };
  152. /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
  153. /// tablegen class in TargetSelectionDAG.td
  154. class ComplexPattern {
  155. MVT::SimpleValueType Ty;
  156. unsigned NumOperands;
  157. std::string SelectFunc;
  158. std::vector<Record*> RootNodes;
  159. unsigned Properties; // Node properties
  160. public:
  161. ComplexPattern() : NumOperands(0) {}
  162. ComplexPattern(Record *R);
  163. MVT::SimpleValueType getValueType() const { return Ty; }
  164. unsigned getNumOperands() const { return NumOperands; }
  165. const std::string &getSelectFunc() const { return SelectFunc; }
  166. const std::vector<Record*> &getRootNodes() const {
  167. return RootNodes;
  168. }
  169. bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
  170. };
  171. } // End llvm namespace
  172. #endif