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/src/main/inc/9S12XDP512_XGATE_flags.h

https://gitlab.com/libreems-suite/libreems-firmware
C Header | 317 lines | 189 code | 23 blank | 105 comment | 0 complexity | dc11e19c84c900953aefdafd5e358ea9 MD5 | raw file
    

  1. /* LibreEMS - the open source engine management system
    2. 

  2.  *
    3. 

  3.  * Copyright 2014 David J. Andruczyk
    4. 

  4.  *
    5. 

  5.  * This file is part of the LibreEMS project.
    6. 

  6.  *
    7. 

  7.  * LibreEMS software is free software: you can redistribute it and/or modify
    8. 

  8.  * it under the terms of the GNU General Public License as published by
    9. 

  9.  * the Free Software Foundation, either version 3 of the License, or
    10. 

  10.  * (at your option) any later version.
    11. 

  11.  *
    12. 

  12.  * LibreEMS software is distributed in the hope that it will be useful,
    13. 

  13.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    14. 

  14.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    15. 

  15.  * GNU General Public License for more details.
    16. 

  16.  *
    17. 

  17.  * You should have received a copy of the GNU General Public License
    18. 

  18.  * along with any LibreEMS software.  If not, see http://www.gnu.org/licenses/
    19. 

  19.  *
    20. 

  20.  *
    21. 

  21.  * Thank you for choosing LibreEMS to run your engine!
    22. 

  22.  */
    23. 

  23. 

  24. 

  25. /** @file
    26. 

  26.  *
    27. 

  27.  * @ingroup allHeaders
    28. 

  28.  * @ingroup globalHeaders
    29. 

  29.  *
    30. 

  30.  * @brief MC9S12XDP512 flag definitions
    31. 

  31.  *
    32. 

  32.  * This is the flag header for the FreeScale MC9S12XDP512 MCU. It contains
    33. 

  33.  * a unified set of masks to be used with configuration registers.
    34. 

  34.  *
    35. 

  35.  * These are taken from MC9S12XDP512V2.pdf Appendix G, note some are shared across multiple registers.
    36. 

  36.  */
    37. 

  37. 

  38. 

  39. /* see if we've seen this, if not, mark seen and process */
    40. 

  40. #ifndef FILE_9S12XDP512_XGATE_FLAGS_H_SEEN
    41. 

  41. #define FILE_9S12XDP512_XGATE_FLAGS_H_SEEN
    42. 

  42. 

  43. 

  44. // REFERENCE DOC: http://cache.freescale.com/files/microcontrollers/doc/data_sheet/MC9S12XDP512RMV2.pdf
    45. 

  45. //
    46. 

  46. 

  47. /* -------------------------------------------------------------------------
    48. 

  48.  *  XGATE CO-PROCESSOR REGISTERS (XGATE)
    49. 

  49.  * -------------------------------------------------------------------------
    50. 

  50.  */
    51. 

  51. 

  52. // XGMCTL (XGATE Control Register) 6.3.1.1, Table 6-1
    53. 

  53. #define XGEM          BIT15_16 // Controls write access to XGE Bit, see Table 6-1 in REFERNCE DOC
    54. 

  54. #define XGFRZM        BIT14_16 // Contols write access to the XGFRZ bit
    55. 

  55. #define XGDBGM        BIT13_16 // Controls write access to the XGDBG bit
    56. 

  56. #define XGSSM         BIT12_16 // Controls write access to the XGSS bit
    57. 

  57. #define XGFACTM       BIT11_16 // Controls write access to the XGFACT bit
    58. 

  58. //#define 0           BIT10_16 // Reserved
    59. 

  59. #define XGSWEIFM      BIT9_16  // Controls write access to the XGSWEIF bit
    60. 

  60. #define XGIEM         BIT8_16  // Controls write access to the XGIE bit
    61. 

  61. #define XGE           BIT7_16  // XGATE Module enable bit, 0 = disabled, 
    62. 

  62.                                // 1 = enabled
    63. 

  63. #define XGFRZ         BIT6_16  // Halt XGATE in Freeze Mode, 0 = normal 
    64. 

  64.                                // in freeze, 1 stop in freeze
    65. 

  65. #define XGDBG         BIT5_16  // XGATE Debug Mode, 0 = not in debug mode, 
    66. 

  66.                                // 1 = Enter debug mode
    67. 

  67. #define XGSS          BIT4_16  // XGATE Single Step 
    68. 

  68. #define XGFACT        BIT3_16  // Fake XGATE Activity, 0 = Flag activity 
    69. 

  69.                                // only if not idle, 1 = flag always
    70. 

  70. //#define 0           BIT2_16  // Reserved
    71. 

  71. #define XGSWEIF       BIT1_16  // XGATE Software Error Interrupt Flag
    72. 

  72. #define XGIE          BIT0_16  // XGATE Interrupt Enable. 0 = disable all
    73. 

  73.                                // XG interrups, 1 = enable all XGATE interrupts
    74. 

  74. 

  75. // XGCHID (XGATE Channel ID Register) 6.3.1.2, Table 6-2
    76. 

  76. //#define 0           BIT7  // 
    77. 

  77. #define XGCHID6       BIT6  // XGCHID[6:0] ID of the currently active channel
    78. 

  78. #define XGCHID5       BIT5  // 
    79. 

  79. #define XGCHID4       BIT4  // 
    80. 

  80. #define XGCHID3       BIT3  // 
    81. 

  81. #define XGCHID2       BIT2  // 
    82. 

  82. #define XGCHID1       BIT1  // 
    83. 

  83. #define XGCHID0       BIT0  // 
    84. 

  84. 

  85. // XGVBR (XGATE Vector Base Address Register) 6.3.1.3, Table 6-3
    86. 

  86. #define XGVBR15       BIT15_16 // XBVBR[15:1] Vector Base Adress, holds 
    87. 

  87. #define XGVBR14       BIT14_16 // the start address of the vector block 
    88. 

  88. #define XGVBR13       BIT13_16 // in the XGATE Memory map
    89. 

  89. #define XGVBR12       BIT12_16 // 
    90. 

  90. #define XGVBR11       BIT11_16 // 
    91. 

  91. #define XGVBR10       BIT10_16 // 
    92. 

  92. #define XGVBR9        BIT9_16 // 
    93. 

  93. #define XGVBR8        BIT8_16 // 
    94. 

  94. #define XGVBR7        BIT7_16 // 
    95. 

  95. #define XGVBR6        BIT6_16 // 
    96. 

  96. #define XGVBR5        BIT5_16 // 
    97. 

  97. #define XGVBR4        BIT4_16 // 
    98. 

  98. #define XGVBR3        BIT3_16 // 
    99. 

  99. #define XGVBR2        BIT2_16 // 
    100. 

  100. #define XGVBR1        BIT1_16 // 
    101. 

  101. //#define 0           BIT0_16  // Reserved
    102. 

  102. 

  103. // XGIF_7F_70 (XGATE Channel Interrupt Flag Register (70-7F) 6.3.1.4, Table 6-4
    104. 

  104. //#define 0           BIT15_16 // Reserved
    105. 

  105. //#define 0           BIT14_16 // Reserved
    106. 

  106. //#define 0           BIT13_16 // Reserved
    107. 

  107. //#define 0           BIT12_16 // Reserved
    108. 

  108. //#define 0           BIT11_16 // Reserved
    109. 

  109. //#define 0           BIT10_16 // Reserved
    110. 

  110. //#define 0           BIT9_16  // Reserved
    111. 

  111. #define XGIF_78       BIT8_16 // The Interrupt vector provides access to the
    112. 

  112. #define XGIF_77       BIT7_16 // interrupt flags bits of each channel. Each
    113. 

  113. #define XGIF_76       BIT6_16 // flag may be cleared by writing a "1" to its
    114. 

  114. #define XGIF_75       BIT5_16 // location
    115. 

  115. #define XGIF_74       BIT4_16 //
    116. 

  116. #define XGIF_73       BIT3_16 //
    117. 

  117. #define XGIF_72       BIT2_16 //
    118. 

  118. #define XGIF_71       BIT1_16 //
    119. 

  119. #define XGIF_70       BIT0_16 //
    120. 

  120. // XGIF_6F_60 (XGATE Channel Interrupt Flag Register (60-6F) 6.3.1.4, Table 6-4
    121. 

  121. #define XGIF_6F       BIT15_16 //
    122. 

  122. #define XGIF_6E       BIT14_16 //
    123. 

  123. #define XGIF_6D       BIT13_16 //
    124. 

  124. #define XGIF_6C       BIT12_16 //
    125. 

  125. #define XGIF_6B       BIT11_16 //
    126. 

  126. #define XGIF_6A       BIT10_16 //
    127. 

  127. #define XGIF_69       BIT9_16 //
    128. 

  128. #define XGIF_68       BIT8_16 //
    129. 

  129. #define XGIF_67       BIT7_16 //
    130. 

  130. #define XGIF_66       BIT6_16 //
    131. 

  131. #define XGIF_65       BIT5_16 //
    132. 

  132. #define XGIF_64       BIT4_16 //
    133. 

  133. #define XGIF_63       BIT3_16 //
    134. 

  134. #define XGIF_62       BIT2_16 //
    135. 

  135. #define XGIF_61       BIT1_16 //
    136. 

  136. #define XGIF_60       BIT0_16 //
    137. 

  137. // XGIF_5F_50 (XGATE Channel Interrupt Flag Register (50-5F) 6.3.1.4, Table 6-4
    138. 

  138. #define XGIF_5F       BIT15_16 //
    139. 

  139. #define XGIF_5E       BIT14_16 //
    140. 

  140. #define XGIF_5D       BIT13_16 //
    141. 

  141. #define XGIF_5C       BIT12_16 //
    142. 

  142. #define XGIF_5B       BIT11_16 //
    143. 

  143. #define XGIF_5A       BIT10_16 //
    144. 

  144. #define XGIF_59       BIT9_16 //
    145. 

  145. #define XGIF_58       BIT8_16 //
    146. 

  146. #define XGIF_57       BIT7_16 //
    147. 

  147. #define XGIF_56       BIT6_16 //
    148. 

  148. #define XGIF_55       BIT5_16 //
    149. 

  149. #define XGIF_54       BIT4_16 //
    150. 

  150. #define XGIF_53       BIT3_16 //
    151. 

  151. #define XGIF_52       BIT2_16 //
    152. 

  152. #define XGIF_51       BIT1_16 //
    153. 

  153. #define XGIF_50       BIT0_16 //
    154. 

  154. // XGIF_4F_40 (XGATE Channel Interrupt Flag Register (40-4F) 6.3.1.4, Table 6-4
    155. 

  155. #define XGIF_4F       BIT15_16 //
    156. 

  156. #define XGIF_4E       BIT14_16 //
    157. 

  157. #define XGIF_4D       BIT13_16 //
    158. 

  158. #define XGIF_4C       BIT12_16 //
    159. 

  159. #define XGIF_4B       BIT11_16 //
    160. 

  160. #define XGIF_4A       BIT10_16 //
    161. 

  161. #define XGIF_49       BIT9_16 //
    162. 

  162. #define XGIF_48       BIT8_16 //
    163. 

  163. #define XGIF_47       BIT7_16 //
    164. 

  164. #define XGIF_46       BIT6_16 //
    165. 

  165. #define XGIF_45       BIT5_16 //
    166. 

  166. #define XGIF_44       BIT4_16 //
    167. 

  167. #define XGIF_43       BIT3_16 //
    168. 

  168. #define XGIF_42       BIT2_16 //
    169. 

  169. #define XGIF_41       BIT1_16 //
    170. 

  170. #define XGIF_40       BIT0_16 //
    171. 

  171. // XGIF_3F_30 (XGATE Channel Interrupt Flag Register (30-3F) 6.3.1.4, Table 6-4
    172. 

  172. #define XGIF_3F       BIT15_16 //
    173. 

  173. #define XGIF_3E       BIT14_16 //
    174. 

  174. #define XGIF_3D       BIT13_16 //
    175. 

  175. #define XGIF_3C       BIT12_16 //
    176. 

  176. #define XGIF_3B       BIT11_16 //
    177. 

  177. #define XGIF_3A       BIT10_16 //
    178. 

  178. #define XGIF_39       BIT9_16 //
    179. 

  179. #define XGIF_38       BIT8_16 //
    180. 

  180. #define XGIF_37       BIT7_16 //
    181. 

  181. #define XGIF_36       BIT6_16 //
    182. 

  182. #define XGIF_35       BIT5_16 //
    183. 

  183. #define XGIF_34       BIT4_16 //
    184. 

  184. #define XGIF_33       BIT3_16 //
    185. 

  185. #define XGIF_32       BIT2_16 //
    186. 

  186. #define XGIF_31       BIT1_16 //
    187. 

  187. #define XGIF_30       BIT0_16 //
    188. 

  188. // XGIF_2F_20 (XGATE Channel Interrupt Flag Register (20-2F) 6.3.1.4, Table 6-4
    189. 

  189. #define XGIF_2F       BIT15_16 //
    190. 

  190. #define XGIF_2E       BIT14_16 //
    191. 

  191. #define XGIF_2D       BIT13_16 //
    192. 

  192. #define XGIF_2C       BIT12_16 //
    193. 

  193. #define XGIF_2B       BIT11_16 //
    194. 

  194. #define XGIF_2A       BIT10_16 //
    195. 

  195. #define XGIF_29       BIT9_16 //
    196. 

  196. #define XGIF_28       BIT8_16 //
    197. 

  197. #define XGIF_27       BIT7_16 //
    198. 

  198. #define XGIF_26       BIT6_16 //
    199. 

  199. #define XGIF_25       BIT5_16 //
    200. 

  200. #define XGIF_24       BIT4_16 //
    201. 

  201. #define XGIF_23       BIT3_16 //
    202. 

  202. #define XGIF_22       BIT2_16 //
    203. 

  203. #define XGIF_21       BIT1_16 //
    204. 

  204. #define XGIF_20       BIT0_16 //
    205. 

  205. // XGIF_1F_10 (XGATE Channel Interrupt Flag Register (10-1F) 6.3.1.4, Table 6-4
    206. 

  206. #define XGIF_1F       BIT15_16 //
    207. 

  207. #define XGIF_1E       BIT14_16 //
    208. 

  208. #define XGIF_1D       BIT13_16 //
    209. 

  209. #define XGIF_1C       BIT12_16 //
    210. 

  210. #define XGIF_1B       BIT11_16 //
    211. 

  211. #define XGIF_1A       BIT10_16 //
    212. 

  212. #define XGIF_19       BIT9_16 //
    213. 

  213. #define XGIF_18       BIT8_16 //
    214. 

  214. #define XGIF_17       BIT7_16 //
    215. 

  215. #define XGIF_16       BIT6_16 //
    216. 

  216. #define XGIF_15       BIT5_16 //
    217. 

  217. #define XGIF_14       BIT4_16 //
    218. 

  218. #define XGIF_13       BIT3_16 //
    219. 

  219. #define XGIF_12       BIT2_16 //
    220. 

  220. #define XGIF_11       BIT1_16 //
    221. 

  221. #define XGIF_10       BIT0_16 //
    222. 

  222. // XGIF_0F_00 (XGATE Channel Interrupt Flag Register (00-0F) 6.3.1.4, Table 6-4
    223. 

  223. #define XGIF_0F       BIT15_16 //
    224. 

  224. #define XGIF_0E       BIT14_16 //
    225. 

  225. #define XGIF_0D       BIT13_16 //
    226. 

  226. #define XGIF_0C       BIT12_16 //
    227. 

  227. #define XGIF_0B       BIT11_16 //
    228. 

  228. #define XGIF_0A       BIT10_16 //
    229. 

  229. #define XGIF_09       BIT9_16 //
    230. 

  230. //#define 0           BIT8_16 // Reserved
    231. 

  231. //#define 0           BIT7_16 // Reserved
    232. 

  232. //#define 0           BIT6_16 // Reserved
    233. 

  233. //#define 0           BIT5_16 // Reserved
    234. 

  234. //#define 0           BIT4_16 // Reserved
    235. 

  235. //#define 0           BIT3_16 // Reserved
    236. 

  236. //#define 0           BIT2_16 // Reserved
    237. 

  237. //#define 0           BIT1_16 // Reserved
    238. 

  238. //#define 0           BIT0_16 // Reserved
    239. 

  239. 

  240. // XGSWT (XGATE Software Trigger Register) 6.3.1.5, Table 6-5
    241. 

  241. #define XGSWTM7       BIT15_16 // Software Trigger Mask. These bits control 
    242. 

  242. #define XGSWTM6       BIT14_16 // write access to the XGSWT bits, Each XGSWT
    243. 

  243. #define XGSWTM5       BIT13_16 // bit can only be written if a "1" is written
    244. 

  244. #define XGSWTM4       BIT12_16 // to the corresponding XGSWTM bit in the SAME
    245. 

  245. #define XGSWTM3       BIT11_16 // ACCESS,  These always read as 0.
    246. 

  246. #define XGSWTM2       BIT10_16 //
    247. 

  247. #define XGSWTM1       BIT9_16 //
    248. 

  248. #define XGSWTM0       BIT8_16 //
    249. 

  249. #define XGSWT7        BIT7_16 // Software Trigger Bits.  These bits act as 
    250. 

  250. #define XGSWT6        BIT6_16 // interrupt flags that are able to trigger
    251. 

  251. #define XGSWT5        BIT5_16 // XGATE software channels, They can only be set
    252. 

  252. #define XGSWT4        BIT4_16 // and cleared bu software
    253. 

  253. #define XGSWT3        BIT3_16 // See table 6-5 in REFERENCE_DOC
    254. 

  254. #define XGSWT2        BIT2_16 //
    255. 

  255. #define XGSWT1        BIT1_16 //
    256. 

  256. #define XGSWT0        BIT0_16 //
    257. 

  257. 

  258. // XGSEM (XGATE Semaphore Register) 6.3.1.6, Table 6-6
    259. 

  259. #define XGSEMM7       BIT15_16 // Semaphore Mask. These bits control access to
    260. 

  260. #define XGSEMM6       BIT14_16 // the XGSEM bits
    261. 

  261. #define XGSEMM5       BIT13_16 // 0 = disable write access to XGSEM bit in 
    262. 

  262. #define XGSEMM4       BIT12_16 // same bus cycle.
    263. 

  263. #define XGSEMM3       BIT11_16 // 1 = enable write access to XGSEM bit in
    264. 

  264. #define XGSEMM2       BIT10_16 // same bus cycle
    265. 

  265. #define XGSEMM1       BIT9_16 //
    266. 

  266. #define XGSEMM0       BIT8_16 //
    267. 

  267. #define XGSEM7        BIT7_16 // Semaphore Bits. These bits indicate whether
    268. 

  268. #define XGSEM6        BIT6_16 // a semaphore is locked by the S12X_CPU. A 
    269. 

  269. #define XGSEM5        BIT5_16 // semaphore can be attempted to be set by 
    270. 

  270. #define XGSEM4        BIT4_16 // writing a "1" to the XGSEM bit and to its 
    271. 

  271. #define XGSEM3        BIT3_16 // corresponding MASK bit in the same access.
    272. 

  272. #define XGSEM2        BIT2_16 // Only unlocked semaphores can be set. Can be 
    273. 

  273. #define XGSEM1        BIT1_16 // be cleared by writing a "0" to XGSEM and 1 to 
    274. 

  274. #define XGSEM0        BIT0_16 // corresponding XGSEMM bit.
    275. 

  275. 

  276. // XGCCR (XGATE Condition Code Register) 6.3.1.7, Table 6-7
    277. 

  277. //#define 0           BIT7 // Reserved
    278. 

  278. //#define 0           BIT6 // Reserved
    279. 

  279. //#define 0           BIT5 // Reserved
    280. 

  280. //#define 0           BIT4 // Reserved
    281. 

  281. #define XGN           BIT3 // Sign Flag
    282. 

  282. #define XGZ           BIT2 // Zero Flag
    283. 

  283. #define XGV           BIT1 // Overflow Flag
    284. 

  284. #define XGC           BIT0 // Carry Flag
    285. 

  285. 

  286. // XGPC (XGATE Program Counter register) 6.3.1.8, Table 6-8
    287. 

  287. // This is a 16 bit register (Program Counter)
    288. 

  288. 

  289. // XGR1 (XGATE Register 1) 6.3.1.9 Table 6-9
    290. 

  290. // This is a 16 bit register 
    291. 

  291. // It is preloaded with  the initial variable pointer of the channel's
    292. 

  292. // service request vector (see 6-20 in REFERENCE DOC)
    293. 

  293. 

  294. // XGR2 (XGATE Register 2) 6.3.1.10, Tabele 6-10
    295. 

  295. // This is a 16 bit register 
    296. 

  296. 

  297. // XGR3 (XGATE Register 3) 6.3.1.11, Tabele 6-11
    298. 

  298. // This is a 16 bit register 
    299. 

  299. 

  300. // XGR4 (XGATE Register 4) 6.3.1.12, Tabele 6-12
    301. 

  301. // This is a 16 bit register 
    302. 

  302. 

  303. // XGR5 (XGATE Register 5) 6.3.1.13, Tabele 6-13
    304. 

  304. // This is a 16 bit register 
    305. 

  305. 

  306. // XGR6 (XGATE Register 6) 6.3.1.14, Tabele 6-14
    307. 

  307. // This is a 16 bit register 
    308. 

  308. 

  309. // XGR7 (XGATE Register 7) 6.3.1.15, Tabele 6-15
    310. 

  310. // This is a 16 bit register 
    311. 

  311. 

  312. #else
    313. 

  313.   /* let us know if we are being untidy with headers */
    314. 

  314.   #warning "Header file 9S12XDP512_XGATE_FLAGS_H seen before, sort it out!"
    315. 

  315. /* end of the wrapper ifdef from the very top */
    316. 

  316. #endif
    317. 

  317. /* ex: set tabstop=2 shiftwidth=2 expandtab softtabstop=2: */
    318. 

  318.