/thirdparty/breakpad/google_breakpad/processor/stack_frame_cpu.h

http://github.com/tomahawk-player/tomahawk · C Header · 243 lines · 115 code · 31 blank · 97 comment · 0 complexity · 2047cabd0093c375e47b087580bdcce9 MD5 · raw file

  1. // -*- mode: c++ -*-
  2. // Copyright (c) 2010 Google Inc.
  3. // All rights reserved.
  4. //
  5. // Redistribution and use in source and binary forms, with or without
  6. // modification, are permitted provided that the following conditions are
  7. // met:
  8. //
  9. // * Redistributions of source code must retain the above copyright
  10. // notice, this list of conditions and the following disclaimer.
  11. // * Redistributions in binary form must reproduce the above
  12. // copyright notice, this list of conditions and the following disclaimer
  13. // in the documentation and/or other materials provided with the
  14. // distribution.
  15. // * Neither the name of Google Inc. nor the names of its
  16. // contributors may be used to endorse or promote products derived from
  17. // this software without specific prior written permission.
  18. //
  19. // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  20. // "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  21. // LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  22. // A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  23. // OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  24. // SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  25. // LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  26. // DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  27. // THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  28. // (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  29. // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  30. // stack_frame_cpu.h: CPU-specific StackFrame extensions.
  31. //
  32. // These types extend the StackFrame structure to carry CPU-specific register
  33. // state. They are defined in this header instead of stack_frame.h to
  34. // avoid the need to include minidump_format.h when only the generic
  35. // StackFrame type is needed.
  36. //
  37. // Author: Mark Mentovai
  38. #ifndef GOOGLE_BREAKPAD_PROCESSOR_STACK_FRAME_CPU_H__
  39. #define GOOGLE_BREAKPAD_PROCESSOR_STACK_FRAME_CPU_H__
  40. #include "google_breakpad/common/minidump_format.h"
  41. #include "google_breakpad/processor/stack_frame.h"
  42. namespace google_breakpad {
  43. struct WindowsFrameInfo;
  44. class CFIFrameInfo;
  45. struct StackFrameX86 : public StackFrame {
  46. // ContextValidity has one entry for each relevant hardware pointer
  47. // register (%eip and %esp) and one entry for each general-purpose
  48. // register. It's worthwhile having validity flags for caller-saves
  49. // registers: they are valid in the youngest frame, and such a frame
  50. // might save a callee-saves register in a caller-saves register, but
  51. // SimpleCFIWalker won't touch registers unless they're marked as valid.
  52. enum ContextValidity {
  53. CONTEXT_VALID_NONE = 0,
  54. CONTEXT_VALID_EIP = 1 << 0,
  55. CONTEXT_VALID_ESP = 1 << 1,
  56. CONTEXT_VALID_EBP = 1 << 2,
  57. CONTEXT_VALID_EAX = 1 << 3,
  58. CONTEXT_VALID_EBX = 1 << 4,
  59. CONTEXT_VALID_ECX = 1 << 5,
  60. CONTEXT_VALID_EDX = 1 << 6,
  61. CONTEXT_VALID_ESI = 1 << 7,
  62. CONTEXT_VALID_EDI = 1 << 8,
  63. CONTEXT_VALID_ALL = -1
  64. };
  65. StackFrameX86()
  66. : context(),
  67. context_validity(CONTEXT_VALID_NONE),
  68. windows_frame_info(NULL),
  69. cfi_frame_info(NULL) {}
  70. ~StackFrameX86();
  71. // Register state. This is only fully valid for the topmost frame in a
  72. // stack. In other frames, the values of nonvolatile registers may be
  73. // present, given sufficient debugging information. Refer to
  74. // context_validity.
  75. MDRawContextX86 context;
  76. // context_validity is actually ContextValidity, but int is used because
  77. // the OR operator doesn't work well with enumerated types. This indicates
  78. // which fields in context are valid.
  79. int context_validity;
  80. // Any stack walking information we found describing this.instruction.
  81. // These may be NULL if there is no such information for that address.
  82. WindowsFrameInfo *windows_frame_info;
  83. CFIFrameInfo *cfi_frame_info;
  84. };
  85. struct StackFramePPC : public StackFrame {
  86. // ContextValidity should eventually contain entries for the validity of
  87. // other nonvolatile (callee-save) registers as in
  88. // StackFrameX86::ContextValidity, but the ppc stackwalker doesn't currently
  89. // locate registers other than the ones listed here.
  90. enum ContextValidity {
  91. CONTEXT_VALID_NONE = 0,
  92. CONTEXT_VALID_SRR0 = 1 << 0,
  93. CONTEXT_VALID_GPR1 = 1 << 1,
  94. CONTEXT_VALID_ALL = -1
  95. };
  96. StackFramePPC() : context(), context_validity(CONTEXT_VALID_NONE) {}
  97. // Register state. This is only fully valid for the topmost frame in a
  98. // stack. In other frames, the values of nonvolatile registers may be
  99. // present, given sufficient debugging information. Refer to
  100. // context_validity.
  101. MDRawContextPPC context;
  102. // context_validity is actually ContextValidity, but int is used because
  103. // the OR operator doesn't work well with enumerated types. This indicates
  104. // which fields in context are valid.
  105. int context_validity;
  106. };
  107. struct StackFrameAMD64 : public StackFrame {
  108. // ContextValidity has one entry for each register that we might be able
  109. // to recover.
  110. enum ContextValidity {
  111. CONTEXT_VALID_NONE = 0,
  112. CONTEXT_VALID_RAX = 1 << 0,
  113. CONTEXT_VALID_RDX = 1 << 1,
  114. CONTEXT_VALID_RCX = 1 << 2,
  115. CONTEXT_VALID_RBX = 1 << 3,
  116. CONTEXT_VALID_RSI = 1 << 4,
  117. CONTEXT_VALID_RDI = 1 << 5,
  118. CONTEXT_VALID_RBP = 1 << 6,
  119. CONTEXT_VALID_RSP = 1 << 7,
  120. CONTEXT_VALID_R8 = 1 << 8,
  121. CONTEXT_VALID_R9 = 1 << 9,
  122. CONTEXT_VALID_R10 = 1 << 10,
  123. CONTEXT_VALID_R11 = 1 << 11,
  124. CONTEXT_VALID_R12 = 1 << 12,
  125. CONTEXT_VALID_R13 = 1 << 13,
  126. CONTEXT_VALID_R14 = 1 << 14,
  127. CONTEXT_VALID_R15 = 1 << 15,
  128. CONTEXT_VALID_RIP = 1 << 16,
  129. CONTEXT_VALID_ALL = -1
  130. };
  131. StackFrameAMD64() : context(), context_validity(CONTEXT_VALID_NONE) {}
  132. // Register state. This is only fully valid for the topmost frame in a
  133. // stack. In other frames, which registers are present depends on what
  134. // debugging information we had available. Refer to context_validity.
  135. MDRawContextAMD64 context;
  136. // For each register in context whose value has been recovered, we set
  137. // the corresponding CONTEXT_VALID_ bit in context_validity.
  138. //
  139. // context_validity's type should actually be ContextValidity, but
  140. // we use int instead because the bitwise inclusive or operator
  141. // yields an int when applied to enum values, and C++ doesn't
  142. // silently convert from ints to enums.
  143. int context_validity;
  144. };
  145. struct StackFrameSPARC : public StackFrame {
  146. // to be confirmed
  147. enum ContextValidity {
  148. CONTEXT_VALID_NONE = 0,
  149. CONTEXT_VALID_PC = 1 << 0,
  150. CONTEXT_VALID_SP = 1 << 1,
  151. CONTEXT_VALID_FP = 1 << 2,
  152. CONTEXT_VALID_ALL = -1
  153. };
  154. StackFrameSPARC() : context(), context_validity(CONTEXT_VALID_NONE) {}
  155. // Register state. This is only fully valid for the topmost frame in a
  156. // stack. In other frames, the values of nonvolatile registers may be
  157. // present, given sufficient debugging information. Refer to
  158. // context_validity.
  159. MDRawContextSPARC context;
  160. // context_validity is actually ContextValidity, but int is used because
  161. // the OR operator doesn't work well with enumerated types. This indicates
  162. // which fields in context are valid.
  163. int context_validity;
  164. };
  165. struct StackFrameARM : public StackFrame {
  166. // A flag for each register we might know.
  167. enum ContextValidity {
  168. CONTEXT_VALID_NONE = 0,
  169. CONTEXT_VALID_R0 = 1 << 0,
  170. CONTEXT_VALID_R1 = 1 << 1,
  171. CONTEXT_VALID_R2 = 1 << 2,
  172. CONTEXT_VALID_R3 = 1 << 3,
  173. CONTEXT_VALID_R4 = 1 << 4,
  174. CONTEXT_VALID_R5 = 1 << 5,
  175. CONTEXT_VALID_R6 = 1 << 6,
  176. CONTEXT_VALID_R7 = 1 << 7,
  177. CONTEXT_VALID_R8 = 1 << 8,
  178. CONTEXT_VALID_R9 = 1 << 9,
  179. CONTEXT_VALID_R10 = 1 << 10,
  180. CONTEXT_VALID_R11 = 1 << 11,
  181. CONTEXT_VALID_R12 = 1 << 12,
  182. CONTEXT_VALID_R13 = 1 << 13,
  183. CONTEXT_VALID_R14 = 1 << 14,
  184. CONTEXT_VALID_R15 = 1 << 15,
  185. CONTEXT_VALID_ALL = ~CONTEXT_VALID_NONE,
  186. // Aliases for registers with dedicated or conventional roles.
  187. CONTEXT_VALID_FP = CONTEXT_VALID_R11,
  188. CONTEXT_VALID_SP = CONTEXT_VALID_R13,
  189. CONTEXT_VALID_LR = CONTEXT_VALID_R14,
  190. CONTEXT_VALID_PC = CONTEXT_VALID_R15
  191. };
  192. StackFrameARM() : context(), context_validity(CONTEXT_VALID_NONE) {}
  193. // Return the ContextValidity flag for register rN.
  194. static ContextValidity RegisterValidFlag(int n) {
  195. return ContextValidity(1 << n);
  196. }
  197. // Register state. This is only fully valid for the topmost frame in a
  198. // stack. In other frames, the values of nonvolatile registers may be
  199. // present, given sufficient debugging information. Refer to
  200. // context_validity.
  201. MDRawContextARM context;
  202. // For each register in context whose value has been recovered, we set
  203. // the corresponding CONTEXT_VALID_ bit in context_validity.
  204. //
  205. // context_validity's type should actually be ContextValidity, but
  206. // we use int instead because the bitwise inclusive or operator
  207. // yields an int when applied to enum values, and C++ doesn't
  208. // silently convert from ints to enums.
  209. int context_validity;
  210. };
  211. } // namespace google_breakpad
  212. #endif // GOOGLE_BREAKPAD_PROCESSOR_STACK_FRAME_CPU_H__