/drivers/media/video/tvp7002.c
C | 1203 lines | 791 code | 129 blank | 283 comment | 62 complexity | 557e2a3c2d35e3368f4db2d0fc58af8c MD5 | raw file
1/* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics 2 * Digitizer with Horizontal PLL registers 3 * 4 * Copyright (C) 2009 Texas Instruments Inc 5 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com> 6 * 7 * This code is partially based upon the TVP5150 driver 8 * written by Mauro Carvalho Chehab (mchehab@infradead.org), 9 * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com> 10 * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by 11 * Muralidharan Karicheri and Snehaprabha Narnakaje (TI). 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License as published by 15 * the Free Software Foundation; either version 2 of the License, or 16 * (at your option) any later version. 17 * 18 * This program is distributed in the hope that it will be useful, 19 * but WITHOUT ANY WARRANTY; without even the implied warranty of 20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 21 * GNU General Public License for more details. 22 * 23 * You should have received a copy of the GNU General Public License 24 * along with this program; if not, write to the Free Software 25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 26 */ 27#include <linux/delay.h> 28#include <linux/i2c.h> 29#include <linux/slab.h> 30#include <linux/videodev2.h> 31#include <media/tvp7002.h> 32#include <media/v4l2-device.h> 33#include <media/v4l2-chip-ident.h> 34#include <media/v4l2-common.h> 35#include "tvp7002_reg.h" 36 37MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver"); 38MODULE_AUTHOR("Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>"); 39MODULE_LICENSE("GPL"); 40 41/* Module Name */ 42#define TVP7002_MODULE_NAME "tvp7002" 43 44/* I2C retry attempts */ 45#define I2C_RETRY_COUNT (5) 46 47/* End of registers */ 48#define TVP7002_EOR 0x5c 49 50/* Read write definition for registers */ 51#define TVP7002_READ 0 52#define TVP7002_WRITE 1 53#define TVP7002_RESERVED 2 54 55/* Interlaced vs progressive mask and shift */ 56#define TVP7002_IP_SHIFT 5 57#define TVP7002_INPR_MASK (0x01 << TVP7002_IP_SHIFT) 58 59/* Shift for CPL and LPF registers */ 60#define TVP7002_CL_SHIFT 8 61#define TVP7002_CL_MASK 0x0f 62 63/* Debug functions */ 64static int debug; 65module_param(debug, bool, 0644); 66MODULE_PARM_DESC(debug, "Debug level (0-2)"); 67 68/* Structure for register values */ 69struct i2c_reg_value { 70 u8 reg; 71 u8 value; 72 u8 type; 73}; 74 75/* 76 * Register default values (according to tvp7002 datasheet) 77 * In the case of read-only registers, the value (0xff) is 78 * never written. R/W functionality is controlled by the 79 * writable bit in the register struct definition. 80 */ 81static const struct i2c_reg_value tvp7002_init_default[] = { 82 { TVP7002_CHIP_REV, 0xff, TVP7002_READ }, 83 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE }, 84 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE }, 85 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE }, 86 { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE }, 87 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE }, 88 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE }, 89 { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE }, 90 { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE }, 91 { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE }, 92 { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE }, 93 { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE }, 94 { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE }, 95 { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE }, 96 { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE }, 97 { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE }, 98 { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE }, 99 { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE }, 100 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE }, 101 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE }, 102 { TVP7002_SYNC_DETECT_STAT, 0xff, TVP7002_READ }, 103 { TVP7002_OUT_FORMATTER, 0x47, TVP7002_WRITE }, 104 { TVP7002_MISC_CTL_1, 0x01, TVP7002_WRITE }, 105 { TVP7002_MISC_CTL_2, 0x00, TVP7002_WRITE }, 106 { TVP7002_MISC_CTL_3, 0x01, TVP7002_WRITE }, 107 { TVP7002_IN_MUX_SEL_1, 0x00, TVP7002_WRITE }, 108 { TVP7002_IN_MUX_SEL_2, 0x67, TVP7002_WRITE }, 109 { TVP7002_B_AND_G_COARSE_GAIN, 0x77, TVP7002_WRITE }, 110 { TVP7002_R_COARSE_GAIN, 0x07, TVP7002_WRITE }, 111 { TVP7002_FINE_OFF_LSBS, 0x00, TVP7002_WRITE }, 112 { TVP7002_B_COARSE_OFF, 0x10, TVP7002_WRITE }, 113 { TVP7002_G_COARSE_OFF, 0x10, TVP7002_WRITE }, 114 { TVP7002_R_COARSE_OFF, 0x10, TVP7002_WRITE }, 115 { TVP7002_HSOUT_OUT_START, 0x08, TVP7002_WRITE }, 116 { TVP7002_MISC_CTL_4, 0x00, TVP7002_WRITE }, 117 { TVP7002_B_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ }, 118 { TVP7002_G_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ }, 119 { TVP7002_R_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ }, 120 { TVP7002_AUTO_LVL_CTL_ENABLE, 0x80, TVP7002_WRITE }, 121 { TVP7002_DGTL_ALC_OUT_MSBS, 0xff, TVP7002_READ }, 122 { TVP7002_AUTO_LVL_CTL_FILTER, 0x53, TVP7002_WRITE }, 123 { 0x29, 0x08, TVP7002_RESERVED }, 124 { TVP7002_FINE_CLAMP_CTL, 0x07, TVP7002_WRITE }, 125 /* PWR_CTL is controlled only by the probe and reset functions */ 126 { TVP7002_PWR_CTL, 0x00, TVP7002_RESERVED }, 127 { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE }, 128 { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE }, 129 { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE }, 130 { TVP7002_RGB_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE }, 131 { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE }, 132 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE }, 133 { 0x32, 0x18, TVP7002_RESERVED }, 134 { 0x33, 0x60, TVP7002_RESERVED }, 135 { TVP7002_MVIS_STRIPPER_W, 0xff, TVP7002_RESERVED }, 136 { TVP7002_VSYNC_ALGN, 0x10, TVP7002_WRITE }, 137 { TVP7002_SYNC_BYPASS, 0x00, TVP7002_WRITE }, 138 { TVP7002_L_FRAME_STAT_LSBS, 0xff, TVP7002_READ }, 139 { TVP7002_L_FRAME_STAT_MSBS, 0xff, TVP7002_READ }, 140 { TVP7002_CLK_L_STAT_LSBS, 0xff, TVP7002_READ }, 141 { TVP7002_CLK_L_STAT_MSBS, 0xff, TVP7002_READ }, 142 { TVP7002_HSYNC_W, 0xff, TVP7002_READ }, 143 { TVP7002_VSYNC_W, 0xff, TVP7002_READ }, 144 { TVP7002_L_LENGTH_TOL, 0x03, TVP7002_WRITE }, 145 { 0x3e, 0x60, TVP7002_RESERVED }, 146 { TVP7002_VIDEO_BWTH_CTL, 0x01, TVP7002_WRITE }, 147 { TVP7002_AVID_START_PIXEL_LSBS, 0x01, TVP7002_WRITE }, 148 { TVP7002_AVID_START_PIXEL_MSBS, 0x2c, TVP7002_WRITE }, 149 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x06, TVP7002_WRITE }, 150 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x2c, TVP7002_WRITE }, 151 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE }, 152 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE }, 153 { TVP7002_VBLK_F_0_DURATION, 0x1e, TVP7002_WRITE }, 154 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE }, 155 { TVP7002_FBIT_F_0_START_L_OFF, 0x00, TVP7002_WRITE }, 156 { TVP7002_FBIT_F_1_START_L_OFF, 0x00, TVP7002_WRITE }, 157 { TVP7002_YUV_Y_G_COEF_LSBS, 0xe3, TVP7002_WRITE }, 158 { TVP7002_YUV_Y_G_COEF_MSBS, 0x16, TVP7002_WRITE }, 159 { TVP7002_YUV_Y_B_COEF_LSBS, 0x4f, TVP7002_WRITE }, 160 { TVP7002_YUV_Y_B_COEF_MSBS, 0x02, TVP7002_WRITE }, 161 { TVP7002_YUV_Y_R_COEF_LSBS, 0xce, TVP7002_WRITE }, 162 { TVP7002_YUV_Y_R_COEF_MSBS, 0x06, TVP7002_WRITE }, 163 { TVP7002_YUV_U_G_COEF_LSBS, 0xab, TVP7002_WRITE }, 164 { TVP7002_YUV_U_G_COEF_MSBS, 0xf3, TVP7002_WRITE }, 165 { TVP7002_YUV_U_B_COEF_LSBS, 0x00, TVP7002_WRITE }, 166 { TVP7002_YUV_U_B_COEF_MSBS, 0x10, TVP7002_WRITE }, 167 { TVP7002_YUV_U_R_COEF_LSBS, 0x55, TVP7002_WRITE }, 168 { TVP7002_YUV_U_R_COEF_MSBS, 0xfc, TVP7002_WRITE }, 169 { TVP7002_YUV_V_G_COEF_LSBS, 0x78, TVP7002_WRITE }, 170 { TVP7002_YUV_V_G_COEF_MSBS, 0xf1, TVP7002_WRITE }, 171 { TVP7002_YUV_V_B_COEF_LSBS, 0x88, TVP7002_WRITE }, 172 { TVP7002_YUV_V_B_COEF_MSBS, 0xfe, TVP7002_WRITE }, 173 { TVP7002_YUV_V_R_COEF_LSBS, 0x00, TVP7002_WRITE }, 174 { TVP7002_YUV_V_R_COEF_MSBS, 0x10, TVP7002_WRITE }, 175 /* This signals end of register values */ 176 { TVP7002_EOR, 0xff, TVP7002_RESERVED } 177}; 178 179/* Register parameters for 480P */ 180static const struct i2c_reg_value tvp7002_parms_480P[] = { 181 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE }, 182 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x0a, TVP7002_WRITE }, 183 { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE }, 184 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE }, 185 { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE }, 186 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE }, 187 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE }, 188 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE }, 189 { TVP7002_VBLK_F_0_START_L_OFF, 0x03, TVP7002_WRITE }, 190 { TVP7002_VBLK_F_1_START_L_OFF, 0x01, TVP7002_WRITE }, 191 { TVP7002_VBLK_F_0_DURATION, 0x13, TVP7002_WRITE }, 192 { TVP7002_VBLK_F_1_DURATION, 0x13, TVP7002_WRITE }, 193 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE }, 194 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE }, 195 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE }, 196 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE }, 197 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE }, 198 { TVP7002_EOR, 0xff, TVP7002_RESERVED } 199}; 200 201/* Register parameters for 576P */ 202static const struct i2c_reg_value tvp7002_parms_576P[] = { 203 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE }, 204 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE }, 205 { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE }, 206 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE }, 207 { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE }, 208 { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE }, 209 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE }, 210 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE }, 211 { TVP7002_VBLK_F_0_START_L_OFF, 0x00, TVP7002_WRITE }, 212 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE }, 213 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE }, 214 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE }, 215 { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE }, 216 { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE }, 217 { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE }, 218 { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE }, 219 { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE }, 220 { TVP7002_EOR, 0xff, TVP7002_RESERVED } 221}; 222 223/* Register parameters for 1080I60 */ 224static const struct i2c_reg_value tvp7002_parms_1080I60[] = { 225 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE }, 226 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x08, TVP7002_WRITE }, 227 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE }, 228 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE }, 229 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE }, 230 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE }, 231 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE }, 232 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE }, 233 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE }, 234 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE }, 235 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE }, 236 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE }, 237 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE }, 238 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE }, 239 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE }, 240 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE }, 241 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE }, 242 { TVP7002_EOR, 0xff, TVP7002_RESERVED } 243}; 244 245/* Register parameters for 1080P60 */ 246static const struct i2c_reg_value tvp7002_parms_1080P60[] = { 247 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE }, 248 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x08, TVP7002_WRITE }, 249 { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE }, 250 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE }, 251 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE }, 252 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE }, 253 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE }, 254 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE }, 255 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE }, 256 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE }, 257 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE }, 258 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE }, 259 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE }, 260 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE }, 261 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE }, 262 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE }, 263 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE }, 264 { TVP7002_EOR, 0xff, TVP7002_RESERVED } 265}; 266 267/* Register parameters for 1080I50 */ 268static const struct i2c_reg_value tvp7002_parms_1080I50[] = { 269 { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE }, 270 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE }, 271 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE }, 272 { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE }, 273 { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE }, 274 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE }, 275 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE }, 276 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE }, 277 { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE }, 278 { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE }, 279 { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE }, 280 { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE }, 281 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE }, 282 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE }, 283 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE }, 284 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE }, 285 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE }, 286 { TVP7002_EOR, 0xff, TVP7002_RESERVED } 287}; 288 289/* Register parameters for 720P60 */ 290static const struct i2c_reg_value tvp7002_parms_720P60[] = { 291 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE }, 292 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x02, TVP7002_WRITE }, 293 { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE }, 294 { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE }, 295 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE }, 296 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE }, 297 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE }, 298 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE }, 299 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE }, 300 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE }, 301 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE }, 302 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE }, 303 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE }, 304 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE }, 305 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE }, 306 { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE }, 307 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE }, 308 { TVP7002_EOR, 0xff, TVP7002_RESERVED } 309}; 310 311/* Register parameters for 720P50 */ 312static const struct i2c_reg_value tvp7002_parms_720P50[] = { 313 { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE }, 314 { TVP7002_HPLL_FDBK_DIV_LSBS, 0x0c, TVP7002_WRITE }, 315 { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE }, 316 { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE }, 317 { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE }, 318 { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE }, 319 { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE }, 320 { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE }, 321 { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE }, 322 { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE }, 323 { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE }, 324 { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE }, 325 { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE }, 326 { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE }, 327 { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE }, 328 { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE }, 329 { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE }, 330 { TVP7002_EOR, 0xff, TVP7002_RESERVED } 331}; 332 333/* Struct list for available formats */ 334static const struct v4l2_fmtdesc tvp7002_fmt_list[] = { 335 { 336 .index = 0, 337 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE, 338 .flags = 0, 339 .description = "8-bit UYVY 4:2:2 Format", 340 .pixelformat = V4L2_PIX_FMT_UYVY, 341 }, 342}; 343 344#define NUM_FORMATS ARRAY_SIZE(tvp7002_fmt_list) 345 346/* Preset definition for handling device operation */ 347struct tvp7002_preset_definition { 348 u32 preset; 349 const struct i2c_reg_value *p_settings; 350 enum v4l2_colorspace color_space; 351 enum v4l2_field scanmode; 352 u16 progressive; 353 u16 lines_per_frame; 354 u16 cpl_min; 355 u16 cpl_max; 356}; 357 358/* Struct list for digital video presets */ 359static const struct tvp7002_preset_definition tvp7002_presets[] = { 360 { 361 V4L2_DV_720P60, 362 tvp7002_parms_720P60, 363 V4L2_COLORSPACE_REC709, 364 V4L2_FIELD_NONE, 365 1, 366 0x2EE, 367 135, 368 153 369 }, 370 { 371 V4L2_DV_1080I60, 372 tvp7002_parms_1080I60, 373 V4L2_COLORSPACE_REC709, 374 V4L2_FIELD_INTERLACED, 375 0, 376 0x465, 377 181, 378 205 379 }, 380 { 381 V4L2_DV_1080I50, 382 tvp7002_parms_1080I50, 383 V4L2_COLORSPACE_REC709, 384 V4L2_FIELD_INTERLACED, 385 0, 386 0x465, 387 217, 388 245 389 }, 390 { 391 V4L2_DV_720P50, 392 tvp7002_parms_720P50, 393 V4L2_COLORSPACE_REC709, 394 V4L2_FIELD_NONE, 395 1, 396 0x2EE, 397 163, 398 183 399 }, 400 { 401 V4L2_DV_1080P60, 402 tvp7002_parms_1080P60, 403 V4L2_COLORSPACE_REC709, 404 V4L2_FIELD_NONE, 405 1, 406 0x465, 407 90, 408 102 409 }, 410 { 411 V4L2_DV_480P59_94, 412 tvp7002_parms_480P, 413 V4L2_COLORSPACE_SMPTE170M, 414 V4L2_FIELD_NONE, 415 1, 416 0x20D, 417 0xffff, 418 0xffff 419 }, 420 { 421 V4L2_DV_576P50, 422 tvp7002_parms_576P, 423 V4L2_COLORSPACE_SMPTE170M, 424 V4L2_FIELD_NONE, 425 1, 426 0x271, 427 0xffff, 428 0xffff 429 } 430}; 431 432#define NUM_PRESETS ARRAY_SIZE(tvp7002_presets) 433 434/* Device definition */ 435struct tvp7002 { 436 struct v4l2_subdev sd; 437 const struct tvp7002_config *pdata; 438 439 int ver; 440 int streaming; 441 442 struct v4l2_pix_format pix; 443 const struct tvp7002_preset_definition *current_preset; 444 u8 gain; 445}; 446 447/* 448 * to_tvp7002 - Obtain device handler TVP7002 449 * @sd: ptr to v4l2_subdev struct 450 * 451 * Returns device handler tvp7002. 452 */ 453static inline struct tvp7002 *to_tvp7002(struct v4l2_subdev *sd) 454{ 455 return container_of(sd, struct tvp7002, sd); 456} 457 458/* 459 * tvp7002_read - Read a value from a register in an TVP7002 460 * @sd: ptr to v4l2_subdev struct 461 * @addr: TVP7002 register address 462 * @dst: pointer to 8-bit destination 463 * 464 * Returns value read if successful, or non-zero (-1) otherwise. 465 */ 466static int tvp7002_read(struct v4l2_subdev *sd, u8 addr, u8 *dst) 467{ 468 struct i2c_client *c = v4l2_get_subdevdata(sd); 469 int retry; 470 int error; 471 472 for (retry = 0; retry < I2C_RETRY_COUNT; retry++) { 473 error = i2c_smbus_read_byte_data(c, addr); 474 475 if (error >= 0) { 476 *dst = (u8)error; 477 return 0; 478 } 479 480 msleep_interruptible(10); 481 } 482 v4l2_err(sd, "TVP7002 read error %d\n", error); 483 return error; 484} 485 486/* 487 * tvp7002_read_err() - Read a register value with error code 488 * @sd: pointer to standard V4L2 sub-device structure 489 * @reg: destination register 490 * @val: value to be read 491 * @err: pointer to error value 492 * 493 * Read a value in a register and save error value in pointer. 494 * Also update the register table if successful 495 */ 496static inline void tvp7002_read_err(struct v4l2_subdev *sd, u8 reg, 497 u8 *dst, int *err) 498{ 499 if (!*err) 500 *err = tvp7002_read(sd, reg, dst); 501} 502 503/* 504 * tvp7002_write() - Write a value to a register in TVP7002 505 * @sd: ptr to v4l2_subdev struct 506 * @addr: TVP7002 register address 507 * @value: value to be written to the register 508 * 509 * Write a value to a register in an TVP7002 decoder device. 510 * Returns zero if successful, or non-zero otherwise. 511 */ 512static int tvp7002_write(struct v4l2_subdev *sd, u8 addr, u8 value) 513{ 514 struct i2c_client *c; 515 int retry; 516 int error; 517 518 c = v4l2_get_subdevdata(sd); 519 520 for (retry = 0; retry < I2C_RETRY_COUNT; retry++) { 521 error = i2c_smbus_write_byte_data(c, addr, value); 522 523 if (error >= 0) 524 return 0; 525 526 v4l2_warn(sd, "Write: retry ... %d\n", retry); 527 msleep_interruptible(10); 528 } 529 v4l2_err(sd, "TVP7002 write error %d\n", error); 530 return error; 531} 532 533/* 534 * tvp7002_write_err() - Write a register value with error code 535 * @sd: pointer to standard V4L2 sub-device structure 536 * @reg: destination register 537 * @val: value to be written 538 * @err: pointer to error value 539 * 540 * Write a value in a register and save error value in pointer. 541 * Also update the register table if successful 542 */ 543static inline void tvp7002_write_err(struct v4l2_subdev *sd, u8 reg, 544 u8 val, int *err) 545{ 546 if (!*err) 547 *err = tvp7002_write(sd, reg, val); 548} 549 550/* 551 * tvp7002_g_chip_ident() - Get chip identification number 552 * @sd: ptr to v4l2_subdev struct 553 * @chip: ptr to v4l2_dbg_chip_ident struct 554 * 555 * Obtains the chip's identification number. 556 * Returns zero or -EINVAL if read operation fails. 557 */ 558static int tvp7002_g_chip_ident(struct v4l2_subdev *sd, 559 struct v4l2_dbg_chip_ident *chip) 560{ 561 u8 rev; 562 int error; 563 struct i2c_client *client = v4l2_get_subdevdata(sd); 564 565 error = tvp7002_read(sd, TVP7002_CHIP_REV, &rev); 566 567 if (error < 0) 568 return error; 569 570 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP7002, rev); 571} 572 573/* 574 * tvp7002_write_inittab() - Write initialization values 575 * @sd: ptr to v4l2_subdev struct 576 * @regs: ptr to i2c_reg_value struct 577 * 578 * Write initialization values. 579 * Returns zero or -EINVAL if read operation fails. 580 */ 581static int tvp7002_write_inittab(struct v4l2_subdev *sd, 582 const struct i2c_reg_value *regs) 583{ 584 int error = 0; 585 586 /* Initialize the first (defined) registers */ 587 while (TVP7002_EOR != regs->reg) { 588 if (TVP7002_WRITE == regs->type) 589 tvp7002_write_err(sd, regs->reg, regs->value, &error); 590 regs++; 591 } 592 593 return error; 594} 595 596/* 597 * tvp7002_s_dv_preset() - Set digital video preset 598 * @sd: ptr to v4l2_subdev struct 599 * @dv_preset: ptr to v4l2_dv_preset struct 600 * 601 * Set the digital video preset for a TVP7002 decoder device. 602 * Returns zero when successful or -EINVAL if register access fails. 603 */ 604static int tvp7002_s_dv_preset(struct v4l2_subdev *sd, 605 struct v4l2_dv_preset *dv_preset) 606{ 607 struct tvp7002 *device = to_tvp7002(sd); 608 u32 preset; 609 int i; 610 611 for (i = 0; i < NUM_PRESETS; i++) { 612 preset = tvp7002_presets[i].preset; 613 if (preset == dv_preset->preset) { 614 device->current_preset = &tvp7002_presets[i]; 615 return tvp7002_write_inittab(sd, tvp7002_presets[i].p_settings); 616 } 617 } 618 619 return -EINVAL; 620} 621 622/* 623 * tvp7002_g_ctrl() - Get a control 624 * @sd: ptr to v4l2_subdev struct 625 * @ctrl: ptr to v4l2_control struct 626 * 627 * Get a control for a TVP7002 decoder device. 628 * Returns zero when successful or -EINVAL if register access fails. 629 */ 630static int tvp7002_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) 631{ 632 struct tvp7002 *device = to_tvp7002(sd); 633 634 switch (ctrl->id) { 635 case V4L2_CID_GAIN: 636 ctrl->value = device->gain; 637 return 0; 638 default: 639 return -EINVAL; 640 } 641} 642 643/* 644 * tvp7002_s_ctrl() - Set a control 645 * @sd: ptr to v4l2_subdev struct 646 * @ctrl: ptr to v4l2_control struct 647 * 648 * Set a control in TVP7002 decoder device. 649 * Returns zero when successful or -EINVAL if register access fails. 650 */ 651static int tvp7002_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) 652{ 653 struct tvp7002 *device = to_tvp7002(sd); 654 int error = 0; 655 656 switch (ctrl->id) { 657 case V4L2_CID_GAIN: 658 tvp7002_write_err(sd, TVP7002_R_FINE_GAIN, 659 ctrl->value & 0xff, &error); 660 tvp7002_write_err(sd, TVP7002_G_FINE_GAIN, 661 ctrl->value & 0xff, &error); 662 tvp7002_write_err(sd, TVP7002_B_FINE_GAIN, 663 ctrl->value & 0xff, &error); 664 665 if (error < 0) 666 return error; 667 668 /* Set only after knowing there is no error */ 669 device->gain = ctrl->value & 0xff; 670 return 0; 671 default: 672 return -EINVAL; 673 } 674} 675 676/* 677 * tvp7002_queryctrl() - Query a control 678 * @sd: ptr to v4l2_subdev struct 679 * @qc: ptr to v4l2_queryctrl struct 680 * 681 * Query a control of a TVP7002 decoder device. 682 * Returns zero when successful or -EINVAL if register read fails. 683 */ 684static int tvp7002_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc) 685{ 686 switch (qc->id) { 687 case V4L2_CID_GAIN: 688 /* 689 * Gain is supported [0-255, default=0, step=1] 690 */ 691 return v4l2_ctrl_query_fill(qc, 0, 255, 1, 0); 692 default: 693 return -EINVAL; 694 } 695} 696 697/* 698 * tvp7002_try_fmt_cap() - V4L2 decoder interface handler for try_fmt 699 * @sd: pointer to standard V4L2 sub-device structure 700 * @f: pointer to standard V4L2 VIDIOC_TRY_FMT ioctl structure 701 * 702 * Implement the VIDIOC_TRY_FMT ioctl for the CAPTURE buffer type. This 703 * ioctl is used to negotiate the image capture size and pixel format 704 * without actually making it take effect. 705 */ 706static int tvp7002_try_fmt_cap(struct v4l2_subdev *sd, struct v4l2_format *f) 707{ 708 struct tvp7002 *device = to_tvp7002(sd); 709 struct v4l2_dv_enum_preset e_preset; 710 struct v4l2_pix_format *pix; 711 int error = 0; 712 713 pix = &f->fmt.pix; 714 715 /* Calculate height and width based on current standard */ 716 error = v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset); 717 if (error) 718 return -EINVAL; 719 720 pix->width = e_preset.width; 721 pix->height = e_preset.height; 722 pix->pixelformat = V4L2_PIX_FMT_UYVY; 723 pix->field = device->current_preset->scanmode; 724 pix->bytesperline = pix->width * 2; 725 pix->sizeimage = pix->bytesperline * pix->height; 726 pix->colorspace = device->current_preset->color_space; 727 pix->priv = 0; 728 729 v4l2_dbg(1, debug, sd, "Try FMT: pixelformat - %s, bytesperline - %d" 730 "Width - %d, Height - %d", "8-bit UYVY 4:2:2 Format", 731 pix->bytesperline, pix->width, pix->height); 732 return error; 733} 734 735/* 736 * tvp7002_s_fmt() - V4L2 decoder interface handler for s_fmt 737 * @sd: pointer to standard V4L2 sub-device structure 738 * @f: pointer to standard V4L2 VIDIOC_S_FMT ioctl structure 739 * 740 * If the requested format is supported, configures the HW to use that 741 * format, returns error code if format not supported or HW can't be 742 * correctly configured. 743 */ 744static int tvp7002_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f) 745{ 746 struct tvp7002 *decoder = to_tvp7002(sd); 747 int rval; 748 749 rval = tvp7002_try_fmt_cap(sd, f); 750 if (!rval) 751 decoder->pix = f->fmt.pix; 752 return rval; 753} 754 755/* 756 * tvp7002_g_fmt() - V4L2 decoder interface handler for tvp7002_g_fmt 757 * @sd: pointer to standard V4L2 sub-device structure 758 * @f: pointer to standard V4L2 v4l2_format structure 759 * 760 * Returns the decoder's current pixel format in the v4l2_format 761 * parameter. 762 */ 763static int tvp7002_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *f) 764{ 765 struct tvp7002 *decoder = to_tvp7002(sd); 766 767 f->fmt.pix = decoder->pix; 768 769 v4l2_dbg(1, debug, sd, "Current FMT: bytesperline - %d" 770 "Width - %d, Height - %d", 771 decoder->pix.bytesperline, 772 decoder->pix.width, decoder->pix.height); 773 return 0; 774} 775 776/* 777 * tvp7002_query_dv_preset() - query DV preset 778 * @sd: pointer to standard V4L2 sub-device structure 779 * @qpreset: standard V4L2 v4l2_dv_preset structure 780 * 781 * Returns the current DV preset by TVP7002. If no active input is 782 * detected, returns -EINVAL 783 */ 784static int tvp7002_query_dv_preset(struct v4l2_subdev *sd, 785 struct v4l2_dv_preset *qpreset) 786{ 787 const struct tvp7002_preset_definition *presets = tvp7002_presets; 788 struct tvp7002 *device; 789 u8 progressive; 790 u32 lpfr; 791 u32 cpln; 792 int error = 0; 793 u8 lpf_lsb; 794 u8 lpf_msb; 795 u8 cpl_lsb; 796 u8 cpl_msb; 797 int index; 798 799 device = to_tvp7002(sd); 800 801 /* Read standards from device registers */ 802 tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_LSBS, &lpf_lsb, &error); 803 tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_MSBS, &lpf_msb, &error); 804 805 if (error < 0) 806 return error; 807 808 tvp7002_read_err(sd, TVP7002_CLK_L_STAT_LSBS, &cpl_lsb, &error); 809 tvp7002_read_err(sd, TVP7002_CLK_L_STAT_MSBS, &cpl_msb, &error); 810 811 if (error < 0) 812 return error; 813 814 /* Get lines per frame, clocks per line and interlaced/progresive */ 815 lpfr = lpf_lsb | ((TVP7002_CL_MASK & lpf_msb) << TVP7002_CL_SHIFT); 816 cpln = cpl_lsb | ((TVP7002_CL_MASK & cpl_msb) << TVP7002_CL_SHIFT); 817 progressive = (lpf_msb & TVP7002_INPR_MASK) >> TVP7002_IP_SHIFT; 818 819 /* Do checking of video modes */ 820 for (index = 0; index < NUM_PRESETS; index++, presets++) 821 if (lpfr == presets->lines_per_frame && 822 progressive == presets->progressive) { 823 if (presets->cpl_min == 0xffff) 824 break; 825 if (cpln >= presets->cpl_min && cpln <= presets->cpl_max) 826 break; 827 } 828 829 if (index == NUM_PRESETS) { 830 v4l2_dbg(1, debug, sd, "detection failed: lpf = %x, cpl = %x\n", 831 lpfr, cpln); 832 /* Could not detect a signal, so return the 'invalid' preset */ 833 qpreset->preset = V4L2_DV_INVALID; 834 return 0; 835 } 836 837 /* Set values in found preset */ 838 qpreset->preset = presets->preset; 839 840 /* Update lines per frame and clocks per line info */ 841 v4l2_dbg(1, debug, sd, "detected preset: %d\n", presets->preset); 842 return 0; 843} 844 845#ifdef CONFIG_VIDEO_ADV_DEBUG 846/* 847 * tvp7002_g_register() - Get the value of a register 848 * @sd: ptr to v4l2_subdev struct 849 * @reg: ptr to v4l2_dbg_register struct 850 * 851 * Get the value of a TVP7002 decoder device register. 852 * Returns zero when successful, -EINVAL if register read fails or 853 * access to I2C client fails, -EPERM if the call is not allowed 854 * by diabled CAP_SYS_ADMIN. 855 */ 856static int tvp7002_g_register(struct v4l2_subdev *sd, 857 struct v4l2_dbg_register *reg) 858{ 859 struct i2c_client *client = v4l2_get_subdevdata(sd); 860 u8 val; 861 int ret; 862 863 if (!v4l2_chip_match_i2c_client(client, ®->match)) 864 return -EINVAL; 865 if (!capable(CAP_SYS_ADMIN)) 866 return -EPERM; 867 868 ret = tvp7002_read(sd, reg->reg & 0xff, &val); 869 reg->val = val; 870 return ret; 871} 872 873/* 874 * tvp7002_s_register() - set a control 875 * @sd: ptr to v4l2_subdev struct 876 * @reg: ptr to v4l2_dbg_register struct 877 * 878 * Get the value of a TVP7002 decoder device register. 879 * Returns zero when successful, -EINVAL if register read fails or 880 * -EPERM if call not allowed. 881 */ 882static int tvp7002_s_register(struct v4l2_subdev *sd, 883 struct v4l2_dbg_register *reg) 884{ 885 struct i2c_client *client = v4l2_get_subdevdata(sd); 886 887 if (!v4l2_chip_match_i2c_client(client, ®->match)) 888 return -EINVAL; 889 if (!capable(CAP_SYS_ADMIN)) 890 return -EPERM; 891 892 return tvp7002_write(sd, reg->reg & 0xff, reg->val & 0xff); 893} 894#endif 895 896/* 897 * tvp7002_enum_fmt() - Enum supported formats 898 * @sd: pointer to standard V4L2 sub-device structure 899 * @fmtdesc: pointer to format struct 900 * 901 * Enumerate supported formats. 902 */ 903 904static int tvp7002_enum_fmt(struct v4l2_subdev *sd, 905 struct v4l2_fmtdesc *fmtdesc) 906{ 907 /* Check requested format index is within range */ 908 if (fmtdesc->index < 0 || fmtdesc->index >= NUM_FORMATS) 909 return -EINVAL; 910 *fmtdesc = tvp7002_fmt_list[fmtdesc->index]; 911 912 return 0; 913} 914 915/* 916 * tvp7002_s_stream() - V4L2 decoder i/f handler for s_stream 917 * @sd: pointer to standard V4L2 sub-device structure 918 * @enable: streaming enable or disable 919 * 920 * Sets streaming to enable or disable, if possible. 921 */ 922static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable) 923{ 924 struct tvp7002 *device = to_tvp7002(sd); 925 int error = 0; 926 927 if (device->streaming == enable) 928 return 0; 929 930 if (enable) { 931 /* Set output state on (low impedance means stream on) */ 932 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x00); 933 device->streaming = enable; 934 } else { 935 /* Set output state off (high impedance means stream off) */ 936 error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x03); 937 if (error) 938 v4l2_dbg(1, debug, sd, "Unable to stop streaming\n"); 939 940 device->streaming = enable; 941 } 942 943 return error; 944} 945 946/* 947 * tvp7002_log_status() - Print information about register settings 948 * @sd: ptr to v4l2_subdev struct 949 * 950 * Log register values of a TVP7002 decoder device. 951 * Returns zero or -EINVAL if read operation fails. 952 */ 953static int tvp7002_log_status(struct v4l2_subdev *sd) 954{ 955 const struct tvp7002_preset_definition *presets = tvp7002_presets; 956 struct tvp7002 *device = to_tvp7002(sd); 957 struct v4l2_dv_enum_preset e_preset; 958 struct v4l2_dv_preset detected; 959 int i; 960 961 detected.preset = V4L2_DV_INVALID; 962 /* Find my current standard*/ 963 tvp7002_query_dv_preset(sd, &detected); 964 965 /* Print standard related code values */ 966 for (i = 0; i < NUM_PRESETS; i++, presets++) 967 if (presets->preset == detected.preset) 968 break; 969 970 if (v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset)) 971 return -EINVAL; 972 973 v4l2_info(sd, "Selected DV Preset: %s\n", e_preset.name); 974 v4l2_info(sd, " Pixels per line: %u\n", e_preset.width); 975 v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height); 976 if (i == NUM_PRESETS) { 977 v4l2_info(sd, "Detected DV Preset: None\n"); 978 } else { 979 if (v4l_fill_dv_preset_info(presets->preset, &e_preset)) 980 return -EINVAL; 981 v4l2_info(sd, "Detected DV Preset: %s\n", e_preset.name); 982 v4l2_info(sd, " Pixels per line: %u\n", e_preset.width); 983 v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height); 984 } 985 v4l2_info(sd, "Streaming enabled: %s\n", 986 device->streaming ? "yes" : "no"); 987 988 /* Print the current value of the gain control */ 989 v4l2_info(sd, "Gain: %u\n", device->gain); 990 991 return 0; 992} 993 994/* 995 * tvp7002_enum_dv_presets() - Enum supported digital video formats 996 * @sd: pointer to standard V4L2 sub-device structure 997 * @preset: pointer to format struct 998 * 999 * Enumerate supported digital video formats. 1000 */ 1001static int tvp7002_enum_dv_presets(struct v4l2_subdev *sd, 1002 struct v4l2_dv_enum_preset *preset) 1003{ 1004 /* Check requested format index is within range */ 1005 if (preset->index >= NUM_PRESETS) 1006 return -EINVAL; 1007 1008 return v4l_fill_dv_preset_info(tvp7002_presets[preset->index].preset, preset); 1009} 1010 1011/* V4L2 core operation handlers */ 1012static const struct v4l2_subdev_core_ops tvp7002_core_ops = { 1013 .g_chip_ident = tvp7002_g_chip_ident, 1014 .log_status = tvp7002_log_status, 1015 .g_ctrl = tvp7002_g_ctrl, 1016 .s_ctrl = tvp7002_s_ctrl, 1017 .queryctrl = tvp7002_queryctrl, 1018#ifdef CONFIG_VIDEO_ADV_DEBUG 1019 .g_register = tvp7002_g_register, 1020 .s_register = tvp7002_s_register, 1021#endif 1022}; 1023 1024/* Specific video subsystem operation handlers */ 1025static const struct v4l2_subdev_video_ops tvp7002_video_ops = { 1026 .enum_dv_presets = tvp7002_enum_dv_presets, 1027 .s_dv_preset = tvp7002_s_dv_preset, 1028 .query_dv_preset = tvp7002_query_dv_preset, 1029 .s_stream = tvp7002_s_stream, 1030 .g_fmt = tvp7002_g_fmt, 1031 .s_fmt = tvp7002_s_fmt, 1032 .enum_fmt = tvp7002_enum_fmt, 1033}; 1034 1035/* V4L2 top level operation handlers */ 1036static const struct v4l2_subdev_ops tvp7002_ops = { 1037 .core = &tvp7002_core_ops, 1038 .video = &tvp7002_video_ops, 1039}; 1040 1041static struct tvp7002 tvp7002_dev = { 1042 .streaming = 0, 1043 1044 .pix = { 1045 .width = 1280, 1046 .height = 720, 1047 .pixelformat = V4L2_PIX_FMT_UYVY, 1048 .field = V4L2_FIELD_NONE, 1049 .bytesperline = 1280 * 2, 1050 .sizeimage = 1280 * 2 * 720, 1051 .colorspace = V4L2_COLORSPACE_REC709, 1052 }, 1053 1054 .current_preset = tvp7002_presets, 1055 .gain = 0, 1056}; 1057 1058/* 1059 * tvp7002_probe - Probe a TVP7002 device 1060 * @c: ptr to i2c_client struct 1061 * @id: ptr to i2c_device_id struct 1062 * 1063 * Initialize the TVP7002 device 1064 * Returns zero when successful, -EINVAL if register read fails or 1065 * -EIO if i2c access is not available. 1066 */ 1067static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id) 1068{ 1069 struct v4l2_subdev *sd; 1070 struct tvp7002 *device; 1071 struct v4l2_dv_preset preset; 1072 int polarity_a; 1073 int polarity_b; 1074 u8 revision; 1075 1076 int error; 1077 1078 /* Check if the adapter supports the needed features */ 1079 if (!i2c_check_functionality(c->adapter, 1080 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) 1081 return -EIO; 1082 1083 if (!c->dev.platform_data) { 1084 v4l_err(c, "No platform data!!\n"); 1085 return -ENODEV; 1086 } 1087 1088 device = kmalloc(sizeof(struct tvp7002), GFP_KERNEL); 1089 1090 if (!device) 1091 return -ENOMEM; 1092 1093 *device = tvp7002_dev; 1094 sd = &device->sd; 1095 device->pdata = c->dev.platform_data; 1096 1097 /* Tell v4l2 the device is ready */ 1098 v4l2_i2c_subdev_init(sd, c, &tvp7002_ops); 1099 v4l_info(c, "tvp7002 found @ 0x%02x (%s)\n", 1100 c->addr, c->adapter->name); 1101 1102 error = tvp7002_read(sd, TVP7002_CHIP_REV, &revision); 1103 if (error < 0) 1104 goto found_error; 1105 1106 /* Get revision number */ 1107 v4l2_info(sd, "Rev. %02x detected.\n", revision); 1108 if (revision != 0x02) 1109 v4l2_info(sd, "Unknown revision detected.\n"); 1110 1111 /* Initializes TVP7002 to its default values */ 1112 error = tvp7002_write_inittab(sd, tvp7002_init_default); 1113 1114 if (error < 0) 1115 goto found_error; 1116 1117 /* Set polarity information after registers have been set */ 1118 polarity_a = 0x20 | device->pdata->hs_polarity << 5 1119 | device->pdata->vs_polarity << 2; 1120 error = tvp7002_write(sd, TVP7002_SYNC_CTL_1, polarity_a); 1121 if (error < 0) 1122 goto found_error; 1123 1124 polarity_b = 0x01 | device->pdata->fid_polarity << 2 1125 | device->pdata->sog_polarity << 1 1126 | device->pdata->clk_polarity; 1127 error = tvp7002_write(sd, TVP7002_MISC_CTL_3, polarity_b); 1128 if (error < 0) 1129 goto found_error; 1130 1131 /* Set registers according to default video mode */ 1132 preset.preset = device->current_preset->preset; 1133 error = tvp7002_s_dv_preset(sd, &preset); 1134 1135found_error: 1136 if (error < 0) 1137 kfree(device); 1138 1139 return error; 1140} 1141 1142/* 1143 * tvp7002_remove - Remove TVP7002 device support 1144 * @c: ptr to i2c_client struct 1145 * 1146 * Reset the TVP7002 device 1147 * Returns zero. 1148 */ 1149static int tvp7002_remove(struct i2c_client *c) 1150{ 1151 struct v4l2_subdev *sd = i2c_get_clientdata(c); 1152 struct tvp7002 *device = to_tvp7002(sd); 1153 1154 v4l2_dbg(1, debug, sd, "Removing tvp7002 adapter" 1155 "on address 0x%x\n", c->addr); 1156 1157 v4l2_device_unregister_subdev(sd); 1158 kfree(device); 1159 return 0; 1160} 1161 1162/* I2C Device ID table */ 1163static const struct i2c_device_id tvp7002_id[] = { 1164 { "tvp7002", 0 }, 1165 { } 1166}; 1167MODULE_DEVICE_TABLE(i2c, tvp7002_id); 1168 1169/* I2C driver data */ 1170static struct i2c_driver tvp7002_driver = { 1171 .driver = { 1172 .owner = THIS_MODULE, 1173 .name = TVP7002_MODULE_NAME, 1174 }, 1175 .probe = tvp7002_probe, 1176 .remove = tvp7002_remove, 1177 .id_table = tvp7002_id, 1178}; 1179 1180/* 1181 * tvp7002_init - Initialize driver via I2C interface 1182 * 1183 * Register the TVP7002 driver. 1184 * Return 0 on success or error code on failure. 1185 */ 1186static int __init tvp7002_init(void) 1187{ 1188 return i2c_add_driver(&tvp7002_driver); 1189} 1190 1191/* 1192 * tvp7002_exit - Remove driver via I2C interface 1193 * 1194 * Unregister the TVP7002 driver. 1195 * Returns nothing. 1196 */ 1197static void __exit tvp7002_exit(void) 1198{ 1199 i2c_del_driver(&tvp7002_driver); 1200} 1201 1202module_init(tvp7002_init); 1203module_exit(tvp7002_exit);