/drivers/media/video/tvp7002.c

https://gitlab.com/TeamCarbonXtreme/android_kernel_samsung_msm7x27 · C · 1203 lines · 791 code · 129 blank · 283 comment · 62 complexity · 557e2a3c2d35e3368f4db2d0fc58af8c MD5 · raw file

  1. /* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
  2. * Digitizer with Horizontal PLL registers
  3. *
  4. * Copyright (C) 2009 Texas Instruments Inc
  5. * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
  6. *
  7. * This code is partially based upon the TVP5150 driver
  8. * written by Mauro Carvalho Chehab (mchehab@infradead.org),
  9. * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
  10. * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by
  11. * Muralidharan Karicheri and Snehaprabha Narnakaje (TI).
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. */
  27. #include <linux/delay.h>
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <linux/videodev2.h>
  31. #include <media/tvp7002.h>
  32. #include <media/v4l2-device.h>
  33. #include <media/v4l2-chip-ident.h>
  34. #include <media/v4l2-common.h>
  35. #include "tvp7002_reg.h"
  36. MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
  37. MODULE_AUTHOR("Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>");
  38. MODULE_LICENSE("GPL");
  39. /* Module Name */
  40. #define TVP7002_MODULE_NAME "tvp7002"
  41. /* I2C retry attempts */
  42. #define I2C_RETRY_COUNT (5)
  43. /* End of registers */
  44. #define TVP7002_EOR 0x5c
  45. /* Read write definition for registers */
  46. #define TVP7002_READ 0
  47. #define TVP7002_WRITE 1
  48. #define TVP7002_RESERVED 2
  49. /* Interlaced vs progressive mask and shift */
  50. #define TVP7002_IP_SHIFT 5
  51. #define TVP7002_INPR_MASK (0x01 << TVP7002_IP_SHIFT)
  52. /* Shift for CPL and LPF registers */
  53. #define TVP7002_CL_SHIFT 8
  54. #define TVP7002_CL_MASK 0x0f
  55. /* Debug functions */
  56. static int debug;
  57. module_param(debug, bool, 0644);
  58. MODULE_PARM_DESC(debug, "Debug level (0-2)");
  59. /* Structure for register values */
  60. struct i2c_reg_value {
  61. u8 reg;
  62. u8 value;
  63. u8 type;
  64. };
  65. /*
  66. * Register default values (according to tvp7002 datasheet)
  67. * In the case of read-only registers, the value (0xff) is
  68. * never written. R/W functionality is controlled by the
  69. * writable bit in the register struct definition.
  70. */
  71. static const struct i2c_reg_value tvp7002_init_default[] = {
  72. { TVP7002_CHIP_REV, 0xff, TVP7002_READ },
  73. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
  74. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
  75. { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
  76. { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE },
  77. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  78. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  79. { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE },
  80. { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE },
  81. { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE },
  82. { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE },
  83. { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
  84. { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
  85. { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
  86. { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE },
  87. { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE },
  88. { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE },
  89. { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE },
  90. { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
  91. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  92. { TVP7002_SYNC_DETECT_STAT, 0xff, TVP7002_READ },
  93. { TVP7002_OUT_FORMATTER, 0x47, TVP7002_WRITE },
  94. { TVP7002_MISC_CTL_1, 0x01, TVP7002_WRITE },
  95. { TVP7002_MISC_CTL_2, 0x00, TVP7002_WRITE },
  96. { TVP7002_MISC_CTL_3, 0x01, TVP7002_WRITE },
  97. { TVP7002_IN_MUX_SEL_1, 0x00, TVP7002_WRITE },
  98. { TVP7002_IN_MUX_SEL_2, 0x67, TVP7002_WRITE },
  99. { TVP7002_B_AND_G_COARSE_GAIN, 0x77, TVP7002_WRITE },
  100. { TVP7002_R_COARSE_GAIN, 0x07, TVP7002_WRITE },
  101. { TVP7002_FINE_OFF_LSBS, 0x00, TVP7002_WRITE },
  102. { TVP7002_B_COARSE_OFF, 0x10, TVP7002_WRITE },
  103. { TVP7002_G_COARSE_OFF, 0x10, TVP7002_WRITE },
  104. { TVP7002_R_COARSE_OFF, 0x10, TVP7002_WRITE },
  105. { TVP7002_HSOUT_OUT_START, 0x08, TVP7002_WRITE },
  106. { TVP7002_MISC_CTL_4, 0x00, TVP7002_WRITE },
  107. { TVP7002_B_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
  108. { TVP7002_G_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
  109. { TVP7002_R_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
  110. { TVP7002_AUTO_LVL_CTL_ENABLE, 0x80, TVP7002_WRITE },
  111. { TVP7002_DGTL_ALC_OUT_MSBS, 0xff, TVP7002_READ },
  112. { TVP7002_AUTO_LVL_CTL_FILTER, 0x53, TVP7002_WRITE },
  113. { 0x29, 0x08, TVP7002_RESERVED },
  114. { TVP7002_FINE_CLAMP_CTL, 0x07, TVP7002_WRITE },
  115. /* PWR_CTL is controlled only by the probe and reset functions */
  116. { TVP7002_PWR_CTL, 0x00, TVP7002_RESERVED },
  117. { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE },
  118. { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
  119. { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE },
  120. { TVP7002_RGB_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
  121. { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE },
  122. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  123. { 0x32, 0x18, TVP7002_RESERVED },
  124. { 0x33, 0x60, TVP7002_RESERVED },
  125. { TVP7002_MVIS_STRIPPER_W, 0xff, TVP7002_RESERVED },
  126. { TVP7002_VSYNC_ALGN, 0x10, TVP7002_WRITE },
  127. { TVP7002_SYNC_BYPASS, 0x00, TVP7002_WRITE },
  128. { TVP7002_L_FRAME_STAT_LSBS, 0xff, TVP7002_READ },
  129. { TVP7002_L_FRAME_STAT_MSBS, 0xff, TVP7002_READ },
  130. { TVP7002_CLK_L_STAT_LSBS, 0xff, TVP7002_READ },
  131. { TVP7002_CLK_L_STAT_MSBS, 0xff, TVP7002_READ },
  132. { TVP7002_HSYNC_W, 0xff, TVP7002_READ },
  133. { TVP7002_VSYNC_W, 0xff, TVP7002_READ },
  134. { TVP7002_L_LENGTH_TOL, 0x03, TVP7002_WRITE },
  135. { 0x3e, 0x60, TVP7002_RESERVED },
  136. { TVP7002_VIDEO_BWTH_CTL, 0x01, TVP7002_WRITE },
  137. { TVP7002_AVID_START_PIXEL_LSBS, 0x01, TVP7002_WRITE },
  138. { TVP7002_AVID_START_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
  139. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x06, TVP7002_WRITE },
  140. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
  141. { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
  142. { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
  143. { TVP7002_VBLK_F_0_DURATION, 0x1e, TVP7002_WRITE },
  144. { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
  145. { TVP7002_FBIT_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
  146. { TVP7002_FBIT_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
  147. { TVP7002_YUV_Y_G_COEF_LSBS, 0xe3, TVP7002_WRITE },
  148. { TVP7002_YUV_Y_G_COEF_MSBS, 0x16, TVP7002_WRITE },
  149. { TVP7002_YUV_Y_B_COEF_LSBS, 0x4f, TVP7002_WRITE },
  150. { TVP7002_YUV_Y_B_COEF_MSBS, 0x02, TVP7002_WRITE },
  151. { TVP7002_YUV_Y_R_COEF_LSBS, 0xce, TVP7002_WRITE },
  152. { TVP7002_YUV_Y_R_COEF_MSBS, 0x06, TVP7002_WRITE },
  153. { TVP7002_YUV_U_G_COEF_LSBS, 0xab, TVP7002_WRITE },
  154. { TVP7002_YUV_U_G_COEF_MSBS, 0xf3, TVP7002_WRITE },
  155. { TVP7002_YUV_U_B_COEF_LSBS, 0x00, TVP7002_WRITE },
  156. { TVP7002_YUV_U_B_COEF_MSBS, 0x10, TVP7002_WRITE },
  157. { TVP7002_YUV_U_R_COEF_LSBS, 0x55, TVP7002_WRITE },
  158. { TVP7002_YUV_U_R_COEF_MSBS, 0xfc, TVP7002_WRITE },
  159. { TVP7002_YUV_V_G_COEF_LSBS, 0x78, TVP7002_WRITE },
  160. { TVP7002_YUV_V_G_COEF_MSBS, 0xf1, TVP7002_WRITE },
  161. { TVP7002_YUV_V_B_COEF_LSBS, 0x88, TVP7002_WRITE },
  162. { TVP7002_YUV_V_B_COEF_MSBS, 0xfe, TVP7002_WRITE },
  163. { TVP7002_YUV_V_R_COEF_LSBS, 0x00, TVP7002_WRITE },
  164. { TVP7002_YUV_V_R_COEF_MSBS, 0x10, TVP7002_WRITE },
  165. /* This signals end of register values */
  166. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  167. };
  168. /* Register parameters for 480P */
  169. static const struct i2c_reg_value tvp7002_parms_480P[] = {
  170. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE },
  171. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x0a, TVP7002_WRITE },
  172. { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE },
  173. { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
  174. { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE },
  175. { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
  176. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE },
  177. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
  178. { TVP7002_VBLK_F_0_START_L_OFF, 0x03, TVP7002_WRITE },
  179. { TVP7002_VBLK_F_1_START_L_OFF, 0x01, TVP7002_WRITE },
  180. { TVP7002_VBLK_F_0_DURATION, 0x13, TVP7002_WRITE },
  181. { TVP7002_VBLK_F_1_DURATION, 0x13, TVP7002_WRITE },
  182. { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
  183. { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
  184. { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
  185. { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
  186. { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
  187. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  188. };
  189. /* Register parameters for 576P */
  190. static const struct i2c_reg_value tvp7002_parms_576P[] = {
  191. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE },
  192. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
  193. { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE },
  194. { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
  195. { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE },
  196. { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
  197. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE },
  198. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
  199. { TVP7002_VBLK_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
  200. { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
  201. { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
  202. { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
  203. { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
  204. { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
  205. { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
  206. { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
  207. { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
  208. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  209. };
  210. /* Register parameters for 1080I60 */
  211. static const struct i2c_reg_value tvp7002_parms_1080I60[] = {
  212. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
  213. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x08, TVP7002_WRITE },
  214. { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
  215. { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
  216. { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
  217. { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
  218. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
  219. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
  220. { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
  221. { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
  222. { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
  223. { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
  224. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  225. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  226. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  227. { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
  228. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  229. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  230. };
  231. /* Register parameters for 1080P60 */
  232. static const struct i2c_reg_value tvp7002_parms_1080P60[] = {
  233. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
  234. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x08, TVP7002_WRITE },
  235. { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE },
  236. { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
  237. { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
  238. { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
  239. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
  240. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
  241. { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
  242. { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
  243. { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
  244. { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
  245. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  246. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  247. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  248. { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
  249. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  250. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  251. };
  252. /* Register parameters for 1080I50 */
  253. static const struct i2c_reg_value tvp7002_parms_1080I50[] = {
  254. { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE },
  255. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
  256. { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
  257. { TVP7002_HPLL_PHASE_SEL, 0x14, TVP7002_WRITE },
  258. { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
  259. { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
  260. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
  261. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
  262. { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
  263. { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
  264. { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
  265. { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
  266. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  267. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  268. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  269. { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
  270. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  271. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  272. };
  273. /* Register parameters for 720P60 */
  274. static const struct i2c_reg_value tvp7002_parms_720P60[] = {
  275. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
  276. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x02, TVP7002_WRITE },
  277. { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
  278. { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
  279. { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
  280. { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
  281. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
  282. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
  283. { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
  284. { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
  285. { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
  286. { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
  287. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  288. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  289. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  290. { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
  291. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  292. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  293. };
  294. /* Register parameters for 720P50 */
  295. static const struct i2c_reg_value tvp7002_parms_720P50[] = {
  296. { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE },
  297. { TVP7002_HPLL_FDBK_DIV_LSBS, 0x0c, TVP7002_WRITE },
  298. { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
  299. { TVP7002_HPLL_PHASE_SEL, 0x16, TVP7002_WRITE },
  300. { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
  301. { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
  302. { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
  303. { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
  304. { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
  305. { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
  306. { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
  307. { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
  308. { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
  309. { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  310. { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  311. { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
  312. { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
  313. { TVP7002_EOR, 0xff, TVP7002_RESERVED }
  314. };
  315. /* Struct list for available formats */
  316. static const struct v4l2_fmtdesc tvp7002_fmt_list[] = {
  317. {
  318. .index = 0,
  319. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
  320. .flags = 0,
  321. .description = "8-bit UYVY 4:2:2 Format",
  322. .pixelformat = V4L2_PIX_FMT_UYVY,
  323. },
  324. };
  325. #define NUM_FORMATS ARRAY_SIZE(tvp7002_fmt_list)
  326. /* Preset definition for handling device operation */
  327. struct tvp7002_preset_definition {
  328. u32 preset;
  329. const struct i2c_reg_value *p_settings;
  330. enum v4l2_colorspace color_space;
  331. enum v4l2_field scanmode;
  332. u16 progressive;
  333. u16 lines_per_frame;
  334. u16 cpl_min;
  335. u16 cpl_max;
  336. };
  337. /* Struct list for digital video presets */
  338. static const struct tvp7002_preset_definition tvp7002_presets[] = {
  339. {
  340. V4L2_DV_720P60,
  341. tvp7002_parms_720P60,
  342. V4L2_COLORSPACE_REC709,
  343. V4L2_FIELD_NONE,
  344. 1,
  345. 0x2EE,
  346. 135,
  347. 153
  348. },
  349. {
  350. V4L2_DV_1080I60,
  351. tvp7002_parms_1080I60,
  352. V4L2_COLORSPACE_REC709,
  353. V4L2_FIELD_INTERLACED,
  354. 0,
  355. 0x465,
  356. 181,
  357. 205
  358. },
  359. {
  360. V4L2_DV_1080I50,
  361. tvp7002_parms_1080I50,
  362. V4L2_COLORSPACE_REC709,
  363. V4L2_FIELD_INTERLACED,
  364. 0,
  365. 0x465,
  366. 217,
  367. 245
  368. },
  369. {
  370. V4L2_DV_720P50,
  371. tvp7002_parms_720P50,
  372. V4L2_COLORSPACE_REC709,
  373. V4L2_FIELD_NONE,
  374. 1,
  375. 0x2EE,
  376. 163,
  377. 183
  378. },
  379. {
  380. V4L2_DV_1080P60,
  381. tvp7002_parms_1080P60,
  382. V4L2_COLORSPACE_REC709,
  383. V4L2_FIELD_NONE,
  384. 1,
  385. 0x465,
  386. 90,
  387. 102
  388. },
  389. {
  390. V4L2_DV_480P59_94,
  391. tvp7002_parms_480P,
  392. V4L2_COLORSPACE_SMPTE170M,
  393. V4L2_FIELD_NONE,
  394. 1,
  395. 0x20D,
  396. 0xffff,
  397. 0xffff
  398. },
  399. {
  400. V4L2_DV_576P50,
  401. tvp7002_parms_576P,
  402. V4L2_COLORSPACE_SMPTE170M,
  403. V4L2_FIELD_NONE,
  404. 1,
  405. 0x271,
  406. 0xffff,
  407. 0xffff
  408. }
  409. };
  410. #define NUM_PRESETS ARRAY_SIZE(tvp7002_presets)
  411. /* Device definition */
  412. struct tvp7002 {
  413. struct v4l2_subdev sd;
  414. const struct tvp7002_config *pdata;
  415. int ver;
  416. int streaming;
  417. struct v4l2_pix_format pix;
  418. const struct tvp7002_preset_definition *current_preset;
  419. u8 gain;
  420. };
  421. /*
  422. * to_tvp7002 - Obtain device handler TVP7002
  423. * @sd: ptr to v4l2_subdev struct
  424. *
  425. * Returns device handler tvp7002.
  426. */
  427. static inline struct tvp7002 *to_tvp7002(struct v4l2_subdev *sd)
  428. {
  429. return container_of(sd, struct tvp7002, sd);
  430. }
  431. /*
  432. * tvp7002_read - Read a value from a register in an TVP7002
  433. * @sd: ptr to v4l2_subdev struct
  434. * @addr: TVP7002 register address
  435. * @dst: pointer to 8-bit destination
  436. *
  437. * Returns value read if successful, or non-zero (-1) otherwise.
  438. */
  439. static int tvp7002_read(struct v4l2_subdev *sd, u8 addr, u8 *dst)
  440. {
  441. struct i2c_client *c = v4l2_get_subdevdata(sd);
  442. int retry;
  443. int error;
  444. for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
  445. error = i2c_smbus_read_byte_data(c, addr);
  446. if (error >= 0) {
  447. *dst = (u8)error;
  448. return 0;
  449. }
  450. msleep_interruptible(10);
  451. }
  452. v4l2_err(sd, "TVP7002 read error %d\n", error);
  453. return error;
  454. }
  455. /*
  456. * tvp7002_read_err() - Read a register value with error code
  457. * @sd: pointer to standard V4L2 sub-device structure
  458. * @reg: destination register
  459. * @val: value to be read
  460. * @err: pointer to error value
  461. *
  462. * Read a value in a register and save error value in pointer.
  463. * Also update the register table if successful
  464. */
  465. static inline void tvp7002_read_err(struct v4l2_subdev *sd, u8 reg,
  466. u8 *dst, int *err)
  467. {
  468. if (!*err)
  469. *err = tvp7002_read(sd, reg, dst);
  470. }
  471. /*
  472. * tvp7002_write() - Write a value to a register in TVP7002
  473. * @sd: ptr to v4l2_subdev struct
  474. * @addr: TVP7002 register address
  475. * @value: value to be written to the register
  476. *
  477. * Write a value to a register in an TVP7002 decoder device.
  478. * Returns zero if successful, or non-zero otherwise.
  479. */
  480. static int tvp7002_write(struct v4l2_subdev *sd, u8 addr, u8 value)
  481. {
  482. struct i2c_client *c;
  483. int retry;
  484. int error;
  485. c = v4l2_get_subdevdata(sd);
  486. for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
  487. error = i2c_smbus_write_byte_data(c, addr, value);
  488. if (error >= 0)
  489. return 0;
  490. v4l2_warn(sd, "Write: retry ... %d\n", retry);
  491. msleep_interruptible(10);
  492. }
  493. v4l2_err(sd, "TVP7002 write error %d\n", error);
  494. return error;
  495. }
  496. /*
  497. * tvp7002_write_err() - Write a register value with error code
  498. * @sd: pointer to standard V4L2 sub-device structure
  499. * @reg: destination register
  500. * @val: value to be written
  501. * @err: pointer to error value
  502. *
  503. * Write a value in a register and save error value in pointer.
  504. * Also update the register table if successful
  505. */
  506. static inline void tvp7002_write_err(struct v4l2_subdev *sd, u8 reg,
  507. u8 val, int *err)
  508. {
  509. if (!*err)
  510. *err = tvp7002_write(sd, reg, val);
  511. }
  512. /*
  513. * tvp7002_g_chip_ident() - Get chip identification number
  514. * @sd: ptr to v4l2_subdev struct
  515. * @chip: ptr to v4l2_dbg_chip_ident struct
  516. *
  517. * Obtains the chip's identification number.
  518. * Returns zero or -EINVAL if read operation fails.
  519. */
  520. static int tvp7002_g_chip_ident(struct v4l2_subdev *sd,
  521. struct v4l2_dbg_chip_ident *chip)
  522. {
  523. u8 rev;
  524. int error;
  525. struct i2c_client *client = v4l2_get_subdevdata(sd);
  526. error = tvp7002_read(sd, TVP7002_CHIP_REV, &rev);
  527. if (error < 0)
  528. return error;
  529. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_TVP7002, rev);
  530. }
  531. /*
  532. * tvp7002_write_inittab() - Write initialization values
  533. * @sd: ptr to v4l2_subdev struct
  534. * @regs: ptr to i2c_reg_value struct
  535. *
  536. * Write initialization values.
  537. * Returns zero or -EINVAL if read operation fails.
  538. */
  539. static int tvp7002_write_inittab(struct v4l2_subdev *sd,
  540. const struct i2c_reg_value *regs)
  541. {
  542. int error = 0;
  543. /* Initialize the first (defined) registers */
  544. while (TVP7002_EOR != regs->reg) {
  545. if (TVP7002_WRITE == regs->type)
  546. tvp7002_write_err(sd, regs->reg, regs->value, &error);
  547. regs++;
  548. }
  549. return error;
  550. }
  551. /*
  552. * tvp7002_s_dv_preset() - Set digital video preset
  553. * @sd: ptr to v4l2_subdev struct
  554. * @dv_preset: ptr to v4l2_dv_preset struct
  555. *
  556. * Set the digital video preset for a TVP7002 decoder device.
  557. * Returns zero when successful or -EINVAL if register access fails.
  558. */
  559. static int tvp7002_s_dv_preset(struct v4l2_subdev *sd,
  560. struct v4l2_dv_preset *dv_preset)
  561. {
  562. struct tvp7002 *device = to_tvp7002(sd);
  563. u32 preset;
  564. int i;
  565. for (i = 0; i < NUM_PRESETS; i++) {
  566. preset = tvp7002_presets[i].preset;
  567. if (preset == dv_preset->preset) {
  568. device->current_preset = &tvp7002_presets[i];
  569. return tvp7002_write_inittab(sd, tvp7002_presets[i].p_settings);
  570. }
  571. }
  572. return -EINVAL;
  573. }
  574. /*
  575. * tvp7002_g_ctrl() - Get a control
  576. * @sd: ptr to v4l2_subdev struct
  577. * @ctrl: ptr to v4l2_control struct
  578. *
  579. * Get a control for a TVP7002 decoder device.
  580. * Returns zero when successful or -EINVAL if register access fails.
  581. */
  582. static int tvp7002_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  583. {
  584. struct tvp7002 *device = to_tvp7002(sd);
  585. switch (ctrl->id) {
  586. case V4L2_CID_GAIN:
  587. ctrl->value = device->gain;
  588. return 0;
  589. default:
  590. return -EINVAL;
  591. }
  592. }
  593. /*
  594. * tvp7002_s_ctrl() - Set a control
  595. * @sd: ptr to v4l2_subdev struct
  596. * @ctrl: ptr to v4l2_control struct
  597. *
  598. * Set a control in TVP7002 decoder device.
  599. * Returns zero when successful or -EINVAL if register access fails.
  600. */
  601. static int tvp7002_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  602. {
  603. struct tvp7002 *device = to_tvp7002(sd);
  604. int error = 0;
  605. switch (ctrl->id) {
  606. case V4L2_CID_GAIN:
  607. tvp7002_write_err(sd, TVP7002_R_FINE_GAIN,
  608. ctrl->value & 0xff, &error);
  609. tvp7002_write_err(sd, TVP7002_G_FINE_GAIN,
  610. ctrl->value & 0xff, &error);
  611. tvp7002_write_err(sd, TVP7002_B_FINE_GAIN,
  612. ctrl->value & 0xff, &error);
  613. if (error < 0)
  614. return error;
  615. /* Set only after knowing there is no error */
  616. device->gain = ctrl->value & 0xff;
  617. return 0;
  618. default:
  619. return -EINVAL;
  620. }
  621. }
  622. /*
  623. * tvp7002_queryctrl() - Query a control
  624. * @sd: ptr to v4l2_subdev struct
  625. * @qc: ptr to v4l2_queryctrl struct
  626. *
  627. * Query a control of a TVP7002 decoder device.
  628. * Returns zero when successful or -EINVAL if register read fails.
  629. */
  630. static int tvp7002_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
  631. {
  632. switch (qc->id) {
  633. case V4L2_CID_GAIN:
  634. /*
  635. * Gain is supported [0-255, default=0, step=1]
  636. */
  637. return v4l2_ctrl_query_fill(qc, 0, 255, 1, 0);
  638. default:
  639. return -EINVAL;
  640. }
  641. }
  642. /*
  643. * tvp7002_try_fmt_cap() - V4L2 decoder interface handler for try_fmt
  644. * @sd: pointer to standard V4L2 sub-device structure
  645. * @f: pointer to standard V4L2 VIDIOC_TRY_FMT ioctl structure
  646. *
  647. * Implement the VIDIOC_TRY_FMT ioctl for the CAPTURE buffer type. This
  648. * ioctl is used to negotiate the image capture size and pixel format
  649. * without actually making it take effect.
  650. */
  651. static int tvp7002_try_fmt_cap(struct v4l2_subdev *sd, struct v4l2_format *f)
  652. {
  653. struct tvp7002 *device = to_tvp7002(sd);
  654. struct v4l2_dv_enum_preset e_preset;
  655. struct v4l2_pix_format *pix;
  656. int error = 0;
  657. pix = &f->fmt.pix;
  658. /* Calculate height and width based on current standard */
  659. error = v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset);
  660. if (error)
  661. return -EINVAL;
  662. pix->width = e_preset.width;
  663. pix->height = e_preset.height;
  664. pix->pixelformat = V4L2_PIX_FMT_UYVY;
  665. pix->field = device->current_preset->scanmode;
  666. pix->bytesperline = pix->width * 2;
  667. pix->sizeimage = pix->bytesperline * pix->height;
  668. pix->colorspace = device->current_preset->color_space;
  669. pix->priv = 0;
  670. v4l2_dbg(1, debug, sd, "Try FMT: pixelformat - %s, bytesperline - %d"
  671. "Width - %d, Height - %d", "8-bit UYVY 4:2:2 Format",
  672. pix->bytesperline, pix->width, pix->height);
  673. return error;
  674. }
  675. /*
  676. * tvp7002_s_fmt() - V4L2 decoder interface handler for s_fmt
  677. * @sd: pointer to standard V4L2 sub-device structure
  678. * @f: pointer to standard V4L2 VIDIOC_S_FMT ioctl structure
  679. *
  680. * If the requested format is supported, configures the HW to use that
  681. * format, returns error code if format not supported or HW can't be
  682. * correctly configured.
  683. */
  684. static int tvp7002_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
  685. {
  686. struct tvp7002 *decoder = to_tvp7002(sd);
  687. int rval;
  688. rval = tvp7002_try_fmt_cap(sd, f);
  689. if (!rval)
  690. decoder->pix = f->fmt.pix;
  691. return rval;
  692. }
  693. /*
  694. * tvp7002_g_fmt() - V4L2 decoder interface handler for tvp7002_g_fmt
  695. * @sd: pointer to standard V4L2 sub-device structure
  696. * @f: pointer to standard V4L2 v4l2_format structure
  697. *
  698. * Returns the decoder's current pixel format in the v4l2_format
  699. * parameter.
  700. */
  701. static int tvp7002_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
  702. {
  703. struct tvp7002 *decoder = to_tvp7002(sd);
  704. f->fmt.pix = decoder->pix;
  705. v4l2_dbg(1, debug, sd, "Current FMT: bytesperline - %d"
  706. "Width - %d, Height - %d",
  707. decoder->pix.bytesperline,
  708. decoder->pix.width, decoder->pix.height);
  709. return 0;
  710. }
  711. /*
  712. * tvp7002_query_dv_preset() - query DV preset
  713. * @sd: pointer to standard V4L2 sub-device structure
  714. * @qpreset: standard V4L2 v4l2_dv_preset structure
  715. *
  716. * Returns the current DV preset by TVP7002. If no active input is
  717. * detected, returns -EINVAL
  718. */
  719. static int tvp7002_query_dv_preset(struct v4l2_subdev *sd,
  720. struct v4l2_dv_preset *qpreset)
  721. {
  722. const struct tvp7002_preset_definition *presets = tvp7002_presets;
  723. struct tvp7002 *device;
  724. u8 progressive;
  725. u32 lpfr;
  726. u32 cpln;
  727. int error = 0;
  728. u8 lpf_lsb;
  729. u8 lpf_msb;
  730. u8 cpl_lsb;
  731. u8 cpl_msb;
  732. int index;
  733. device = to_tvp7002(sd);
  734. /* Read standards from device registers */
  735. tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_LSBS, &lpf_lsb, &error);
  736. tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_MSBS, &lpf_msb, &error);
  737. if (error < 0)
  738. return error;
  739. tvp7002_read_err(sd, TVP7002_CLK_L_STAT_LSBS, &cpl_lsb, &error);
  740. tvp7002_read_err(sd, TVP7002_CLK_L_STAT_MSBS, &cpl_msb, &error);
  741. if (error < 0)
  742. return error;
  743. /* Get lines per frame, clocks per line and interlaced/progresive */
  744. lpfr = lpf_lsb | ((TVP7002_CL_MASK & lpf_msb) << TVP7002_CL_SHIFT);
  745. cpln = cpl_lsb | ((TVP7002_CL_MASK & cpl_msb) << TVP7002_CL_SHIFT);
  746. progressive = (lpf_msb & TVP7002_INPR_MASK) >> TVP7002_IP_SHIFT;
  747. /* Do checking of video modes */
  748. for (index = 0; index < NUM_PRESETS; index++, presets++)
  749. if (lpfr == presets->lines_per_frame &&
  750. progressive == presets->progressive) {
  751. if (presets->cpl_min == 0xffff)
  752. break;
  753. if (cpln >= presets->cpl_min && cpln <= presets->cpl_max)
  754. break;
  755. }
  756. if (index == NUM_PRESETS) {
  757. v4l2_dbg(1, debug, sd, "detection failed: lpf = %x, cpl = %x\n",
  758. lpfr, cpln);
  759. /* Could not detect a signal, so return the 'invalid' preset */
  760. qpreset->preset = V4L2_DV_INVALID;
  761. return 0;
  762. }
  763. /* Set values in found preset */
  764. qpreset->preset = presets->preset;
  765. /* Update lines per frame and clocks per line info */
  766. v4l2_dbg(1, debug, sd, "detected preset: %d\n", presets->preset);
  767. return 0;
  768. }
  769. #ifdef CONFIG_VIDEO_ADV_DEBUG
  770. /*
  771. * tvp7002_g_register() - Get the value of a register
  772. * @sd: ptr to v4l2_subdev struct
  773. * @reg: ptr to v4l2_dbg_register struct
  774. *
  775. * Get the value of a TVP7002 decoder device register.
  776. * Returns zero when successful, -EINVAL if register read fails or
  777. * access to I2C client fails, -EPERM if the call is not allowed
  778. * by diabled CAP_SYS_ADMIN.
  779. */
  780. static int tvp7002_g_register(struct v4l2_subdev *sd,
  781. struct v4l2_dbg_register *reg)
  782. {
  783. struct i2c_client *client = v4l2_get_subdevdata(sd);
  784. u8 val;
  785. int ret;
  786. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  787. return -EINVAL;
  788. if (!capable(CAP_SYS_ADMIN))
  789. return -EPERM;
  790. ret = tvp7002_read(sd, reg->reg & 0xff, &val);
  791. reg->val = val;
  792. return ret;
  793. }
  794. /*
  795. * tvp7002_s_register() - set a control
  796. * @sd: ptr to v4l2_subdev struct
  797. * @reg: ptr to v4l2_dbg_register struct
  798. *
  799. * Get the value of a TVP7002 decoder device register.
  800. * Returns zero when successful, -EINVAL if register read fails or
  801. * -EPERM if call not allowed.
  802. */
  803. static int tvp7002_s_register(struct v4l2_subdev *sd,
  804. struct v4l2_dbg_register *reg)
  805. {
  806. struct i2c_client *client = v4l2_get_subdevdata(sd);
  807. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  808. return -EINVAL;
  809. if (!capable(CAP_SYS_ADMIN))
  810. return -EPERM;
  811. return tvp7002_write(sd, reg->reg & 0xff, reg->val & 0xff);
  812. }
  813. #endif
  814. /*
  815. * tvp7002_enum_fmt() - Enum supported formats
  816. * @sd: pointer to standard V4L2 sub-device structure
  817. * @fmtdesc: pointer to format struct
  818. *
  819. * Enumerate supported formats.
  820. */
  821. static int tvp7002_enum_fmt(struct v4l2_subdev *sd,
  822. struct v4l2_fmtdesc *fmtdesc)
  823. {
  824. /* Check requested format index is within range */
  825. if (fmtdesc->index < 0 || fmtdesc->index >= NUM_FORMATS)
  826. return -EINVAL;
  827. *fmtdesc = tvp7002_fmt_list[fmtdesc->index];
  828. return 0;
  829. }
  830. /*
  831. * tvp7002_s_stream() - V4L2 decoder i/f handler for s_stream
  832. * @sd: pointer to standard V4L2 sub-device structure
  833. * @enable: streaming enable or disable
  834. *
  835. * Sets streaming to enable or disable, if possible.
  836. */
  837. static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable)
  838. {
  839. struct tvp7002 *device = to_tvp7002(sd);
  840. int error = 0;
  841. if (device->streaming == enable)
  842. return 0;
  843. if (enable) {
  844. /* Set output state on (low impedance means stream on) */
  845. error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x00);
  846. device->streaming = enable;
  847. } else {
  848. /* Set output state off (high impedance means stream off) */
  849. error = tvp7002_write(sd, TVP7002_MISC_CTL_2, 0x03);
  850. if (error)
  851. v4l2_dbg(1, debug, sd, "Unable to stop streaming\n");
  852. device->streaming = enable;
  853. }
  854. return error;
  855. }
  856. /*
  857. * tvp7002_log_status() - Print information about register settings
  858. * @sd: ptr to v4l2_subdev struct
  859. *
  860. * Log register values of a TVP7002 decoder device.
  861. * Returns zero or -EINVAL if read operation fails.
  862. */
  863. static int tvp7002_log_status(struct v4l2_subdev *sd)
  864. {
  865. const struct tvp7002_preset_definition *presets = tvp7002_presets;
  866. struct tvp7002 *device = to_tvp7002(sd);
  867. struct v4l2_dv_enum_preset e_preset;
  868. struct v4l2_dv_preset detected;
  869. int i;
  870. detected.preset = V4L2_DV_INVALID;
  871. /* Find my current standard*/
  872. tvp7002_query_dv_preset(sd, &detected);
  873. /* Print standard related code values */
  874. for (i = 0; i < NUM_PRESETS; i++, presets++)
  875. if (presets->preset == detected.preset)
  876. break;
  877. if (v4l_fill_dv_preset_info(device->current_preset->preset, &e_preset))
  878. return -EINVAL;
  879. v4l2_info(sd, "Selected DV Preset: %s\n", e_preset.name);
  880. v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
  881. v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
  882. if (i == NUM_PRESETS) {
  883. v4l2_info(sd, "Detected DV Preset: None\n");
  884. } else {
  885. if (v4l_fill_dv_preset_info(presets->preset, &e_preset))
  886. return -EINVAL;
  887. v4l2_info(sd, "Detected DV Preset: %s\n", e_preset.name);
  888. v4l2_info(sd, " Pixels per line: %u\n", e_preset.width);
  889. v4l2_info(sd, " Lines per frame: %u\n\n", e_preset.height);
  890. }
  891. v4l2_info(sd, "Streaming enabled: %s\n",
  892. device->streaming ? "yes" : "no");
  893. /* Print the current value of the gain control */
  894. v4l2_info(sd, "Gain: %u\n", device->gain);
  895. return 0;
  896. }
  897. /*
  898. * tvp7002_enum_dv_presets() - Enum supported digital video formats
  899. * @sd: pointer to standard V4L2 sub-device structure
  900. * @preset: pointer to format struct
  901. *
  902. * Enumerate supported digital video formats.
  903. */
  904. static int tvp7002_enum_dv_presets(struct v4l2_subdev *sd,
  905. struct v4l2_dv_enum_preset *preset)
  906. {
  907. /* Check requested format index is within range */
  908. if (preset->index >= NUM_PRESETS)
  909. return -EINVAL;
  910. return v4l_fill_dv_preset_info(tvp7002_presets[preset->index].preset, preset);
  911. }
  912. /* V4L2 core operation handlers */
  913. static const struct v4l2_subdev_core_ops tvp7002_core_ops = {
  914. .g_chip_ident = tvp7002_g_chip_ident,
  915. .log_status = tvp7002_log_status,
  916. .g_ctrl = tvp7002_g_ctrl,
  917. .s_ctrl = tvp7002_s_ctrl,
  918. .queryctrl = tvp7002_queryctrl,
  919. #ifdef CONFIG_VIDEO_ADV_DEBUG
  920. .g_register = tvp7002_g_register,
  921. .s_register = tvp7002_s_register,
  922. #endif
  923. };
  924. /* Specific video subsystem operation handlers */
  925. static const struct v4l2_subdev_video_ops tvp7002_video_ops = {
  926. .enum_dv_presets = tvp7002_enum_dv_presets,
  927. .s_dv_preset = tvp7002_s_dv_preset,
  928. .query_dv_preset = tvp7002_query_dv_preset,
  929. .s_stream = tvp7002_s_stream,
  930. .g_fmt = tvp7002_g_fmt,
  931. .s_fmt = tvp7002_s_fmt,
  932. .enum_fmt = tvp7002_enum_fmt,
  933. };
  934. /* V4L2 top level operation handlers */
  935. static const struct v4l2_subdev_ops tvp7002_ops = {
  936. .core = &tvp7002_core_ops,
  937. .video = &tvp7002_video_ops,
  938. };
  939. static struct tvp7002 tvp7002_dev = {
  940. .streaming = 0,
  941. .pix = {
  942. .width = 1280,
  943. .height = 720,
  944. .pixelformat = V4L2_PIX_FMT_UYVY,
  945. .field = V4L2_FIELD_NONE,
  946. .bytesperline = 1280 * 2,
  947. .sizeimage = 1280 * 2 * 720,
  948. .colorspace = V4L2_COLORSPACE_REC709,
  949. },
  950. .current_preset = tvp7002_presets,
  951. .gain = 0,
  952. };
  953. /*
  954. * tvp7002_probe - Probe a TVP7002 device
  955. * @c: ptr to i2c_client struct
  956. * @id: ptr to i2c_device_id struct
  957. *
  958. * Initialize the TVP7002 device
  959. * Returns zero when successful, -EINVAL if register read fails or
  960. * -EIO if i2c access is not available.
  961. */
  962. static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id)
  963. {
  964. struct v4l2_subdev *sd;
  965. struct tvp7002 *device;
  966. struct v4l2_dv_preset preset;
  967. int polarity_a;
  968. int polarity_b;
  969. u8 revision;
  970. int error;
  971. /* Check if the adapter supports the needed features */
  972. if (!i2c_check_functionality(c->adapter,
  973. I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  974. return -EIO;
  975. if (!c->dev.platform_data) {
  976. v4l_err(c, "No platform data!!\n");
  977. return -ENODEV;
  978. }
  979. device = kmalloc(sizeof(struct tvp7002), GFP_KERNEL);
  980. if (!device)
  981. return -ENOMEM;
  982. *device = tvp7002_dev;
  983. sd = &device->sd;
  984. device->pdata = c->dev.platform_data;
  985. /* Tell v4l2 the device is ready */
  986. v4l2_i2c_subdev_init(sd, c, &tvp7002_ops);
  987. v4l_info(c, "tvp7002 found @ 0x%02x (%s)\n",
  988. c->addr, c->adapter->name);
  989. error = tvp7002_read(sd, TVP7002_CHIP_REV, &revision);
  990. if (error < 0)
  991. goto found_error;
  992. /* Get revision number */
  993. v4l2_info(sd, "Rev. %02x detected.\n", revision);
  994. if (revision != 0x02)
  995. v4l2_info(sd, "Unknown revision detected.\n");
  996. /* Initializes TVP7002 to its default values */
  997. error = tvp7002_write_inittab(sd, tvp7002_init_default);
  998. if (error < 0)
  999. goto found_error;
  1000. /* Set polarity information after registers have been set */
  1001. polarity_a = 0x20 | device->pdata->hs_polarity << 5
  1002. | device->pdata->vs_polarity << 2;
  1003. error = tvp7002_write(sd, TVP7002_SYNC_CTL_1, polarity_a);
  1004. if (error < 0)
  1005. goto found_error;
  1006. polarity_b = 0x01 | device->pdata->fid_polarity << 2
  1007. | device->pdata->sog_polarity << 1
  1008. | device->pdata->clk_polarity;
  1009. error = tvp7002_write(sd, TVP7002_MISC_CTL_3, polarity_b);
  1010. if (error < 0)
  1011. goto found_error;
  1012. /* Set registers according to default video mode */
  1013. preset.preset = device->current_preset->preset;
  1014. error = tvp7002_s_dv_preset(sd, &preset);
  1015. found_error:
  1016. if (error < 0)
  1017. kfree(device);
  1018. return error;
  1019. }
  1020. /*
  1021. * tvp7002_remove - Remove TVP7002 device support
  1022. * @c: ptr to i2c_client struct
  1023. *
  1024. * Reset the TVP7002 device
  1025. * Returns zero.
  1026. */
  1027. static int tvp7002_remove(struct i2c_client *c)
  1028. {
  1029. struct v4l2_subdev *sd = i2c_get_clientdata(c);
  1030. struct tvp7002 *device = to_tvp7002(sd);
  1031. v4l2_dbg(1, debug, sd, "Removing tvp7002 adapter"
  1032. "on address 0x%x\n", c->addr);
  1033. v4l2_device_unregister_subdev(sd);
  1034. kfree(device);
  1035. return 0;
  1036. }
  1037. /* I2C Device ID table */
  1038. static const struct i2c_device_id tvp7002_id[] = {
  1039. { "tvp7002", 0 },
  1040. { }
  1041. };
  1042. MODULE_DEVICE_TABLE(i2c, tvp7002_id);
  1043. /* I2C driver data */
  1044. static struct i2c_driver tvp7002_driver = {
  1045. .driver = {
  1046. .owner = THIS_MODULE,
  1047. .name = TVP7002_MODULE_NAME,
  1048. },
  1049. .probe = tvp7002_probe,
  1050. .remove = tvp7002_remove,
  1051. .id_table = tvp7002_id,
  1052. };
  1053. /*
  1054. * tvp7002_init - Initialize driver via I2C interface
  1055. *
  1056. * Register the TVP7002 driver.
  1057. * Return 0 on success or error code on failure.
  1058. */
  1059. static int __init tvp7002_init(void)
  1060. {
  1061. return i2c_add_driver(&tvp7002_driver);
  1062. }
  1063. /*
  1064. * tvp7002_exit - Remove driver via I2C interface
  1065. *
  1066. * Unregister the TVP7002 driver.
  1067. * Returns nothing.
  1068. */
  1069. static void __exit tvp7002_exit(void)
  1070. {
  1071. i2c_del_driver(&tvp7002_driver);
  1072. }
  1073. module_init(tvp7002_init);
  1074. module_exit(tvp7002_exit);