/include/configs/imx31_litekit.h

  1/*
  2 * (C) Copyright 2004
  3 * Texas Instruments.
  4 * Richard Woodruff <r-woodruff2@ti.com>
  5 * Kshitij Gupta <kshitij@ti.com>
  6 *
  7 * Configuration settings for the LogicPD i.MX31 Litekit board.
  8 *
  9 * See file CREDITS for list of people who contributed to this
 10 * project.
 11 *
 12 * This program is free software; you can redistribute it and/or
 13 * modify it under the terms of the GNU General Public License as
 14 * published by the Free Software Foundation; either version 2 of
 15 * the License, or (at your option) any later version.
 16 *
 17 * This program is distributed in the hope that it will be useful,
 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
 20 * GNU General Public License for more details.
 21 *
 22 * You should have received a copy of the GNU General Public License
 23 * along with this program; if not, write to the Free Software
 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 25 * MA 02111-1307 USA
 26 */
 27
 28#ifndef __CONFIG_H
 29#define __CONFIG_H
 30
 31#include <asm/arch/imx-regs.h>
 32
 33 /* High Level Configuration Options */
 34#define CONFIG_ARM1136		1    /* This is an arm1136 CPU core */
 35#define CONFIG_MX31		1    /* in a mx31 */
 36#define CONFIG_MX31_CLK32	32000
 37
 38#define CONFIG_DISPLAY_CPUINFO
 39#define CONFIG_DISPLAY_BOARDINFO
 40
 41#define CONFIG_SYS_TEXT_BASE	0xa0000000
 42
 43#define CONFIG_MACH_TYPE	MACH_TYPE_MX31LITE
 44
 45/* Temporarily disabled */
 46#if 0
 47#define CONFIG_OF_LIBFDT		1
 48#define CONFIG_FIT			1
 49#define CONFIG_FIT_VERBOSE		1
 50#endif
 51
 52#define CONFIG_CMDLINE_TAG		1    /* enable passing of ATAGs */
 53#define CONFIG_SETUP_MEMORY_TAGS	1
 54#define CONFIG_INITRD_TAG		1
 55
 56/*
 57 * Size of malloc() pool
 58 */
 59#define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 128 * 1024)
 60
 61/*
 62 * Hardware drivers
 63 */
 64
 65#define CONFIG_MXC_UART
 66#define CONFIG_MXC_UART_BASE	UART1_BASE
 67#define CONFIG_MXC_GPIO
 68
 69#define CONFIG_HARD_SPI		1
 70#define CONFIG_MXC_SPI		1
 71#define CONFIG_DEFAULT_SPI_BUS	1
 72#define CONFIG_DEFAULT_SPI_MODE	(SPI_MODE_0 | SPI_CS_HIGH)
 73
 74/* PMIC Controller */
 75#define CONFIG_POWER
 76#define CONFIG_POWER_SPI
 77#define CONFIG_POWER_FSL
 78#define CONFIG_FSL_PMIC_BUS	1
 79#define CONFIG_FSL_PMIC_CS	0
 80#define CONFIG_FSL_PMIC_CLK	1000000
 81#define CONFIG_FSL_PMIC_MODE	(SPI_MODE_0 | SPI_CS_HIGH)
 82#define CONFIG_FSL_PMIC_BITLEN	32
 83#define CONFIG_RTC_MC13XXX
 84
 85/* allow to overwrite serial and ethaddr */
 86#define CONFIG_ENV_OVERWRITE
 87#define CONFIG_CONS_INDEX	1
 88#define CONFIG_BAUDRATE		115200
 89
 90/***********************************************************
 91 * Command definition
 92 ***********************************************************/
 93
 94#include <config_cmd_default.h>
 95
 96#define CONFIG_CMD_MII
 97#define CONFIG_CMD_PING
 98#define CONFIG_CMD_SPI
 99#define CONFIG_CMD_DATE
100#define CONFIG_CMD_NAND
101
102#define CONFIG_BOOTDELAY	3
103
104#define CONFIG_NETMASK		255.255.255.0
105#define CONFIG_IPADDR		192.168.23.168
106#define CONFIG_SERVERIP		192.168.23.2
107
108#define	CONFIG_EXTRA_ENV_SETTINGS											\
109	"bootargs_base=setenv bootargs console=ttySMX0,115200\0"							\
110	"bootargs_nfs=setenv bootargs $(bootargs) root=/dev/nfs ip=dhcp nfsroot=$(serverip):$(nfsrootfs),v3,tcp\0"	\
111	"bootcmd=run bootcmd_net\0"											\
112	"bootcmd_net=run bootargs_base bootargs_mtd bootargs_nfs; tftpboot 0x80000000 uImage-mx31; bootm\0"		\
113	"prg_uboot=tftpboot 0x80000000 u-boot-imx31_litekit.bin; protect off all; erase 0xa00d0000 0xa01effff; cp.b 0x80000000 0xa00d0000 $(filesize)\0"
114
115
116#define CONFIG_SMC911X		1
117#define CONFIG_SMC911X_BASE	(CS4_BASE + 0x00020000)
118#define CONFIG_SMC911X_32_BIT	1
119
120/*
121 * Miscellaneous configurable options
122 */
123#define CONFIG_SYS_LONGHELP		/* undef to save memory */
124#define CONFIG_SYS_PROMPT		"uboot> "
125#define CONFIG_SYS_CBSIZE		256  /* Console I/O Buffer Size */
126/* Print Buffer Size */
127#define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
128#define CONFIG_SYS_MAXARGS		16          /* max number of command args */
129#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE  /* Boot Argument Buffer Size */
130
131#define CONFIG_SYS_MEMTEST_START	0  /* memtest works on */
132#define CONFIG_SYS_MEMTEST_END		0x10000
133
134#define CONFIG_SYS_LOAD_ADDR		0 /* default load address */
135
136#define CONFIG_SYS_HZ			1000
137
138#define CONFIG_CMDLINE_EDITING	1
139
140/*-----------------------------------------------------------------------
141 * Physical Memory Map
142 */
143#define CONFIG_NR_DRAM_BANKS	1
144#define PHYS_SDRAM_1		CSD0_BASE
145#define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)
146#define CONFIG_BOARD_EARLY_INIT_F
147
148#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
149#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
150#define CONFIG_SYS_INIT_RAM_SIZE		IRAM_SIZE
151#define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
152#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
153
154/*-----------------------------------------------------------------------
155 * FLASH and environment organization
156 */
157#define CONFIG_SYS_FLASH_BASE		CS0_BASE
158#define CONFIG_SYS_MAX_FLASH_BANKS	1           /* max number of memory banks */
159#define CONFIG_SYS_MAX_FLASH_SECT	128	     /* max number of sectors on one chip */
160#define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE /* Monitor at beginning of flash */
161
162#define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + 0x001f0000)
163#define	CONFIG_ENV_IS_IN_FLASH	1
164#define CONFIG_ENV_SECT_SIZE	(64 * 1024)
165#define CONFIG_ENV_SIZE		(64 * 1024)
166
167/*-----------------------------------------------------------------------
168 * CFI FLASH driver setup
169 */
170#define CONFIG_SYS_FLASH_CFI		1	/* Flash memory is CFI compliant */
171#define CONFIG_FLASH_CFI_DRIVER	1	/* Use drivers/cfi_flash.c */
172#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1	/* Use buffered writes (~10x faster) */
173#define CONFIG_SYS_FLASH_PROTECTION	1	/* Use hardware sector protection */
174
175/* timeout values are in ticks */
176#define CONFIG_SYS_FLASH_ERASE_TOUT	(100*CONFIG_SYS_HZ) /* Timeout for Flash Erase */
177#define CONFIG_SYS_FLASH_WRITE_TOUT	(100*CONFIG_SYS_HZ) /* Timeout for Flash Write */
178
179/*
180 * JFFS2 partitions
181 */
182#undef CONFIG_CMD_MTDPARTS
183#define CONFIG_JFFS2_DEV	"nor0"
184
185/*
186 * NAND flash
187 */
188#define CONFIG_NAND_MXC
189#define CONFIG_MXC_NAND_REGS_BASE	NFC_BASE_ADDR
190#define CONFIG_SYS_MAX_NAND_DEVICE	1
191#define CONFIG_SYS_NAND_BASE		NFC_BASE_ADDR
192#define CONFIG_MXC_NAND_HWECC
193
194#endif /* __CONFIG_H */