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/arch/x86/include/asm/xen/interface.h

https://gitlab.com/Team-OSE-old/SimpleKernel
C Header | 177 lines | 121 code | 16 blank | 40 comment | 8 complexity | cb8db0834a2ae5277c722f5276d22ce0 MD5 | raw file
  1/******************************************************************************
  2 * arch-x86_32.h
  3 *
  4 * Guest OS interface to x86 Xen.
  5 *
  6 * Copyright (c) 2004, K A Fraser
  7 */
  8
  9#ifndef _ASM_X86_XEN_INTERFACE_H
 10#define _ASM_X86_XEN_INTERFACE_H
 11
 12#ifdef __XEN__
 13#define __DEFINE_GUEST_HANDLE(name, type) \
 14    typedef struct { type *p; } __guest_handle_ ## name
 15#else
 16#define __DEFINE_GUEST_HANDLE(name, type) \
 17    typedef type * __guest_handle_ ## name
 18#endif
 19
 20#define DEFINE_GUEST_HANDLE_STRUCT(name) \
 21	__DEFINE_GUEST_HANDLE(name, struct name)
 22#define DEFINE_GUEST_HANDLE(name) __DEFINE_GUEST_HANDLE(name, name)
 23#define GUEST_HANDLE(name)        __guest_handle_ ## name
 24
 25#ifdef __XEN__
 26#if defined(__i386__)
 27#define set_xen_guest_handle(hnd, val)			\
 28	do {						\
 29		if (sizeof(hnd) == 8)			\
 30			*(uint64_t *)&(hnd) = 0;	\
 31		(hnd).p = val;				\
 32	} while (0)
 33#elif defined(__x86_64__)
 34#define set_xen_guest_handle(hnd, val)	do { (hnd).p = val; } while (0)
 35#endif
 36#else
 37#if defined(__i386__)
 38#define set_xen_guest_handle(hnd, val)			\
 39	do {						\
 40		if (sizeof(hnd) == 8)			\
 41			*(uint64_t *)&(hnd) = 0;	\
 42		(hnd) = val;				\
 43	} while (0)
 44#elif defined(__x86_64__)
 45#define set_xen_guest_handle(hnd, val)	do { (hnd) = val; } while (0)
 46#endif
 47#endif
 48
 49#ifndef __ASSEMBLY__
 50/* Guest handles for primitive C types. */
 51__DEFINE_GUEST_HANDLE(uchar, unsigned char);
 52__DEFINE_GUEST_HANDLE(uint,  unsigned int);
 53__DEFINE_GUEST_HANDLE(ulong, unsigned long);
 54DEFINE_GUEST_HANDLE(char);
 55DEFINE_GUEST_HANDLE(int);
 56DEFINE_GUEST_HANDLE(long);
 57DEFINE_GUEST_HANDLE(void);
 58DEFINE_GUEST_HANDLE(uint64_t);
 59DEFINE_GUEST_HANDLE(uint32_t);
 60#endif
 61
 62#ifndef HYPERVISOR_VIRT_START
 63#define HYPERVISOR_VIRT_START mk_unsigned_long(__HYPERVISOR_VIRT_START)
 64#endif
 65
 66#define MACH2PHYS_VIRT_START  mk_unsigned_long(__MACH2PHYS_VIRT_START)
 67#define MACH2PHYS_VIRT_END    mk_unsigned_long(__MACH2PHYS_VIRT_END)
 68#define MACH2PHYS_NR_ENTRIES  ((MACH2PHYS_VIRT_END-MACH2PHYS_VIRT_START)>>__MACH2PHYS_SHIFT)
 69
 70/* Maximum number of virtual CPUs in multi-processor guests. */
 71#define MAX_VIRT_CPUS 32
 72
 73/*
 74 * SEGMENT DESCRIPTOR TABLES
 75 */
 76/*
 77 * A number of GDT entries are reserved by Xen. These are not situated at the
 78 * start of the GDT because some stupid OSes export hard-coded selector values
 79 * in their ABI. These hard-coded values are always near the start of the GDT,
 80 * so Xen places itself out of the way, at the far end of the GDT.
 81 */
 82#define FIRST_RESERVED_GDT_PAGE  14
 83#define FIRST_RESERVED_GDT_BYTE  (FIRST_RESERVED_GDT_PAGE * 4096)
 84#define FIRST_RESERVED_GDT_ENTRY (FIRST_RESERVED_GDT_BYTE / 8)
 85
 86/*
 87 * Send an array of these to HYPERVISOR_set_trap_table()
 88 * The privilege level specifies which modes may enter a trap via a software
 89 * interrupt. On x86/64, since rings 1 and 2 are unavailable, we allocate
 90 * privilege levels as follows:
 91 *  Level == 0: No one may enter
 92 *  Level == 1: Kernel may enter
 93 *  Level == 2: Kernel may enter
 94 *  Level == 3: Everyone may enter
 95 */
 96#define TI_GET_DPL(_ti)		((_ti)->flags & 3)
 97#define TI_GET_IF(_ti)		((_ti)->flags & 4)
 98#define TI_SET_DPL(_ti, _dpl)	((_ti)->flags |= (_dpl))
 99#define TI_SET_IF(_ti, _if)	((_ti)->flags |= ((!!(_if))<<2))
100
101#ifndef __ASSEMBLY__
102struct trap_info {
103    uint8_t       vector;  /* exception vector                              */
104    uint8_t       flags;   /* 0-3: privilege level; 4: clear event enable?  */
105    uint16_t      cs;      /* code selector                                 */
106    unsigned long address; /* code offset                                   */
107};
108DEFINE_GUEST_HANDLE_STRUCT(trap_info);
109
110struct arch_shared_info {
111    unsigned long max_pfn;                  /* max pfn that appears in table */
112    /* Frame containing list of mfns containing list of mfns containing p2m. */
113    unsigned long pfn_to_mfn_frame_list_list;
114    unsigned long nmi_reason;
115};
116#endif	/* !__ASSEMBLY__ */
117
118#ifdef CONFIG_X86_32
119#include "interface_32.h"
120#else
121#include "interface_64.h"
122#endif
123
124#ifndef __ASSEMBLY__
125/*
126 * The following is all CPU context. Note that the fpu_ctxt block is filled
127 * in by FXSAVE if the CPU has feature FXSR; otherwise FSAVE is used.
128 */
129struct vcpu_guest_context {
130    /* FPU registers come first so they can be aligned for FXSAVE/FXRSTOR. */
131    struct { char x[512]; } fpu_ctxt;       /* User-level FPU registers     */
132#define VGCF_I387_VALID (1<<0)
133#define VGCF_HVM_GUEST  (1<<1)
134#define VGCF_IN_KERNEL  (1<<2)
135    unsigned long flags;                    /* VGCF_* flags                 */
136    struct cpu_user_regs user_regs;         /* User-level CPU registers     */
137    struct trap_info trap_ctxt[256];        /* Virtual IDT                  */
138    unsigned long ldt_base, ldt_ents;       /* LDT (linear address, # ents) */
139    unsigned long gdt_frames[16], gdt_ents; /* GDT (machine frames, # ents) */
140    unsigned long kernel_ss, kernel_sp;     /* Virtual TSS (only SS1/SP1)   */
141    /* NB. User pagetable on x86/64 is placed in ctrlreg[1]. */
142    unsigned long ctrlreg[8];               /* CR0-CR7 (control registers)  */
143    unsigned long debugreg[8];              /* DB0-DB7 (debug registers)    */
144#ifdef __i386__
145    unsigned long event_callback_cs;        /* CS:EIP of event callback     */
146    unsigned long event_callback_eip;
147    unsigned long failsafe_callback_cs;     /* CS:EIP of failsafe callback  */
148    unsigned long failsafe_callback_eip;
149#else
150    unsigned long event_callback_eip;
151    unsigned long failsafe_callback_eip;
152    unsigned long syscall_callback_eip;
153#endif
154    unsigned long vm_assist;                /* VMASST_TYPE_* bitmap */
155#ifdef __x86_64__
156    /* Segment base addresses. */
157    uint64_t      fs_base;
158    uint64_t      gs_base_kernel;
159    uint64_t      gs_base_user;
160#endif
161};
162DEFINE_GUEST_HANDLE_STRUCT(vcpu_guest_context);
163#endif	/* !__ASSEMBLY__ */
164
165/*
166 * Prefix forces emulation of some non-trapping instructions.
167 * Currently only CPUID.
168 */
169#ifdef __ASSEMBLY__
170#define XEN_EMULATE_PREFIX .byte 0x0f,0x0b,0x78,0x65,0x6e ;
171#define XEN_CPUID          XEN_EMULATE_PREFIX cpuid
172#else
173#define XEN_EMULATE_PREFIX ".byte 0x0f,0x0b,0x78,0x65,0x6e ; "
174#define XEN_CPUID          XEN_EMULATE_PREFIX "cpuid"
175#endif
176
177#endif /* _ASM_X86_XEN_INTERFACE_H */