/include/configs/m28evk.h

https://gitlab.com/ubuntu-omap/u-boot-omap5 · C Header · 325 lines · 212 code · 29 blank · 84 comment · 0 complexity · 66146800a206235d1640c0984cd9c124 MD5 · raw file

  1. /*
  2. * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com>
  3. * on behalf of DENX Software Engineering GmbH
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License as
  7. * published by the Free Software Foundation; either version 2 of
  8. * the License, or (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  18. * MA 02111-1307 USA
  19. */
  20. #ifndef __M28EVK_CONFIG_H__
  21. #define __M28EVK_CONFIG_H__
  22. /*
  23. * SoC configurations
  24. */
  25. #define CONFIG_MX28 /* i.MX28 SoC */
  26. #define CONFIG_MXS_GPIO /* GPIO control */
  27. #define CONFIG_SYS_HZ 1000 /* Ticks per second */
  28. /*
  29. * Define M28EVK machine type by hand until it lands in mach-types
  30. */
  31. #define MACH_TYPE_M28EVK 3613
  32. #define CONFIG_MACH_TYPE MACH_TYPE_M28EVK
  33. #include <asm/arch/regs-base.h>
  34. #define CONFIG_SYS_NO_FLASH
  35. #define CONFIG_BOARD_EARLY_INIT_F
  36. #define CONFIG_ARCH_MISC_INIT
  37. /*
  38. * SPL
  39. */
  40. #define CONFIG_SPL
  41. #define CONFIG_SPL_NO_CPU_SUPPORT_CODE
  42. #define CONFIG_SPL_START_S_PATH "arch/arm/cpu/arm926ejs/mxs"
  43. #define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds"
  44. #define CONFIG_SPL_LIBCOMMON_SUPPORT
  45. #define CONFIG_SPL_LIBGENERIC_SUPPORT
  46. #define CONFIG_SPL_GPIO_SUPPORT
  47. /*
  48. * U-Boot Commands
  49. */
  50. #include <config_cmd_default.h>
  51. #define CONFIG_DISPLAY_CPUINFO
  52. #define CONFIG_DOS_PARTITION
  53. #define CONFIG_CMD_CACHE
  54. #define CONFIG_CMD_DATE
  55. #define CONFIG_CMD_DHCP
  56. #define CONFIG_CMD_EEPROM
  57. #define CONFIG_CMD_EXT2
  58. #define CONFIG_CMD_FAT
  59. #define CONFIG_CMD_GPIO
  60. #define CONFIG_CMD_I2C
  61. #define CONFIG_CMD_MII
  62. #define CONFIG_CMD_MMC
  63. #define CONFIG_CMD_NAND
  64. #define CONFIG_CMD_NET
  65. #define CONFIG_CMD_NFS
  66. #define CONFIG_CMD_PING
  67. #define CONFIG_CMD_SETEXPR
  68. #define CONFIG_CMD_SF
  69. #define CONFIG_CMD_SPI
  70. #define CONFIG_CMD_USB
  71. /*
  72. * Memory configurations
  73. */
  74. #define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
  75. #define PHYS_SDRAM_1 0x40000000 /* Base address */
  76. #define PHYS_SDRAM_1_SIZE 0x20000000 /* Max 512 MB RAM */
  77. #define CONFIG_SYS_MALLOC_LEN 0x00400000 /* 4 MB for malloc */
  78. #define CONFIG_SYS_GBL_DATA_SIZE 128 /* Initial data */
  79. #define CONFIG_SYS_MEMTEST_START 0x40000000 /* Memtest start adr */
  80. #define CONFIG_SYS_MEMTEST_END 0x40400000 /* 4 MB RAM test */
  81. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  82. /* Point initial SP in SRAM so SPL can use it too. */
  83. #define CONFIG_SYS_INIT_RAM_ADDR 0x00000000
  84. #define CONFIG_SYS_INIT_RAM_SIZE (128 * 1024)
  85. #define CONFIG_SYS_INIT_SP_OFFSET \
  86. (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  87. #define CONFIG_SYS_INIT_SP_ADDR \
  88. (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  89. /*
  90. * We need to sacrifice first 4 bytes of RAM here to avoid triggering some
  91. * strange BUG in ROM corrupting first 4 bytes of RAM when loading U-Boot
  92. * binary. In case there was more of this mess, 0x100 bytes are skipped.
  93. */
  94. #define CONFIG_SYS_TEXT_BASE 0x40000100
  95. /*
  96. * U-Boot general configurations
  97. */
  98. #define CONFIG_SYS_LONGHELP
  99. #define CONFIG_SYS_PROMPT "=> "
  100. #define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */
  101. #define CONFIG_SYS_PBSIZE \
  102. (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  103. /* Print buffer size */
  104. #define CONFIG_SYS_MAXARGS 32 /* Max number of command args */
  105. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
  106. /* Boot argument buffer size */
  107. #define CONFIG_VERSION_VARIABLE /* U-BOOT version */
  108. #define CONFIG_AUTO_COMPLETE /* Command auto complete */
  109. #define CONFIG_CMDLINE_EDITING /* Command history etc */
  110. #define CONFIG_SYS_HUSH_PARSER
  111. /*
  112. * Serial Driver
  113. */
  114. #define CONFIG_PL011_SERIAL
  115. #define CONFIG_PL011_CLOCK 24000000
  116. #define CONFIG_PL01x_PORTS { (void *)MXS_UARTDBG_BASE }
  117. #define CONFIG_CONS_INDEX 0
  118. #define CONFIG_BAUDRATE 115200 /* Default baud rate */
  119. /*
  120. * MMC Driver
  121. */
  122. #ifdef CONFIG_CMD_MMC
  123. #define CONFIG_MMC
  124. #define CONFIG_BOUNCE_BUFFER
  125. #define CONFIG_GENERIC_MMC
  126. #define CONFIG_MXS_MMC
  127. #endif
  128. /*
  129. * APBH DMA
  130. */
  131. #define CONFIG_APBH_DMA
  132. /*
  133. * NAND
  134. */
  135. #define CONFIG_ENV_SIZE (16 * 1024)
  136. #ifdef CONFIG_CMD_NAND
  137. #define CONFIG_NAND_MXS
  138. #define CONFIG_SYS_MAX_NAND_DEVICE 1
  139. #define CONFIG_SYS_NAND_BASE 0x60000000
  140. #define CONFIG_SYS_NAND_5_ADDR_CYCLE
  141. /* Environment is in NAND */
  142. #define CONFIG_ENV_IS_IN_NAND
  143. #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
  144. #define CONFIG_ENV_SECT_SIZE (128 * 1024)
  145. #define CONFIG_ENV_RANGE (512 * 1024)
  146. #define CONFIG_ENV_OFFSET 0x300000
  147. #define CONFIG_ENV_OFFSET_REDUND \
  148. (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE)
  149. #define CONFIG_CMD_UBI
  150. #define CONFIG_CMD_UBIFS
  151. #define CONFIG_CMD_MTDPARTS
  152. #define CONFIG_RBTREE
  153. #define CONFIG_LZO
  154. #define CONFIG_MTD_DEVICE
  155. #define CONFIG_MTD_PARTITIONS
  156. #define MTDIDS_DEFAULT "nand0=gpmi-nand"
  157. #define MTDPARTS_DEFAULT \
  158. "mtdparts=gpmi-nand:" \
  159. "3m(bootloader)ro," \
  160. "512k(environment)," \
  161. "512k(redundant-environment)," \
  162. "4m(kernel)," \
  163. "128k(fdt)," \
  164. "8m(ramdisk)," \
  165. "-(filesystem)"
  166. #else
  167. #define CONFIG_ENV_IS_NOWHERE
  168. #endif
  169. /*
  170. * Ethernet on SOC (FEC)
  171. */
  172. #ifdef CONFIG_CMD_NET
  173. #define CONFIG_ETHPRIME "FEC0"
  174. #define CONFIG_FEC_MXC
  175. #define CONFIG_MII
  176. #define CONFIG_FEC_XCV_TYPE RMII
  177. #endif
  178. /*
  179. * I2C
  180. */
  181. #ifdef CONFIG_CMD_I2C
  182. #define CONFIG_I2C_MXS
  183. #define CONFIG_HARD_I2C
  184. #define CONFIG_SYS_I2C_SPEED 400000
  185. #endif
  186. /*
  187. * EEPROM
  188. */
  189. #ifdef CONFIG_CMD_EEPROM
  190. #define CONFIG_SYS_I2C_MULTI_EEPROMS
  191. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
  192. #endif
  193. /*
  194. * RTC
  195. */
  196. #ifdef CONFIG_CMD_DATE
  197. /* Use the internal RTC in the MXS chip */
  198. #define CONFIG_RTC_INTERNAL
  199. #ifdef CONFIG_RTC_INTERNAL
  200. #define CONFIG_RTC_MXS
  201. #else
  202. #define CONFIG_RTC_M41T62
  203. #define CONFIG_SYS_I2C_RTC_ADDR 0x68
  204. #define CONFIG_SYS_M41T11_BASE_YEAR 2000
  205. #endif
  206. #endif
  207. /*
  208. * USB
  209. */
  210. #ifdef CONFIG_CMD_USB
  211. #define CONFIG_USB_EHCI
  212. #define CONFIG_USB_EHCI_MXS
  213. #define CONFIG_EHCI_MXS_PORT 1
  214. #define CONFIG_EHCI_IS_TDI
  215. #define CONFIG_USB_STORAGE
  216. #endif
  217. /*
  218. * SPI
  219. */
  220. #ifdef CONFIG_CMD_SPI
  221. #define CONFIG_HARD_SPI
  222. #define CONFIG_MXS_SPI
  223. #define CONFIG_MXS_SPI_DMA_ENABLE
  224. #define CONFIG_SPI_HALF_DUPLEX
  225. #define CONFIG_DEFAULT_SPI_BUS 2
  226. #define CONFIG_DEFAULT_SPI_CS 0
  227. #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
  228. /* SPI FLASH */
  229. #ifdef CONFIG_CMD_SF
  230. #define CONFIG_SPI_FLASH
  231. #define CONFIG_SPI_FLASH_STMICRO
  232. #define CONFIG_SF_DEFAULT_BUS 2
  233. #define CONFIG_SF_DEFAULT_CS 0
  234. #define CONFIG_SF_DEFAULT_SPEED 40000000
  235. #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
  236. #define CONFIG_ENV_SPI_BUS 2
  237. #define CONFIG_ENV_SPI_CS 0
  238. #define CONFIG_ENV_SPI_MAX_HZ 40000000
  239. #define CONFIG_ENV_SPI_MODE SPI_MODE_0
  240. #endif
  241. #endif
  242. /*
  243. * Boot Linux
  244. */
  245. #define CONFIG_CMDLINE_TAG
  246. #define CONFIG_SETUP_MEMORY_TAGS
  247. #define CONFIG_BOOTDELAY 3
  248. #define CONFIG_BOOTFILE "uImage"
  249. #define CONFIG_BOOTARGS "console=ttyAMA0,115200n8 "
  250. #define CONFIG_BOOTCOMMAND "run bootcmd_net"
  251. #define CONFIG_LOADADDR 0x42000000
  252. #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
  253. #define CONFIG_OF_LIBFDT
  254. /*
  255. * Extra Environments
  256. */
  257. #define CONFIG_EXTRA_ENV_SETTINGS \
  258. "update_nand_full_filename=u-boot.nand\0" \
  259. "update_nand_firmware_filename=u-boot.sb\0" \
  260. "update_sd_firmware_filename=u-boot.sd\0" \
  261. "update_nand_firmware_maxsz=0x100000\0" \
  262. "update_nand_stride=0x40\0" /* MX28 datasheet ch. 12.12 */ \
  263. "update_nand_count=0x4\0" /* MX28 datasheet ch. 12.12 */ \
  264. "update_nand_get_fcb_size=" /* Get size of FCB blocks */ \
  265. "nand device 0 ; " \
  266. "nand info ; " \
  267. "setexpr fcb_sz ${update_nand_stride} * ${update_nand_count};" \
  268. "setexpr update_nand_fcb ${fcb_sz} * ${nand_writesize}\0" \
  269. "update_nand_full=" /* Update FCB, DBBT and FW */ \
  270. "if tftp ${update_nand_full_filename} ; then " \
  271. "run update_nand_get_fcb_size ; " \
  272. "nand scrub -y 0x0 ${filesize} ; " \
  273. "nand write.raw ${loadaddr} 0x0 ${fcb_sz} ; " \
  274. "setexpr update_off ${loadaddr} + ${update_nand_fcb} ; " \
  275. "setexpr update_sz ${filesize} - ${update_nand_fcb} ; " \
  276. "nand write ${update_off} ${update_nand_fcb} ${update_sz} ; " \
  277. "fi\0" \
  278. "update_nand_firmware=" /* Update only firmware */ \
  279. "if tftp ${update_nand_firmware_filename} ; then " \
  280. "run update_nand_get_fcb_size ; " \
  281. "setexpr fcb_sz ${update_nand_fcb} * 2 ; " /* FCB + DBBT */ \
  282. "setexpr fw_sz ${update_nand_firmware_maxsz} * 2 ; " \
  283. "setexpr fw_off ${fcb_sz} + ${update_nand_firmware_maxsz};" \
  284. "nand erase ${fcb_sz} ${fw_sz} ; " \
  285. "nand write ${loadaddr} ${fcb_sz} ${filesize} ; " \
  286. "nand write ${loadaddr} ${fw_off} ${filesize} ; " \
  287. "fi\0" \
  288. "update_sd_firmware=" /* Update the SD firmware partition */ \
  289. "if mmc rescan ; then " \
  290. "if tftp ${update_sd_firmware_filename} ; then " \
  291. "setexpr fw_sz ${filesize} / 0x200 ; " /* SD block size */ \
  292. "setexpr fw_sz ${fw_sz} + 1 ; " \
  293. "mmc write ${loadaddr} 0x800 ${fw_sz} ; " \
  294. "fi ; " \
  295. "fi\0"
  296. #endif /* __M28EVK_CONFIG_H__ */