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/board/esd/tasreg/tasreg.c

https://gitlab.com/vogoplayer-tools/uboot
C | 449 lines | 290 code | 82 blank | 77 comment | 19 complexity | ce754c68e5a60bb2b6ee59dd1a86f572 MD5 | raw file
  1/*
  2 * (C) Copyright 2004
  3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  4 *
  5 * See file CREDITS for list of people who contributed to this
  6 * project.
  7 *
  8 * This program is free software; you can redistribute it and/or
  9 * modify it under the terms of the GNU General Public License as
 10 * published by the Free Software Foundation; either version 2 of
 11 * the License, or (at your option) any later version.
 12 *
 13 * This program is distributed in the hope that it will be useful,
 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 16 * GNU General Public License for more details.
 17 *
 18 * You should have received a copy of the GNU General Public License
 19 * along with this program; if not, write to the Free Software
 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 21 * MA 02111-1307 USA
 22 */
 23
 24#include <common.h>
 25#include <command.h>
 26#include <malloc.h>
 27#include <asm/m5249.h>
 28
 29
 30/* Prototypes */
 31int gunzip(void *, int, unsigned char *, unsigned long *);
 32int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
 33int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len);
 34int i2c_read(uchar chip, uint addr, int alen, uchar *buffer, int len);
 35
 36
 37#if 0
 38#define FPGA_DEBUG
 39#endif
 40
 41/* predefine these here for FPGA programming (before including fpga.c) */
 42#define SET_FPGA(data)  mbar2_writeLong(MCFSIM_GPIO1_OUT, data)
 43#define FPGA_DONE_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CFG_FPGA_DONE)
 44#define FPGA_INIT_STATE (mbar2_readLong(MCFSIM_GPIO1_READ) & CFG_FPGA_INIT)
 45#define FPGA_PROG_ACTIVE_HIGH          /* on this platform is PROG active high!   */
 46#define out32(a,b)                     /* nothing to do (gpio already configured) */
 47
 48
 49/* fpga configuration data - generated by bin2cc */
 50const unsigned char fpgadata[] =
 51{
 52#include "fpgadata.c"
 53};
 54
 55/*
 56 * include common fpga code (for esd boards)
 57 */
 58#include "../common/fpga.c"
 59
 60
 61int checkboard (void) {
 62	ulong val;
 63	uchar val8;
 64
 65	puts ("Board: ");
 66	puts("esd TASREG");
 67	val8 = ((uchar)~((uchar)mbar2_readLong(MCFSIM_GPIO1_READ) >> 4)) & 0xf;
 68	printf(" (Switch=%1X)\n", val8);
 69
 70	/*
 71	 * Set LED on
 72	 */
 73	val = mbar2_readLong(MCFSIM_GPIO1_OUT) & ~CFG_GPIO1_LED;
 74	mbar2_writeLong(MCFSIM_GPIO1_OUT, val);   /* Set LED on */
 75
 76	return 0;
 77};
 78
 79
 80long int initdram (int board_type) {
 81	unsigned long	junk = 0xa5a59696;
 82
 83	/*
 84	 *  Note:
 85	 *	RC = ([(RefreshTime/#rows) / (1/BusClk)] / 16) - 1
 86	 */
 87
 88#ifdef CFG_FAST_CLK
 89	/*
 90	 * Busclk=70MHz, RefreshTime=64ms, #rows=4096 (4K)
 91	 * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=39
 92	 */
 93	mbar_writeShort(MCFSIM_DCR, 0x8239);
 94#elif CFG_PLL_BYPASS
 95	/*
 96	 * Busclk=5.6448MHz, RefreshTime=64ms, #rows=8192 (8K)
 97	 * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=02
 98	 */
 99	mbar_writeShort(MCFSIM_DCR, 0x8202);
100#else
101	/*
102	 * Busclk=36MHz, RefreshTime=64ms, #rows=4096 (4K)
103	 * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=22 (562 bus clock cycles)
104	 */
105	mbar_writeShort(MCFSIM_DCR, 0x8222);
106#endif
107
108	/*
109	 * SDRAM starts at 0x0000_0000, CASL=10, CBM=010, PS=10 (16bit port),
110	 * PM=1 (continuous page mode)
111	 */
112
113	/* RE=0 (keep auto-refresh disabled while setting up registers) */
114	mbar_writeLong(MCFSIM_DACR0, 0x00003324);
115
116	/* BAM=007c (bits 22,21 are bank selects; 256kB blocks) */
117	mbar_writeLong(MCFSIM_DMR0, 0x01fc0001);
118
119	/** Precharge sequence **/
120	mbar_writeLong(MCFSIM_DACR0, 0x0000332c); /* Set DACR0[IP] (bit 3) */
121	*((volatile unsigned long *) 0x00) = junk; /* write to a memory location to init. precharge */
122	udelay(0x10); /* Allow several Precharge cycles */
123
124	/** Refresh Sequence **/
125	mbar_writeLong(MCFSIM_DACR0, 0x0000b324); /* Enable the refresh bit, DACR0[RE] (bit 15) */
126	udelay(0x7d0); /* Allow gobs of refresh cycles */
127
128	/** Mode Register initialization **/
129	mbar_writeLong(MCFSIM_DACR0, 0x0000b364);  /* Enable DACR0[IMRS] (bit 6); RE remains enabled */
130	*((volatile unsigned long *) 0x800) = junk; /* Access RAM to initialize the mode register */
131
132	return CFG_SDRAM_SIZE * 1024 * 1024;
133};
134
135
136int testdram (void) {
137	/* TODO: XXX XXX XXX */
138	printf ("DRAM test not implemented!\n");
139
140	return (0);
141}
142
143
144int misc_init_r (void)
145{
146	unsigned char *dst;
147	ulong len = sizeof(fpgadata);
148	int status;
149	int index;
150	int i;
151	uchar buf[8];
152
153	dst = malloc(CFG_FPGA_MAX_SIZE);
154	if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
155		printf ("GUNZIP ERROR - must RESET board to recover\n");
156		do_reset (NULL, 0, 0, NULL);
157	}
158
159	status = fpga_boot(dst, len);
160	if (status != 0) {
161		printf("\nFPGA: Booting failed ");
162		switch (status) {
163		case ERROR_FPGA_PRG_INIT_LOW:
164			printf("(Timeout: INIT not low after asserting PROGRAM*)\n ");
165			break;
166		case ERROR_FPGA_PRG_INIT_HIGH:
167			printf("(Timeout: INIT not high after deasserting PROGRAM*)\n ");
168			break;
169		case ERROR_FPGA_PRG_DONE:
170			printf("(Timeout: DONE not high after programming FPGA)\n ");
171			break;
172		}
173
174		/* display infos on fpgaimage */
175		index = 15;
176		for (i=0; i<4; i++) {
177			len = dst[index];
178			printf("FPGA: %s\n", &(dst[index+1]));
179			index += len+3;
180		}
181		putc ('\n');
182		/* delayed reboot */
183		for (i=20; i>0; i--) {
184			printf("Rebooting in %2d seconds \r",i);
185			for (index=0;index<1000;index++)
186				udelay(1000);
187		}
188		putc ('\n');
189		do_reset(NULL, 0, 0, NULL);
190	}
191
192	puts("FPGA:  ");
193
194	/* display infos on fpgaimage */
195	index = 15;
196	for (i=0; i<4; i++) {
197		len = dst[index];
198		printf("%s ", &(dst[index+1]));
199		index += len+3;
200	}
201	putc ('\n');
202
203	free(dst);
204
205	/*
206	 *
207	 */
208	buf[0] = 0x00;
209	buf[1] = 0x32;
210	buf[2] = 0x3f;
211	i2c_write(0x38, 0, 0, buf, 3);
212
213	return (0);
214}
215
216
217#if 1 /* test-only: board specific test commands */
218int i2c_probe(uchar addr);
219
220/*
221 */
222int do_iploop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
223{
224	ulong addr;
225
226	if (argc < 2) {
227		puts("ERROR!\n");
228		return -1;
229	}
230
231	addr = simple_strtol (argv[1], NULL, 16);
232
233	printf("iprobe looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
234
235	for (;;) {
236		i2c_probe(addr);
237
238		/* Abort if ctrl-c was pressed */
239		if (ctrlc()) {
240			puts("\nAbort\n");
241			return 0;
242		}
243
244		udelay(1000);
245	}
246
247	return 0;
248}
249U_BOOT_CMD(
250	iploop,	2,	1,	do_iploop,
251	"iploop - iprobe loop <addr>\n",
252	NULL
253	);
254
255/*
256 */
257int do_codec(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
258{
259	uchar buf[8];
260
261	*(volatile ushort *)0xe0000000 = 0x4000;
262
263	udelay(5000); /* wait for 5ms */
264
265	buf[0] = 0x10;
266	buf[1] = 0x07;
267	buf[2] = 0x03;
268	i2c_write(0x10, 0, 0, buf, 3);
269
270	buf[0] = 0x10;
271	buf[1] = 0x01;
272	buf[2] = 0x80;
273	i2c_write(0x10, 0, 0, buf, 3);
274
275	buf[0] = 0x10;
276	buf[1] = 0x02;
277	buf[2] = 0x03;
278	i2c_write(0x10, 0, 0, buf, 3);
279
280	buf[0] = 0x10;
281	buf[1] = 0x03;
282	buf[2] = 0x29;
283	i2c_write(0x10, 0, 0, buf, 3);
284
285	buf[0] = 0x10;
286	buf[1] = 0x04;
287	buf[2] = 0x00;
288	i2c_write(0x10, 0, 0, buf, 3);
289
290	buf[0] = 0x10;
291	buf[1] = 0x05;
292	buf[2] = 0x00;
293	i2c_write(0x10, 0, 0, buf, 3);
294
295	buf[0] = 0x10;
296	buf[1] = 0x07;
297	buf[2] = 0x02;
298	i2c_write(0x10, 0, 0, buf, 3);
299
300	return 0;
301}
302U_BOOT_CMD(
303	codec,	1,	1,	do_codec,
304	"codec - Enable codec\n",
305	NULL
306	);
307
308/*
309 */
310int do_saa(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
311{
312	ulong addr;
313	ulong instr;
314	ulong cntrl;
315	ulong data;
316	uchar buf[8];
317
318	if (argc < 5) {
319		puts("ERROR!\n");
320		return -1;
321	}
322
323	addr = simple_strtol (argv[1], NULL, 16);
324	instr = simple_strtol (argv[2], NULL, 16);
325	cntrl = simple_strtol (argv[3], NULL, 16);
326	data = simple_strtol (argv[4], NULL, 16);
327
328	buf[0] = (uchar)instr;
329	buf[1] = (uchar)cntrl;
330	buf[2] = (uchar)data;
331	i2c_write(addr, 0, 0, buf, 3);
332
333	return 0;
334}
335U_BOOT_CMD(
336	saa,	5,	1,	do_saa,
337	"saa    - Write to SAA1064 <addr> <instr> <cntrl> <data>\n",
338	NULL
339	);
340
341/*
342 */
343int do_iwrite(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
344{
345	ulong addr;
346	ulong data0;
347	ulong data1;
348	ulong data2;
349	ulong data3;
350	uchar buf[8];
351	int cnt;
352
353	if (argc < 3) {
354		puts("ERROR!\n");
355		return -1;
356	}
357
358	addr = simple_strtol (argv[1], NULL, 16);
359	cnt = simple_strtol (argv[2], NULL, 16);
360	data0 = simple_strtol (argv[3], NULL, 16);
361	data1 = simple_strtol (argv[4], NULL, 16);
362	data2 = simple_strtol (argv[5], NULL, 16);
363	data3 = simple_strtol (argv[6], NULL, 16);
364
365	printf("Writing %d bytes to device %lx!\n", cnt, addr);
366	buf[0] = (uchar)data0;
367	buf[1] = (uchar)data1;
368	buf[2] = (uchar)data2;
369	buf[3] = (uchar)data3;
370	i2c_write(addr, 0, 0, buf, cnt);
371
372	return 0;
373}
374U_BOOT_CMD(
375	iwrite,	6,	1,	do_iwrite,
376	"iwrite - Write n bytes to I2C-device\n",
377	"addr cnt data0 ... datan\n"
378	);
379
380/*
381 */
382int do_iread(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
383{
384	ulong addr;
385	ulong cnt;
386	uchar buf[32];
387	int i;
388
389	if (argc < 3) {
390		puts("ERROR!\n");
391		return -1;
392	}
393
394	addr = simple_strtol (argv[1], NULL, 16);
395	cnt = simple_strtol (argv[2], NULL, 16);
396
397	i2c_read(addr, 0, 0, buf, cnt);
398	printf("I2C Data:");
399	for (i=0; i<cnt; i++) {
400		printf(" %02X", buf[i]);
401	}
402	printf("\n");
403
404	return 0;
405}
406U_BOOT_CMD(
407	iread,	3,	1,	do_iread,
408	"iread  - Read from I2C <addr> <cnt>\n",
409	NULL
410	);
411
412/*
413 */
414int do_ireadl(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
415{
416	ulong addr;
417	uchar buf[32];
418	int cnt;
419
420	if (argc < 2) {
421		puts("ERROR!\n");
422		return -1;
423	}
424
425	addr = simple_strtol (argv[1], NULL, 16);
426	cnt = 1;
427
428	printf("iread looping on addr 0x%lx (cntrl-c aborts)...\n", addr);
429
430	for (;;) {
431		i2c_read(addr, 0, 0, buf, cnt);
432
433		/* Abort if ctrl-c was pressed */
434		if (ctrlc()) {
435			puts("\nAbort\n");
436			return 0;
437		}
438
439		udelay(3000);
440	}
441
442	return 0;
443}
444U_BOOT_CMD(
445	ireadl,	2,	1,	do_ireadl,
446	"ireadl - Read-loop from I2C <addr>\n",
447	NULL
448	);
449#endif