/include/configs/mpc7448hpc2.h

https://gitlab.com/ubuntu-omap/u-boot-omap5 · C Header · 405 lines · 193 code · 104 blank · 108 comment · 0 complexity · 391cf04c7b3e829ae5f0bb05c32439ff MD5 · raw file

  1. /*
  2. * Copyright (c) 2005 Freescale Semiconductor, Inc.
  3. *
  4. * (C) Copyright 2006
  5. * Alex Bounine , Tundra Semiconductor Corp.
  6. * Roy Zang , <tie-fei.zang@freescale.com> Freescale Corp.
  7. *
  8. * See file CREDITS for list of people who contributed to this
  9. * project.
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation; either version 2 of
  14. * the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  24. * MA 02111-1307 USA
  25. */
  26. /*
  27. * board specific configuration options for Freescale
  28. * MPC7448HPC2 (High-Performance Computing II) (Taiga) board
  29. *
  30. */
  31. #ifndef __CONFIG_H
  32. #define __CONFIG_H
  33. /* Board Configuration Definitions */
  34. /* MPC7448HPC2 (High-Performance Computing II) (Taiga) board */
  35. #define CONFIG_MPC7448HPC2
  36. #define CONFIG_74xx
  37. #define CONFIG_HIGH_BATS /* High BATs supported */
  38. #define CONFIG_ALTIVEC /* undef to disable */
  39. #define CONFIG_SYS_TEXT_BASE 0xFF000000
  40. #define CONFIG_SYS_BOARD_NAME "MPC7448 HPC II"
  41. #define CONFIG_IDENT_STRING " Freescale MPC7448 HPC II"
  42. #define CONFIG_SYS_OCN_CLK 133000000 /* 133 MHz */
  43. #define CONFIG_SYS_BUS_CLK 133000000
  44. #define CONFIG_SYS_CLK_SPREAD /* Enable Spread-Spectrum Clock generation */
  45. #undef CONFIG_ECC /* disable ECC support */
  46. #ifndef __ASSEMBLY__
  47. #include <galileo/core.h>
  48. #endif
  49. /* Board-specific Initialization Functions to be called */
  50. #define CONFIG_SYS_BOARD_ASM_INIT
  51. #define CONFIG_BOARD_EARLY_INIT_F
  52. #define CONFIG_BOARD_EARLY_INIT_R
  53. #define CONFIG_MISC_INIT_R
  54. #define CONFIG_HAS_ETH0
  55. #define CONFIG_HAS_ETH1
  56. #define CONFIG_ENV_OVERWRITE
  57. /*
  58. * High Level Configuration Options
  59. * (easy to change)
  60. */
  61. #define CONFIG_BAUDRATE 115200 /* console baudrate = 115000 */
  62. /*#define CONFIG_SYS_HUSH_PARSER */
  63. #undef CONFIG_SYS_HUSH_PARSER
  64. /* Pass open firmware flat tree */
  65. #define CONFIG_OF_LIBFDT 1
  66. #define CONFIG_OF_BOARD_SETUP 1
  67. #define OF_TSI "tsi108@c0000000"
  68. #define OF_TBCLK (bd->bi_busfreq / 8)
  69. #define OF_STDOUT_PATH "/tsi108@c0000000/serial@7808"
  70. /*
  71. * The following defines let you select what serial you want to use
  72. * for your console driver.
  73. *
  74. * what to do:
  75. * If you have hacked a serial cable onto the second DUART channel,
  76. * change the CONFIG_SYS_DUART port from 1 to 0 below.
  77. *
  78. */
  79. #define CONFIG_CONS_INDEX 1
  80. #define CONFIG_SYS_NS16550
  81. #define CONFIG_SYS_NS16550_SERIAL
  82. #define CONFIG_SYS_NS16550_REG_SIZE 1
  83. #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_OCN_CLK * 8
  84. #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_TSI108_CSR_RST_BASE+0x7808)
  85. #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_TSI108_CSR_RST_BASE+0x7C08)
  86. #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
  87. #define CONFIG_ZERO_BOOTDELAY_CHECK
  88. #undef CONFIG_BOOTARGS
  89. /* #define CONFIG_PREBOOT "echo;echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;echo" */
  90. #if (CONFIG_BOOTDELAY >= 0)
  91. #define CONFIG_BOOTCOMMAND "tftpboot 0x400000 zImage.initrd.elf;\
  92. setenv bootargs $(bootargs) $(bootargs_root) nfsroot=$(serverip):$(rootpath) \
  93. ip=$(ipaddr):$(serverip)$(bootargs_end); bootm 0x400000; "
  94. #define CONFIG_BOOTARGS "console=ttyS0,115200"
  95. #endif
  96. #undef CONFIG_EXTRA_ENV_SETTINGS
  97. #define CONFIG_SERIAL "No. 1"
  98. /* Networking Configuration */
  99. #define CONFIG_TSI108_ETH
  100. #define CONFIG_TSI108_ETH_NUM_PORTS 2
  101. #define CONFIG_BOOTFILE "zImage.initrd.elf"
  102. #define CONFIG_LOADADDR 0x400000
  103. /*-------------------------------------------------------------------------- */
  104. #define CONFIG_LOADS_ECHO 0 /* echo off for serial download */
  105. #define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate changes */
  106. #undef CONFIG_WATCHDOG /* watchdog disabled */
  107. /*
  108. * BOOTP options
  109. */
  110. #define CONFIG_BOOTP_SUBNETMASK
  111. #define CONFIG_BOOTP_GATEWAY
  112. #define CONFIG_BOOTP_HOSTNAME
  113. #define CONFIG_BOOTP_BOOTPATH
  114. #define CONFIG_BOOTP_BOOTFILESIZE
  115. /*
  116. * Command line configuration.
  117. */
  118. #include <config_cmd_default.h>
  119. #define CONFIG_CMD_ASKENV
  120. #define CONFIG_CMD_CACHE
  121. #define CONFIG_CMD_PCI
  122. #define CONFIG_CMD_I2C
  123. #define CONFIG_CMD_SDRAM
  124. #define CONFIG_CMD_EEPROM
  125. #define CONFIG_CMD_FLASH
  126. #define CONFIG_CMD_SAVEENV
  127. #define CONFIG_CMD_BSP
  128. #define CONFIG_CMD_DHCP
  129. #define CONFIG_CMD_PING
  130. #define CONFIG_CMD_DATE
  131. /*set date in u-boot*/
  132. #define CONFIG_RTC_M48T35A
  133. #define CONFIG_SYS_NVRAM_BASE_ADDR 0xfc000000
  134. #define CONFIG_SYS_NVRAM_SIZE 0x8000
  135. /*
  136. * Miscellaneous configurable options
  137. */
  138. #define CONFIG_VERSION_VARIABLE 1
  139. #define CONFIG_TSI108_I2C
  140. #define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */
  141. #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* I2C EEPROM page 1 */
  142. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
  143. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  144. #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
  145. #if defined(CONFIG_CMD_KGDB)
  146. #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
  147. #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port at */
  148. #else
  149. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  150. #endif
  151. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)/* Print Buffer Size */
  152. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  153. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  154. #define CONFIG_SYS_MEMTEST_START 0x00400000 /* memtest works on */
  155. #define CONFIG_SYS_MEMTEST_END 0x07c00000 /* 4 ... 124 MB in DRAM */
  156. #define CONFIG_SYS_LOAD_ADDR 0x00400000 /* default load address */
  157. #define CONFIG_SYS_HZ 1000 /* decr freq: 1ms ticks */
  158. /*
  159. * Low Level Configuration Settings
  160. * (address mappings, register initial values, etc.)
  161. * You should know what you are doing if you make changes here.
  162. */
  163. /*-----------------------------------------------------------------------
  164. * Definitions for initial stack pointer and data area
  165. */
  166. /*
  167. * When locking data in cache you should point the CONFIG_SYS_INIT_RAM_ADDRESS
  168. * To an unused memory region. The stack will remain in cache until RAM
  169. * is initialized
  170. */
  171. #undef CONFIG_SYS_INIT_RAM_LOCK
  172. #define CONFIG_SYS_INIT_RAM_ADDR 0x07d00000 /* unused memory region */
  173. #define CONFIG_SYS_INIT_RAM_SIZE 0x4000/* larger space - we have SDRAM initialized */
  174. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  175. /*-----------------------------------------------------------------------
  176. * Start addresses for the final memory configuration
  177. * (Set up by the startup code)
  178. * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
  179. */
  180. #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* first 256 MB of SDRAM */
  181. #define CONFIG_SYS_SDRAM1_BASE 0x10000000 /* next 256MB of SDRAM */
  182. #define CONFIG_SYS_SDRAM2_BASE 0x40000000 /* beginning of non-cacheable alias for SDRAM - first 256MB */
  183. #define CONFIG_SYS_SDRAM3_BASE 0x50000000 /* next Non-Cacheable 256MB of SDRAM */
  184. #define CONFIG_SYS_PCI_PFM_BASE 0x80000000 /* Prefetchable (cacheable) PCI/X PFM and SDRAM OCN (128MB+128MB) */
  185. #define CONFIG_SYS_PCI_MEM32_BASE 0xE0000000 /* Non-Cacheable PCI/X MEM and SDRAM OCN (128MB+128MB) */
  186. #define CONFIG_SYS_MISC_REGION_BASE 0xf0000000 /* Base Address for (PCI/X + Flash) region */
  187. #define CONFIG_SYS_FLASH_BASE 0xff000000 /* Base Address of Flash device */
  188. #define CONFIG_SYS_FLASH_BASE2 0xfe000000 /* Alternate Flash Base Address */
  189. #define CONFIG_VERY_BIG_RAM /* we will use up to 256M memory for cause we are short of BATS */
  190. #define PCI0_IO_BASE_BOOTM 0xfd000000
  191. #define CONFIG_SYS_RESET_ADDRESS 0x3fffff00
  192. #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
  193. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* u-boot code base */
  194. #define CONFIG_SYS_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc */
  195. /* Peripheral Device section */
  196. /*
  197. * Resources on the Tsi108
  198. */
  199. #define CONFIG_SYS_TSI108_CSR_RST_BASE 0xC0000000 /* Tsi108 CSR base after reset */
  200. #define CONFIG_SYS_TSI108_CSR_BASE CONFIG_SYS_TSI108_CSR_RST_BASE /* Runtime Tsi108 CSR base */
  201. #define ENABLE_PCI_CSR_BAR /* enables access to Tsi108 CSRs from the PCI/X bus */
  202. #undef DISABLE_PBM
  203. /*
  204. * PCI stuff
  205. *
  206. */
  207. #define CONFIG_PCI /* include pci support */
  208. #define CONFIG_TSI108_PCI /* include tsi108 pci support */
  209. #define PCI_HOST_ADAPTER 0 /* configure as pci adapter */
  210. #define PCI_HOST_FORCE 1 /* configure as pci host */
  211. #define PCI_HOST_AUTO 2 /* detected via arbiter enable */
  212. #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
  213. #define CONFIG_PCI_PNP /* do pci plug-and-play */
  214. /* PCI MEMORY MAP section */
  215. /* PCI view of System Memory */
  216. #define CONFIG_SYS_PCI_MEMORY_BUS 0x00000000
  217. #define CONFIG_SYS_PCI_MEMORY_PHYS 0x00000000
  218. #define CONFIG_SYS_PCI_MEMORY_SIZE 0x80000000
  219. /* PCI Memory Space */
  220. #define CONFIG_SYS_PCI_MEM_BUS (CONFIG_SYS_PCI_MEM_PHYS)
  221. #define CONFIG_SYS_PCI_MEM_PHYS (CONFIG_SYS_PCI_MEM32_BASE) /* 0xE0000000 */
  222. #define CONFIG_SYS_PCI_MEM_SIZE 0x10000000 /* 256 MB space for PCI/X Mem + SDRAM OCN */
  223. /* PCI I/O Space */
  224. #define CONFIG_SYS_PCI_IO_BUS 0x00000000
  225. #define CONFIG_SYS_PCI_IO_PHYS 0xfa000000 /* Changed from fd000000 */
  226. #define CONFIG_SYS_PCI_IO_SIZE 0x01000000 /* 16MB */
  227. /* PCI Config Space mapping */
  228. #define CONFIG_SYS_PCI_CFG_BASE 0xfb000000 /* Changed from FE000000 */
  229. #define CONFIG_SYS_PCI_CFG_SIZE 0x01000000 /* 16MB */
  230. #define CONFIG_SYS_IBAT0U 0xFE0003FF
  231. #define CONFIG_SYS_IBAT0L 0xFE000002
  232. #define CONFIG_SYS_IBAT1U 0x00007FFF
  233. #define CONFIG_SYS_IBAT1L 0x00000012
  234. #define CONFIG_SYS_IBAT2U 0x80007FFF
  235. #define CONFIG_SYS_IBAT2L 0x80000022
  236. #define CONFIG_SYS_IBAT3U 0x00000000
  237. #define CONFIG_SYS_IBAT3L 0x00000000
  238. #define CONFIG_SYS_IBAT4U 0x00000000
  239. #define CONFIG_SYS_IBAT4L 0x00000000
  240. #define CONFIG_SYS_IBAT5U 0x00000000
  241. #define CONFIG_SYS_IBAT5L 0x00000000
  242. #define CONFIG_SYS_IBAT6U 0x00000000
  243. #define CONFIG_SYS_IBAT6L 0x00000000
  244. #define CONFIG_SYS_IBAT7U 0x00000000
  245. #define CONFIG_SYS_IBAT7L 0x00000000
  246. #define CONFIG_SYS_DBAT0U 0xE0003FFF
  247. #define CONFIG_SYS_DBAT0L 0xE000002A
  248. #define CONFIG_SYS_DBAT1U 0x00007FFF
  249. #define CONFIG_SYS_DBAT1L 0x00000012
  250. #define CONFIG_SYS_DBAT2U 0x00000000
  251. #define CONFIG_SYS_DBAT2L 0x00000000
  252. #define CONFIG_SYS_DBAT3U 0xC0000003
  253. #define CONFIG_SYS_DBAT3L 0xC000002A
  254. #define CONFIG_SYS_DBAT4U 0x00000000
  255. #define CONFIG_SYS_DBAT4L 0x00000000
  256. #define CONFIG_SYS_DBAT5U 0x00000000
  257. #define CONFIG_SYS_DBAT5L 0x00000000
  258. #define CONFIG_SYS_DBAT6U 0x00000000
  259. #define CONFIG_SYS_DBAT6L 0x00000000
  260. #define CONFIG_SYS_DBAT7U 0x00000000
  261. #define CONFIG_SYS_DBAT7L 0x00000000
  262. /* I2C addresses for the two DIMM SPD chips */
  263. #define DIMM0_I2C_ADDR 0x51
  264. #define DIMM1_I2C_ADDR 0x52
  265. /*
  266. * For booting Linux, the board info and command line data
  267. * have to be in the first 8 MB of memory, since this is
  268. * the maximum mapped by the Linux kernel during initialization.
  269. */
  270. #define CONFIG_SYS_BOOTMAPSZ (8<<20) /* Initial Memory map for Linux */
  271. /*-----------------------------------------------------------------------
  272. * FLASH organization
  273. */
  274. #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* Flash can be at one of two addresses */
  275. #define FLASH_BANK_SIZE 0x01000000 /* 16 MB Total */
  276. #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE, /* CONFIG_SYS_FLASH_BASE2 */ }
  277. #define CONFIG_FLASH_CFI_DRIVER
  278. #define CONFIG_SYS_FLASH_CFI
  279. #define CONFIG_SYS_WRITE_SWAPPED_DATA
  280. #define PHYS_FLASH_SIZE 0x01000000
  281. #define CONFIG_SYS_MAX_FLASH_SECT (128)
  282. #define CONFIG_ENV_IS_IN_NVRAM
  283. #define CONFIG_ENV_ADDR 0xFC000000
  284. #define CONFIG_ENV_OFFSET 0x00000000 /* Offset of Environment Sector */
  285. #define CONFIG_ENV_SIZE 0x00000400 /* Total Size of Environment Space */
  286. /*-----------------------------------------------------------------------
  287. * Cache Configuration
  288. */
  289. #define CONFIG_SYS_CACHELINE_SIZE 32 /* For all MPC74xx CPUs */
  290. #if defined(CONFIG_CMD_KGDB)
  291. #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
  292. #endif
  293. /*-----------------------------------------------------------------------
  294. * L2CR setup -- make sure this is right for your board!
  295. * look in include/mpc74xx.h for the defines used here
  296. */
  297. #undef CONFIG_SYS_L2
  298. #define L2_INIT 0
  299. #define L2_ENABLE (L2_INIT | L2CR_L2E)
  300. #define CONFIG_SYS_SERIAL_HANG_IN_EXCEPTION
  301. #endif /* __CONFIG_H */