/drivers/media/video/cpia2/cpia2_registers.h

https://gitlab.com/TeamCarbonXtreme/android_kernel_samsung_msm7x27 · C Header · 476 lines · 320 code · 115 blank · 41 comment · 0 complexity · 10343a8a0c936a4632df502fcf26266e MD5 · raw file

  1. /****************************************************************************
  2. *
  3. * Filename: cpia2registers.h
  4. *
  5. * Copyright 2001, STMicrolectronics, Inc.
  6. *
  7. * Description:
  8. * Definitions for the CPia2 register set
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  23. *
  24. ****************************************************************************/
  25. #ifndef CPIA2_REGISTER_HEADER
  26. #define CPIA2_REGISTER_HEADER
  27. /***
  28. * System register set (Bank 0)
  29. ***/
  30. #define CPIA2_SYSTEM_DEVICE_HI 0x00
  31. #define CPIA2_SYSTEM_DEVICE_LO 0x01
  32. #define CPIA2_SYSTEM_SYSTEM_CONTROL 0x02
  33. #define CPIA2_SYSTEM_CONTROL_LOW_POWER 0x00
  34. #define CPIA2_SYSTEM_CONTROL_HIGH_POWER 0x01
  35. #define CPIA2_SYSTEM_CONTROL_SUSPEND 0x02
  36. #define CPIA2_SYSTEM_CONTROL_V2W_ERR 0x10
  37. #define CPIA2_SYSTEM_CONTROL_RB_ERR 0x10
  38. #define CPIA2_SYSTEM_CONTROL_CLEAR_ERR 0x80
  39. #define CPIA2_SYSTEM_INT_PACKET_CTRL 0x04
  40. #define CPIA2_SYSTEM_INT_PACKET_CTRL_ENABLE_SW_XX 0x01
  41. #define CPIA2_SYSTEM_INT_PACKET_CTRL_ENABLE_EOF 0x02
  42. #define CPIA2_SYSTEM_INT_PACKET_CTRL_ENABLE_INT1 0x04
  43. #define CPIA2_SYSTEM_CACHE_CTRL 0x05
  44. #define CPIA2_SYSTEM_CACHE_CTRL_CACHE_RESET 0x01
  45. #define CPIA2_SYSTEM_CACHE_CTRL_CACHE_FLUSH 0x02
  46. #define CPIA2_SYSTEM_SERIAL_CTRL 0x06
  47. #define CPIA2_SYSTEM_SERIAL_CTRL_NULL_CMD 0x00
  48. #define CPIA2_SYSTEM_SERIAL_CTRL_START_CMD 0x01
  49. #define CPIA2_SYSTEM_SERIAL_CTRL_STOP_CMD 0x02
  50. #define CPIA2_SYSTEM_SERIAL_CTRL_WRITE_CMD 0x03
  51. #define CPIA2_SYSTEM_SERIAL_CTRL_READ_ACK_CMD 0x04
  52. #define CPIA2_SYSTEM_SERIAL_CTRL_READ_NACK_CMD 0x05
  53. #define CPIA2_SYSTEM_SERIAL_DATA 0x07
  54. #define CPIA2_SYSTEM_VP_SERIAL_ADDR 0x08
  55. /***
  56. * I2C addresses for various devices in CPiA2
  57. ***/
  58. #define CPIA2_SYSTEM_VP_SERIAL_ADDR_SENSOR 0x20
  59. #define CPIA2_SYSTEM_VP_SERIAL_ADDR_VP 0x88
  60. #define CPIA2_SYSTEM_VP_SERIAL_ADDR_676_VP 0x8A
  61. #define CPIA2_SYSTEM_SPARE_REG1 0x09
  62. #define CPIA2_SYSTEM_SPARE_REG2 0x0A
  63. #define CPIA2_SYSTEM_SPARE_REG3 0x0B
  64. #define CPIA2_SYSTEM_MC_PORT_0 0x0C
  65. #define CPIA2_SYSTEM_MC_PORT_1 0x0D
  66. #define CPIA2_SYSTEM_MC_PORT_2 0x0E
  67. #define CPIA2_SYSTEM_MC_PORT_3 0x0F
  68. #define CPIA2_SYSTEM_STATUS_PKT 0x20
  69. #define CPIA2_SYSTEM_STATUS_PKT_END 0x27
  70. #define CPIA2_SYSTEM_DESCRIP_VID_HI 0x30
  71. #define CPIA2_SYSTEM_DESCRIP_VID_LO 0x31
  72. #define CPIA2_SYSTEM_DESCRIP_PID_HI 0x32
  73. #define CPIA2_SYSTEM_DESCRIP_PID_LO 0x33
  74. #define CPIA2_SYSTEM_FW_VERSION_HI 0x34
  75. #define CPIA2_SYSTEM_FW_VERSION_LO 0x35
  76. #define CPIA2_SYSTEM_CACHE_START_INDEX 0x80
  77. #define CPIA2_SYSTEM_CACHE_MAX_WRITES 0x10
  78. /***
  79. * VC register set (Bank 1)
  80. ***/
  81. #define CPIA2_VC_ASIC_ID 0x80
  82. #define CPIA2_VC_ASIC_REV 0x81
  83. #define CPIA2_VC_PW_CTRL 0x82
  84. #define CPIA2_VC_PW_CTRL_COLDSTART 0x01
  85. #define CPIA2_VC_PW_CTRL_CP_CLK_EN 0x02
  86. #define CPIA2_VC_PW_CTRL_VP_RESET_N 0x04
  87. #define CPIA2_VC_PW_CTRL_VC_CLK_EN 0x08
  88. #define CPIA2_VC_PW_CTRL_VC_RESET_N 0x10
  89. #define CPIA2_VC_PW_CTRL_GOTO_SUSPEND 0x20
  90. #define CPIA2_VC_PW_CTRL_UDC_SUSPEND 0x40
  91. #define CPIA2_VC_PW_CTRL_PWR_DOWN 0x80
  92. #define CPIA2_VC_WAKEUP 0x83
  93. #define CPIA2_VC_WAKEUP_SW_ENABLE 0x01
  94. #define CPIA2_VC_WAKEUP_XX_ENABLE 0x02
  95. #define CPIA2_VC_WAKEUP_SW_ATWAKEUP 0x04
  96. #define CPIA2_VC_WAKEUP_XX_ATWAKEUP 0x08
  97. #define CPIA2_VC_CLOCK_CTRL 0x84
  98. #define CPIA2_VC_CLOCK_CTRL_TESTUP72 0x01
  99. #define CPIA2_VC_INT_ENABLE 0x88
  100. #define CPIA2_VC_INT_ENABLE_XX_IE 0x01
  101. #define CPIA2_VC_INT_ENABLE_SW_IE 0x02
  102. #define CPIA2_VC_INT_ENABLE_VC_IE 0x04
  103. #define CPIA2_VC_INT_ENABLE_USBDATA_IE 0x08
  104. #define CPIA2_VC_INT_ENABLE_USBSETUP_IE 0x10
  105. #define CPIA2_VC_INT_ENABLE_USBCFG_IE 0x20
  106. #define CPIA2_VC_INT_FLAG 0x89
  107. #define CPIA2_VC_INT_ENABLE_XX_FLAG 0x01
  108. #define CPIA2_VC_INT_ENABLE_SW_FLAG 0x02
  109. #define CPIA2_VC_INT_ENABLE_VC_FLAG 0x04
  110. #define CPIA2_VC_INT_ENABLE_USBDATA_FLAG 0x08
  111. #define CPIA2_VC_INT_ENABLE_USBSETUP_FLAG 0x10
  112. #define CPIA2_VC_INT_ENABLE_USBCFG_FLAG 0x20
  113. #define CPIA2_VC_INT_ENABLE_SET_RESET_BIT 0x80
  114. #define CPIA2_VC_INT_STATE 0x8A
  115. #define CPIA2_VC_INT_STATE_XX_STATE 0x01
  116. #define CPIA2_VC_INT_STATE_SW_STATE 0x02
  117. #define CPIA2_VC_MP_DIR 0x90
  118. #define CPIA2_VC_MP_DIR_INPUT 0x00
  119. #define CPIA2_VC_MP_DIR_OUTPUT 0x01
  120. #define CPIA2_VC_MP_DATA 0x91
  121. #define CPIA2_VC_DP_CTRL 0x98
  122. #define CPIA2_VC_DP_CTRL_MODE_0 0x00
  123. #define CPIA2_VC_DP_CTRL_MODE_A 0x01
  124. #define CPIA2_VC_DP_CTRL_MODE_B 0x02
  125. #define CPIA2_VC_DP_CTRL_MODE_C 0x03
  126. #define CPIA2_VC_DP_CTRL_FAKE_FST 0x04
  127. #define CPIA2_VC_AD_CTRL 0x99
  128. #define CPIA2_VC_AD_CTRL_SRC_0 0x00
  129. #define CPIA2_VC_AD_CTRL_SRC_DIGI_A 0x01
  130. #define CPIA2_VC_AD_CTRL_SRC_REG 0x02
  131. #define CPIA2_VC_AD_CTRL_DST_USB 0x00
  132. #define CPIA2_VC_AD_CTRL_DST_REG 0x04
  133. #define CPIA2_VC_AD_TEST_IN 0x9B
  134. #define CPIA2_VC_AD_TEST_OUT 0x9C
  135. #define CPIA2_VC_AD_STATUS 0x9D
  136. #define CPIA2_VC_AD_STATUS_EMPTY 0x01
  137. #define CPIA2_VC_AD_STATUS_FULL 0x02
  138. #define CPIA2_VC_DP_DATA 0x9E
  139. #define CPIA2_VC_ST_CTRL 0xA0
  140. #define CPIA2_VC_ST_CTRL_SRC_VC 0x00
  141. #define CPIA2_VC_ST_CTRL_SRC_DP 0x01
  142. #define CPIA2_VC_ST_CTRL_SRC_REG 0x02
  143. #define CPIA2_VC_ST_CTRL_RAW_SELECT 0x04
  144. #define CPIA2_VC_ST_CTRL_DST_USB 0x00
  145. #define CPIA2_VC_ST_CTRL_DST_DP 0x08
  146. #define CPIA2_VC_ST_CTRL_DST_REG 0x10
  147. #define CPIA2_VC_ST_CTRL_FIFO_ENABLE 0x20
  148. #define CPIA2_VC_ST_CTRL_EOF_DETECT 0x40
  149. #define CPIA2_VC_ST_TEST 0xA1
  150. #define CPIA2_VC_ST_TEST_MODE_MANUAL 0x00
  151. #define CPIA2_VC_ST_TEST_MODE_INCREMENT 0x02
  152. #define CPIA2_VC_ST_TEST_AUTO_FILL 0x08
  153. #define CPIA2_VC_ST_TEST_REPEAT_FIFO 0x10
  154. #define CPIA2_VC_ST_TEST_IN 0xA2
  155. #define CPIA2_VC_ST_TEST_OUT 0xA3
  156. #define CPIA2_VC_ST_STATUS 0xA4
  157. #define CPIA2_VC_ST_STATUS_EMPTY 0x01
  158. #define CPIA2_VC_ST_STATUS_FULL 0x02
  159. #define CPIA2_VC_ST_FRAME_DETECT_1 0xA5
  160. #define CPIA2_VC_ST_FRAME_DETECT_2 0xA6
  161. #define CPIA2_VC_USB_CTRL 0xA8
  162. #define CPIA2_VC_USB_CTRL_CMD_STALLED 0x01
  163. #define CPIA2_VC_USB_CTRL_CMD_READY 0x02
  164. #define CPIA2_VC_USB_CTRL_CMD_STATUS 0x04
  165. #define CPIA2_VC_USB_CTRL_CMD_STATUS_DIR 0x08
  166. #define CPIA2_VC_USB_CTRL_CMD_NO_CLASH 0x10
  167. #define CPIA2_VC_USB_CTRL_CMD_MICRO_ACCESS 0x80
  168. #define CPIA2_VC_USB_STRM 0xA9
  169. #define CPIA2_VC_USB_STRM_ISO_ENABLE 0x01
  170. #define CPIA2_VC_USB_STRM_BLK_ENABLE 0x02
  171. #define CPIA2_VC_USB_STRM_INT_ENABLE 0x04
  172. #define CPIA2_VC_USB_STRM_AUD_ENABLE 0x08
  173. #define CPIA2_VC_USB_STATUS 0xAA
  174. #define CPIA2_VC_USB_STATUS_CMD_IN_PROGRESS 0x01
  175. #define CPIA2_VC_USB_STATUS_CMD_STATUS_STALL 0x02
  176. #define CPIA2_VC_USB_STATUS_CMD_HANDSHAKE 0x04
  177. #define CPIA2_VC_USB_STATUS_CMD_OVERRIDE 0x08
  178. #define CPIA2_VC_USB_STATUS_CMD_FIFO_BUSY 0x10
  179. #define CPIA2_VC_USB_STATUS_BULK_REPEAT_TXN 0x20
  180. #define CPIA2_VC_USB_STATUS_CONFIG_DONE 0x40
  181. #define CPIA2_VC_USB_STATUS_USB_SUSPEND 0x80
  182. #define CPIA2_VC_USB_CMDW 0xAB
  183. #define CPIA2_VC_USB_DATARW 0xAC
  184. #define CPIA2_VC_USB_INFO 0xAD
  185. #define CPIA2_VC_USB_CONFIG 0xAE
  186. #define CPIA2_VC_USB_SETTINGS 0xAF
  187. #define CPIA2_VC_USB_SETTINGS_CONFIG_MASK 0x03
  188. #define CPIA2_VC_USB_SETTINGS_INTERFACE_MASK 0x0C
  189. #define CPIA2_VC_USB_SETTINGS_ALTERNATE_MASK 0x70
  190. #define CPIA2_VC_USB_ISOLIM 0xB0
  191. #define CPIA2_VC_USB_ISOFAILS 0xB1
  192. #define CPIA2_VC_USB_ISOMAXPKTHI 0xB2
  193. #define CPIA2_VC_USB_ISOMAXPKTLO 0xB3
  194. #define CPIA2_VC_V2W_CTRL 0xB8
  195. #define CPIA2_VC_V2W_SELECT 0x01
  196. #define CPIA2_VC_V2W_SCL 0xB9
  197. #define CPIA2_VC_V2W_SDA 0xBA
  198. #define CPIA2_VC_VC_CTRL 0xC0
  199. #define CPIA2_VC_VC_CTRL_RUN 0x01
  200. #define CPIA2_VC_VC_CTRL_SINGLESHOT 0x02
  201. #define CPIA2_VC_VC_CTRL_IDLING 0x04
  202. #define CPIA2_VC_VC_CTRL_INHIBIT_H_TABLES 0x10
  203. #define CPIA2_VC_VC_CTRL_INHIBIT_Q_TABLES 0x20
  204. #define CPIA2_VC_VC_CTRL_INHIBIT_PRIVATE 0x40
  205. #define CPIA2_VC_VC_RESTART_IVAL_HI 0xC1
  206. #define CPIA2_VC_VC_RESTART_IVAL_LO 0xC2
  207. #define CPIA2_VC_VC_FORMAT 0xC3
  208. #define CPIA2_VC_VC_FORMAT_UFIRST 0x01
  209. #define CPIA2_VC_VC_FORMAT_MONO 0x02
  210. #define CPIA2_VC_VC_FORMAT_DECIMATING 0x04
  211. #define CPIA2_VC_VC_FORMAT_SHORTLINE 0x08
  212. #define CPIA2_VC_VC_FORMAT_SELFTEST 0x10
  213. #define CPIA2_VC_VC_CLOCKS 0xC4
  214. #define CPIA2_VC_VC_CLOCKS_CLKDIV_MASK 0x03
  215. #define CPIA2_VC_VC_672_CLOCKS_CIF_DIV_BY_3 0x04
  216. #define CPIA2_VC_VC_672_CLOCKS_SCALING 0x08
  217. #define CPIA2_VC_VC_CLOCKS_LOGDIV0 0x00
  218. #define CPIA2_VC_VC_CLOCKS_LOGDIV1 0x01
  219. #define CPIA2_VC_VC_CLOCKS_LOGDIV2 0x02
  220. #define CPIA2_VC_VC_CLOCKS_LOGDIV3 0x03
  221. #define CPIA2_VC_VC_676_CLOCKS_CIF_DIV_BY_3 0x08
  222. #define CPIA2_VC_VC_676_CLOCKS_SCALING 0x10
  223. #define CPIA2_VC_VC_IHSIZE_LO 0xC5
  224. #define CPIA2_VC_VC_XLIM_HI 0xC6
  225. #define CPIA2_VC_VC_XLIM_LO 0xC7
  226. #define CPIA2_VC_VC_YLIM_HI 0xC8
  227. #define CPIA2_VC_VC_YLIM_LO 0xC9
  228. #define CPIA2_VC_VC_OHSIZE 0xCA
  229. #define CPIA2_VC_VC_OVSIZE 0xCB
  230. #define CPIA2_VC_VC_HCROP 0xCC
  231. #define CPIA2_VC_VC_VCROP 0xCD
  232. #define CPIA2_VC_VC_HPHASE 0xCE
  233. #define CPIA2_VC_VC_VPHASE 0xCF
  234. #define CPIA2_VC_VC_HISPAN 0xD0
  235. #define CPIA2_VC_VC_VISPAN 0xD1
  236. #define CPIA2_VC_VC_HICROP 0xD2
  237. #define CPIA2_VC_VC_VICROP 0xD3
  238. #define CPIA2_VC_VC_HFRACT 0xD4
  239. #define CPIA2_VC_VC_HFRACT_DEN_MASK 0x0F
  240. #define CPIA2_VC_VC_HFRACT_NUM_MASK 0xF0
  241. #define CPIA2_VC_VC_VFRACT 0xD5
  242. #define CPIA2_VC_VC_VFRACT_DEN_MASK 0x0F
  243. #define CPIA2_VC_VC_VFRACT_NUM_MASK 0xF0
  244. #define CPIA2_VC_VC_JPEG_OPT 0xD6
  245. #define CPIA2_VC_VC_JPEG_OPT_DOUBLE_SQUEEZE 0x01
  246. #define CPIA2_VC_VC_JPEG_OPT_NO_DC_AUTO_SQUEEZE 0x02
  247. #define CPIA2_VC_VC_JPEG_OPT_AUTO_SQUEEZE 0x04
  248. #define CPIA2_VC_VC_JPEG_OPT_DEFAULT (CPIA2_VC_VC_JPEG_OPT_DOUBLE_SQUEEZE|\
  249. CPIA2_VC_VC_JPEG_OPT_AUTO_SQUEEZE)
  250. #define CPIA2_VC_VC_CREEP_PERIOD 0xD7
  251. #define CPIA2_VC_VC_USER_SQUEEZE 0xD8
  252. #define CPIA2_VC_VC_TARGET_KB 0xD9
  253. #define CPIA2_VC_VC_AUTO_SQUEEZE 0xE6
  254. /***
  255. * VP register set (Bank 2)
  256. ***/
  257. #define CPIA2_VP_DEVICEH 0
  258. #define CPIA2_VP_DEVICEL 1
  259. #define CPIA2_VP_SYSTEMSTATE 0x02
  260. #define CPIA2_VP_SYSTEMSTATE_HK_ALIVE 0x01
  261. #define CPIA2_VP_SYSTEMCTRL 0x03
  262. #define CPIA2_VP_SYSTEMCTRL_REQ_CLEAR_ERROR 0x80
  263. #define CPIA2_VP_SYSTEMCTRL_POWER_DOWN_PLL 0x20
  264. #define CPIA2_VP_SYSTEMCTRL_REQ_SUSPEND_STATE 0x10
  265. #define CPIA2_VP_SYSTEMCTRL_REQ_SERIAL_WAKEUP 0x08
  266. #define CPIA2_VP_SYSTEMCTRL_REQ_AUTOLOAD 0x04
  267. #define CPIA2_VP_SYSTEMCTRL_HK_CONTROL 0x02
  268. #define CPIA2_VP_SYSTEMCTRL_POWER_CONTROL 0x01
  269. #define CPIA2_VP_SENSOR_FLAGS 0x05
  270. #define CPIA2_VP_SENSOR_FLAGS_404 0x01
  271. #define CPIA2_VP_SENSOR_FLAGS_407 0x02
  272. #define CPIA2_VP_SENSOR_FLAGS_409 0x04
  273. #define CPIA2_VP_SENSOR_FLAGS_410 0x08
  274. #define CPIA2_VP_SENSOR_FLAGS_500 0x10
  275. #define CPIA2_VP_SENSOR_REV 0x06
  276. #define CPIA2_VP_DEVICE_CONFIG 0x07
  277. #define CPIA2_VP_DEVICE_CONFIG_SERIAL_BRIDGE 0x01
  278. #define CPIA2_VP_GPIO_DIRECTION 0x08
  279. #define CPIA2_VP_GPIO_READ 0xFF
  280. #define CPIA2_VP_GPIO_WRITE 0x00
  281. #define CPIA2_VP_GPIO_DATA 0x09
  282. #define CPIA2_VP_RAM_ADDR_H 0x0A
  283. #define CPIA2_VP_RAM_ADDR_L 0x0B
  284. #define CPIA2_VP_RAM_DATA 0x0C
  285. #define CPIA2_VP_PATCH_REV 0x0F
  286. #define CPIA2_VP4_USER_MODE 0x10
  287. #define CPIA2_VP5_USER_MODE 0x13
  288. #define CPIA2_VP_USER_MODE_CIF 0x01
  289. #define CPIA2_VP_USER_MODE_QCIFDS 0x02
  290. #define CPIA2_VP_USER_MODE_QCIFPTC 0x04
  291. #define CPIA2_VP_USER_MODE_QVGADS 0x08
  292. #define CPIA2_VP_USER_MODE_QVGAPTC 0x10
  293. #define CPIA2_VP_USER_MODE_VGA 0x20
  294. #define CPIA2_VP4_FRAMERATE_REQUEST 0x11
  295. #define CPIA2_VP5_FRAMERATE_REQUEST 0x14
  296. #define CPIA2_VP_FRAMERATE_60 0x80
  297. #define CPIA2_VP_FRAMERATE_50 0x40
  298. #define CPIA2_VP_FRAMERATE_30 0x20
  299. #define CPIA2_VP_FRAMERATE_25 0x10
  300. #define CPIA2_VP_FRAMERATE_15 0x08
  301. #define CPIA2_VP_FRAMERATE_12_5 0x04
  302. #define CPIA2_VP_FRAMERATE_7_5 0x02
  303. #define CPIA2_VP_FRAMERATE_6_25 0x01
  304. #define CPIA2_VP4_USER_EFFECTS 0x12
  305. #define CPIA2_VP5_USER_EFFECTS 0x15
  306. #define CPIA2_VP_USER_EFFECTS_COLBARS 0x01
  307. #define CPIA2_VP_USER_EFFECTS_COLBARS_GRAD 0x02
  308. #define CPIA2_VP_USER_EFFECTS_MIRROR 0x04
  309. #define CPIA2_VP_USER_EFFECTS_FLIP 0x40 // VP5 only
  310. /* NOTE: CPIA2_VP_EXPOSURE_MODES shares the same register as VP5 User
  311. * Effects */
  312. #define CPIA2_VP_EXPOSURE_MODES 0x15
  313. #define CPIA2_VP_EXPOSURE_MODES_INHIBIT_FLICKER 0x20
  314. #define CPIA2_VP_EXPOSURE_MODES_COMPILE_EXP 0x10
  315. #define CPIA2_VP4_EXPOSURE_TARGET 0x16 // VP4
  316. #define CPIA2_VP5_EXPOSURE_TARGET 0x20 // VP5
  317. #define CPIA2_VP_FLICKER_MODES 0x1B
  318. #define CPIA2_VP_FLICKER_MODES_50HZ 0x80
  319. #define CPIA2_VP_FLICKER_MODES_CUSTOM_FLT_FFREQ 0x40
  320. #define CPIA2_VP_FLICKER_MODES_NEVER_FLICKER 0x20
  321. #define CPIA2_VP_FLICKER_MODES_INHIBIT_RUB 0x10
  322. #define CPIA2_VP_FLICKER_MODES_ADJUST_LINE_FREQ 0x08
  323. #define CPIA2_VP_FLICKER_MODES_CUSTOM_INT_FFREQ 0x04
  324. #define CPIA2_VP_UMISC 0x1D
  325. #define CPIA2_VP_UMISC_FORCE_MONO 0x80
  326. #define CPIA2_VP_UMISC_FORCE_ID_MASK 0x40
  327. #define CPIA2_VP_UMISC_INHIBIT_AUTO_FGS 0x20
  328. #define CPIA2_VP_UMISC_INHIBIT_AUTO_DIMS 0x08
  329. #define CPIA2_VP_UMISC_OPT_FOR_SENSOR_DS 0x04
  330. #define CPIA2_VP_UMISC_INHIBIT_AUTO_MODE_INT 0x02
  331. #define CPIA2_VP5_ANTIFLKRSETUP 0x22 //34
  332. #define CPIA2_VP_INTERPOLATION 0x24
  333. #define CPIA2_VP_INTERPOLATION_EVEN_FIRST 0x40
  334. #define CPIA2_VP_INTERPOLATION_HJOG 0x20
  335. #define CPIA2_VP_INTERPOLATION_VJOG 0x10
  336. #define CPIA2_VP_GAMMA 0x25
  337. #define CPIA2_VP_DEFAULT_GAMMA 0x10
  338. #define CPIA2_VP_YRANGE 0x26
  339. #define CPIA2_VP_SATURATION 0x27
  340. #define CPIA2_VP5_MYBLACK_LEVEL 0x3A //58
  341. #define CPIA2_VP5_MCYRANGE 0x3B //59
  342. #define CPIA2_VP5_MYCEILING 0x3C //60
  343. #define CPIA2_VP5_MCUVSATURATION 0x3D //61
  344. #define CPIA2_VP_REHASH_VALUES 0x60
  345. /***
  346. * Common sensor registers
  347. ***/
  348. #define CPIA2_SENSOR_DEVICE_H 0x00
  349. #define CPIA2_SENSOR_DEVICE_L 0x01
  350. #define CPIA2_SENSOR_DATA_FORMAT 0x16
  351. #define CPIA2_SENSOR_DATA_FORMAT_HMIRROR 0x08
  352. #define CPIA2_SENSOR_DATA_FORMAT_VMIRROR 0x10
  353. #define CPIA2_SENSOR_CR1 0x76
  354. #define CPIA2_SENSOR_CR1_STAND_BY 0x01
  355. #define CPIA2_SENSOR_CR1_DOWN_RAMP_GEN 0x02
  356. #define CPIA2_SENSOR_CR1_DOWN_COLUMN_ADC 0x04
  357. #define CPIA2_SENSOR_CR1_DOWN_CAB_REGULATOR 0x08
  358. #define CPIA2_SENSOR_CR1_DOWN_AUDIO_REGULATOR 0x10
  359. #define CPIA2_SENSOR_CR1_DOWN_VRT_AMP 0x20
  360. #define CPIA2_SENSOR_CR1_DOWN_BAND_GAP 0x40
  361. #endif