/include/configs/omap3_zoom1.h

https://gitlab.com/ubuntu-omap/u-boot-omap5 · C Header · 285 lines · 155 code · 43 blank · 87 comment · 0 complexity · 02675c5214c3e070f38c28d8d8578d3f MD5 · raw file

  1. /*
  2. * (C) Copyright 2006-2008
  3. * Texas Instruments.
  4. * Richard Woodruff <r-woodruff2@ti.com>
  5. * Syed Mohammed Khasim <x0khasim@ti.com>
  6. * Nishanth Menon <nm@ti.com>
  7. *
  8. * Configuration settings for the TI OMAP3430 Zoom MDK board.
  9. *
  10. * See file CREDITS for list of people who contributed to this
  11. * project.
  12. *
  13. * This program is free software; you can redistribute it and/or
  14. * modify it under the terms of the GNU General Public License as
  15. * published by the Free Software Foundation; either version 2 of
  16. * the License, or (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  26. * MA 02111-1307 USA
  27. */
  28. #ifndef __CONFIG_H
  29. #define __CONFIG_H
  30. /*
  31. * High Level Configuration Options
  32. */
  33. #define CONFIG_OMAP 1 /* in a TI OMAP core */
  34. #define CONFIG_OMAP34XX 1 /* which is a 34XX */
  35. #define CONFIG_OMAP3_ZOOM1 1 /* working with Zoom MDK Rev1 */
  36. #define CONFIG_SDRC /* The chip has SDRC controller */
  37. #include <asm/arch/cpu.h> /* get chip and board defs */
  38. #include <asm/arch/omap3.h>
  39. /*
  40. * Display CPU and Board information
  41. */
  42. #define CONFIG_DISPLAY_CPUINFO 1
  43. #define CONFIG_DISPLAY_BOARDINFO 1
  44. /* Clock Defines */
  45. #define V_OSCK 26000000 /* Clock output from T2 */
  46. #define V_SCLK (V_OSCK >> 1)
  47. #define CONFIG_MISC_INIT_R
  48. #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
  49. #define CONFIG_SETUP_MEMORY_TAGS 1
  50. #define CONFIG_INITRD_TAG 1
  51. #define CONFIG_REVISION_TAG 1
  52. #define CONFIG_OF_LIBFDT 1
  53. /*
  54. * Size of malloc() pool
  55. */
  56. #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
  57. /* Sector */
  58. #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
  59. /*
  60. * Hardware drivers
  61. */
  62. /*
  63. * NS16550 Configuration
  64. */
  65. #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
  66. #define CONFIG_SYS_NS16550
  67. #define CONFIG_SYS_NS16550_SERIAL
  68. #define CONFIG_SYS_NS16550_REG_SIZE (-4)
  69. #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
  70. /*
  71. * select serial console configuration
  72. */
  73. #define CONFIG_CONS_INDEX 3
  74. #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
  75. #define CONFIG_SERIAL3 3 /* UART3 */
  76. /* allow to overwrite serial and ethaddr */
  77. #define CONFIG_ENV_OVERWRITE
  78. #define CONFIG_BAUDRATE 115200
  79. #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
  80. 115200}
  81. #define CONFIG_GENERIC_MMC 1
  82. #define CONFIG_MMC 1
  83. #define CONFIG_OMAP_HSMMC 1
  84. #define CONFIG_DOS_PARTITION 1
  85. /* USB */
  86. #define CONFIG_MUSB_UDC 1
  87. #define CONFIG_USB_OMAP3 1
  88. #define CONFIG_TWL4030_USB 1
  89. /* USB device configuration */
  90. #define CONFIG_USB_DEVICE 1
  91. #define CONFIG_USB_TTY 1
  92. #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
  93. /* Change these to suit your needs */
  94. #define CONFIG_USBD_VENDORID 0x0451
  95. #define CONFIG_USBD_PRODUCTID 0x5678
  96. #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
  97. #define CONFIG_USBD_PRODUCT_NAME "Zoom1"
  98. /* commands to include */
  99. #include <config_cmd_default.h>
  100. #define CONFIG_CMD_EXT2 /* EXT2 Support */
  101. #define CONFIG_CMD_FAT /* FAT support */
  102. #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
  103. #define CONFIG_CMD_I2C /* I2C serial bus support */
  104. #define CONFIG_CMD_MMC /* MMC support */
  105. #define CONFIG_CMD_NAND /* NAND support */
  106. #define CONFIG_CMD_NAND_LOCK_UNLOCK /* Enable lock/unlock support */
  107. #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
  108. #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
  109. #undef CONFIG_CMD_IMI /* iminfo */
  110. #undef CONFIG_CMD_IMLS /* List all found images */
  111. #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
  112. #undef CONFIG_CMD_NFS /* NFS support */
  113. #define CONFIG_SYS_NO_FLASH
  114. #define CONFIG_HARD_I2C 1
  115. #define CONFIG_SYS_I2C_SPEED 100000
  116. #define CONFIG_SYS_I2C_SLAVE 1
  117. #define CONFIG_DRIVER_OMAP34XX_I2C 1
  118. /*
  119. * TWL4030
  120. */
  121. #define CONFIG_TWL4030_POWER 1
  122. #define CONFIG_TWL4030_LED 1
  123. /*
  124. * Board NAND Info.
  125. */
  126. #define CONFIG_NAND_OMAP_GPMC
  127. #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
  128. /* to access nand */
  129. #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
  130. /* to access nand at */
  131. /* CS0 */
  132. #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
  133. #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
  134. /* devices */
  135. #define CONFIG_JFFS2_NAND
  136. /* nand device jffs2 lives on */
  137. #define CONFIG_JFFS2_DEV "nand0"
  138. /* start of jffs2 partition */
  139. #define CONFIG_JFFS2_PART_OFFSET 0x680000
  140. #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
  141. /* partition */
  142. /* Environment information */
  143. #define CONFIG_BOOTDELAY 10
  144. #define CONFIG_EXTRA_ENV_SETTINGS \
  145. "loadaddr=0x82000000\0" \
  146. "usbtty=cdc_acm\0" \
  147. "console=ttyS2,115200n8\0" \
  148. "mmcdev=0\0" \
  149. "videomode=1024x768@60,vxres=1024,vyres=768\0" \
  150. "videospec=omapfb:vram:2M,vram:4M\0" \
  151. "mmcargs=setenv bootargs console=${console} " \
  152. "video=${videospec},mode:${videomode} " \
  153. "root=/dev/mmcblk0p2 rw " \
  154. "rootfstype=ext3 rootwait\0" \
  155. "nandargs=setenv bootargs console=${console} " \
  156. "video=${videospec},mode:${videomode} " \
  157. "root=/dev/mtdblock4 rw " \
  158. "rootfstype=jffs2\0" \
  159. "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
  160. "bootscript=echo Running bootscript from mmc ...; " \
  161. "source ${loadaddr}\0" \
  162. "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
  163. "mmcboot=echo Booting from mmc ...; " \
  164. "run mmcargs; " \
  165. "bootm ${loadaddr}\0" \
  166. "nandboot=echo Booting from nand ...; " \
  167. "run nandargs; " \
  168. "nand read ${loadaddr} 280000 400000; " \
  169. "bootm ${loadaddr}\0" \
  170. #define CONFIG_BOOTCOMMAND \
  171. "mmc dev ${mmcdev}; if mmc rescan; then " \
  172. "if run loadbootscript; then " \
  173. "run bootscript; " \
  174. "else " \
  175. "if run loaduimage; then " \
  176. "run mmcboot; " \
  177. "else run nandboot; " \
  178. "fi; " \
  179. "fi; " \
  180. "else run nandboot; fi"
  181. #define CONFIG_AUTO_COMPLETE 1
  182. /*
  183. * Miscellaneous configurable options
  184. */
  185. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  186. #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
  187. #define CONFIG_SYS_PROMPT "OMAP3 Zoom1 # "
  188. #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
  189. /* Print Buffer Size */
  190. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
  191. sizeof(CONFIG_SYS_PROMPT) + 16)
  192. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  193. /* Boot Argument Buffer Size */
  194. #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
  195. #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
  196. /* works on */
  197. #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
  198. 0x01F00000) /* 31MB */
  199. #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
  200. /* load address */
  201. #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
  202. #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
  203. #define CONFIG_SYS_INIT_RAM_SIZE 0x800
  204. #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
  205. CONFIG_SYS_INIT_RAM_SIZE - \
  206. GENERATED_GBL_DATA_SIZE)
  207. /*
  208. * OMAP3 has 12 GP timers, they can be driven by the system clock
  209. * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
  210. * This rate is divided by a local divisor.
  211. */
  212. #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
  213. #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
  214. #define CONFIG_SYS_HZ 1000
  215. /*-----------------------------------------------------------------------
  216. * Physical Memory Map
  217. */
  218. #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
  219. #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
  220. #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
  221. /*-----------------------------------------------------------------------
  222. * FLASH and environment organization
  223. */
  224. /* **** PISMO SUPPORT *** */
  225. /* Configure the PISMO */
  226. #define PISMO1_NAND_SIZE GPMC_SIZE_128M
  227. #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
  228. #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
  229. #if defined(CONFIG_CMD_NAND)
  230. #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
  231. #endif
  232. /* Monitor at start of flash */
  233. #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
  234. #define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
  235. #define CONFIG_ENV_IS_IN_NAND 1
  236. #define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
  237. #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
  238. #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
  239. #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
  240. #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
  241. #define CONFIG_SYS_CACHELINE_SIZE 64
  242. #endif /* __CONFIG_H */