/include/configs/p3p440.h

https://gitlab.com/ubuntu-omap/u-boot-omap5 · C Header · 326 lines · 179 code · 58 blank · 89 comment · 0 complexity · 9667896c285cd5aec4fd39b29ead3e39 MD5 · raw file

  1. /*
  2. * (C) Copyright 2005-2006
  3. * Stefan Roese, DENX Software Engineering, sr@denx.de.
  4. *
  5. * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
  6. *
  7. * See file CREDITS for list of people who contributed to this
  8. * project.
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License as
  12. * published by the Free Software Foundation; either version 2 of
  13. * the License, or (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  23. * MA 02111-1307 USA
  24. */
  25. /************************************************************************
  26. * board/config_p3p440.h - configuration for Prodrive P3P440
  27. ***********************************************************************/
  28. #ifndef __CONFIG_H
  29. #define __CONFIG_H
  30. /*-----------------------------------------------------------------------
  31. * High Level Configuration Options
  32. *----------------------------------------------------------------------*/
  33. #define CONFIG_P3P440 1 /* Board is P3P440 */
  34. #define CONFIG_440GP 1 /* Specifc GP support */
  35. #define CONFIG_440 1 /* ... PPC440 family */
  36. #define CONFIG_4xx 1 /* ... PPC4xx family */
  37. #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
  38. #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
  39. #define CONFIG_SYS_TEXT_BASE 0xFFFC0000
  40. #define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
  41. /*-----------------------------------------------------------------------
  42. * Base addresses -- Note these are effective addresses where the
  43. * actual resources get mapped (not physical addresses)
  44. *----------------------------------------------------------------------*/
  45. #define CONFIG_SYS_SDRAM_BASE 0x00000000 /* _must_ be 0 */
  46. #define CONFIG_SYS_FLASH_BASE 0xff800000 /* start of FLASH */
  47. #define CONFIG_SYS_MONITOR_BASE 0xfffc0000 /* start of monitor */
  48. #define CONFIG_SYS_PCI_MEMBASE 0x80000000 /* mapped pci memory */
  49. #define CONFIG_SYS_ISRAM_BASE 0xc0000000 /* internal SRAM */
  50. #define CONFIG_SYS_PCI_BASE 0xd0000000 /* internal PCI regs */
  51. #define CONFIG_SYS_USB_BASE (CONFIG_SYS_PERIPHERAL_BASE + 0x00000000)
  52. /*-----------------------------------------------------------------------
  53. * Initial RAM & stack pointer (placed in internal SRAM)
  54. *----------------------------------------------------------------------*/
  55. #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_ISRAM_BASE /* Initial RAM address */
  56. #define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in RAM */
  57. #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  58. #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
  59. #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon*/
  60. #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc*/
  61. /*-----------------------------------------------------------------------
  62. * DDR SDRAM
  63. *----------------------------------------------------------------------*/
  64. #define CONFIG_SDRAM_BANK0 1 /* init onboard DDR SDRAM bank 0*/
  65. #define CONFIG_SDRAM_ECC /* enable ECC support */
  66. #define CONFIG_SYS_SDRAM_TABLE { \
  67. {(256 << 20), 13, 0x000C4001}, /* 256MB mode 3, 13x10(4)*/ \
  68. {(64 << 20), 12, 0x00082001}} /* 64MB mode 2, 12x9(4) */
  69. /*-----------------------------------------------------------------------
  70. * Serial Port
  71. *----------------------------------------------------------------------*/
  72. #define CONFIG_CONS_INDEX 1 /* Use UART0 */
  73. #define CONFIG_SYS_NS16550
  74. #define CONFIG_SYS_NS16550_SERIAL
  75. #define CONFIG_SYS_NS16550_REG_SIZE 1
  76. #define CONFIG_SYS_NS16550_CLK get_serial_clock()
  77. #undef CONFIG_SYS_EXT_SERIAL_CLOCK
  78. #define CONFIG_BAUDRATE 115200
  79. #define CONFIG_SYS_BAUDRATE_TABLE \
  80. { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \
  81. 57600, 115200, 230400, 460800, 921600 }
  82. /*-----------------------------------------------------------------------
  83. * I2C
  84. *----------------------------------------------------------------------*/
  85. #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
  86. #undef CONFIG_SOFT_I2C /* I2C bit-banged */
  87. #define CONFIG_PPC4XX_I2C /* use PPC4xx driver */
  88. #define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed and slave address */
  89. #define CONFIG_SYS_I2C_SLAVE 0x7F
  90. #define CONFIG_SYS_I2C_NOPROBES {0x69} /* Don't probe these addrs */
  91. /*-----------------------------------------------------------------------
  92. * I2C RTC
  93. *----------------------------------------------------------------------*/
  94. #define CONFIG_RTC_MAX6900 1 /* MAX6900 RTC */
  95. /*-----------------------------------------------------------------------
  96. * I2C EEPROM (PCF8594C) for environment
  97. *----------------------------------------------------------------------*/
  98. #define CONFIG_SYS_I2C_EEPROM_ADDR 0x54 /* EEPROM PCF8594C */
  99. #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
  100. /* mask of address bits that overflow into the "EEPROM chip address" */
  101. #define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
  102. #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 /* The Philips PCF8594C has */
  103. /* 8 byte page write mode using */
  104. /* last 3 bits of the address */
  105. #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 40 /* and takes up to 40 msec */
  106. /*-----------------------------------------------------------------------
  107. * Default configuration (environment varibles...)
  108. *----------------------------------------------------------------------*/
  109. #define CONFIG_PREBOOT "echo;" \
  110. "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
  111. "echo"
  112. #undef CONFIG_BOOTARGS
  113. #define CONFIG_EXTRA_ENV_SETTINGS \
  114. "netdev=eth0\0" \
  115. "hostname=p3p440\0" \
  116. "nfsargs=setenv bootargs root=/dev/nfs rw " \
  117. "nfsroot=${serverip}:${rootpath}\0" \
  118. "ramargs=setenv bootargs root=/dev/ram rw\0" \
  119. "addip=setenv bootargs ${bootargs} " \
  120. "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
  121. ":${hostname}:${netdev}:off panic=1\0" \
  122. "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
  123. "flash_nfs=run nfsargs addip addtty;" \
  124. "bootm ${kernel_addr}\0" \
  125. "flash_self=run ramargs addip addtty;" \
  126. "bootm ${kernel_addr} ${ramdisk_addr}\0" \
  127. "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
  128. "bootm\0" \
  129. "rootpath=/opt/eldk/ppc_4xx\0" \
  130. "bootfile=/tftpboot/p3p440/uImage\0" \
  131. "kernel_addr=ff800000\0" \
  132. "ramdisk_addr=ff810000\0" \
  133. "load=tftp 100000 /tftpboot/p3p440/u-boot.bin\0" \
  134. "update=protect off fffc0000 ffffffff;era fffc0000 ffffffff;" \
  135. "cp.b 100000 fffc0000 40000;" \
  136. "setenv filesize;saveenv\0" \
  137. "upd=run load update\0" \
  138. "unlock=yes\0" \
  139. ""
  140. #define CONFIG_BOOTCOMMAND "run net_nfs"
  141. #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
  142. #define CONFIG_BAUDRATE 115200
  143. #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
  144. #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
  145. #define CONFIG_PPC4xx_EMAC
  146. #define CONFIG_MII 1 /* MII PHY management */
  147. #define CONFIG_PHY_ADDR 0x1c /* PHY address */
  148. #define CONFIG_HAS_ETH1
  149. #define CONFIG_PHY1_ADDR 0x1d /* EMAC1 PHY address */
  150. #define CONFIG_SYS_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
  151. #define CONFIG_NETCONSOLE /* include NetConsole support */
  152. /*
  153. * BOOTP options
  154. */
  155. #define CONFIG_BOOTP_BOOTFILESIZE
  156. #define CONFIG_BOOTP_BOOTPATH
  157. #define CONFIG_BOOTP_GATEWAY
  158. #define CONFIG_BOOTP_HOSTNAME
  159. /*
  160. * Command line configuration.
  161. */
  162. #include <config_cmd_default.h>
  163. #define CONFIG_CMD_ASKENV
  164. #define CONFIG_CMD_DATE
  165. #define CONFIG_CMD_DHCP
  166. #define CONFIG_CMD_DIAG
  167. #define CONFIG_CMD_ELF
  168. #define CONFIG_CMD_I2C
  169. #define CONFIG_CMD_IRQ
  170. #define CONFIG_CMD_MII
  171. #define CONFIG_CMD_NET
  172. #define CONFIG_CMD_NFS
  173. #define CONFIG_CMD_PCI
  174. #define CONFIG_CMD_PING
  175. #define CONFIG_CMD_REGINFO
  176. #define CONFIG_CMD_EEPROM
  177. #define CONFIG_CMD_SNTP
  178. #undef CONFIG_WATCHDOG /* watchdog disabled */
  179. /*-----------------------------------------------------------------------
  180. * Miscellaneous configurable options
  181. *----------------------------------------------------------------------*/
  182. #define CONFIG_SYS_LONGHELP /* undef to save memory */
  183. #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
  184. #if defined(CONFIG_CMD_KGDB)
  185. #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
  186. #else
  187. #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
  188. #endif
  189. #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
  190. #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
  191. #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
  192. #define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
  193. #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
  194. #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
  195. #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
  196. #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
  197. #define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
  198. #define CONFIG_LOOPW 1 /* enable loopw command */
  199. #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
  200. #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
  201. /*-----------------------------------------------------------------------
  202. * PCI stuff
  203. *----------------------------------------------------------------------*/
  204. /* General PCI */
  205. #define CONFIG_PCI /* include pci support */
  206. #define CONFIG_PCI_PNP /* do pci plug-and-play */
  207. #define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
  208. #define CONFIG_SYS_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CONFIG_SYS_PCI_MEMBASE */
  209. /* Board-specific PCI */
  210. #define CONFIG_SYS_PCI_TARGET_INIT /* let board init pci target */
  211. #define CONFIG_DISABLE_PISE_TEST /* disable PISE test (PCIX only)*/
  212. #define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
  213. #define CONFIG_SYS_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
  214. /*-----------------------------------------------------------------------
  215. * External Bus Controller (EBC) Setup
  216. *----------------------------------------------------------------------*/
  217. #define CONFIG_SYS_FLASH0 0xFF800000
  218. #define CONFIG_SYS_FLASH1 0xFF000000
  219. #define CONFIG_SYS_FLASH2 0xFE800000
  220. #define CONFIG_SYS_FLASH3 0xFE000000
  221. #define CONFIG_SYS_USB 0xF0000000
  222. /* Memory Bank 0 (Flash Bank 0, NOR-FLASH) initialization */
  223. #define CONFIG_SYS_EBC_PB0AP 0x03050200
  224. #define CONFIG_SYS_EBC_PB0CR (CONFIG_SYS_FLASH0 | 0x7A000) /* BAS=0xFF8,BS=8MB,BU=R/W,BW=16bit */
  225. /* Memory Bank 1 (Flash Bank 1, NOR-FLASH) initialization */
  226. #define CONFIG_SYS_EBC_PB1AP 0x03050200
  227. #define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_FLASH1 | 0x7A000) /* BAS=0xFF8,BS=8MB,BU=R/W,BW=16bit */
  228. /* Memory Bank 2 (Flash Bank 2, NOR-FLASH) initialization */
  229. #define CONFIG_SYS_EBC_PB2AP 0x03050200
  230. #define CONFIG_SYS_EBC_PB2CR (CONFIG_SYS_FLASH2 | 0x7A000) /* BAS=0xFF8,BS=8MB,BU=R/W,BW=16bit */
  231. /* Memory Bank 3 (Flash Bank 3, NOR-FLASH) initialization */
  232. #define CONFIG_SYS_EBC_PB3AP 0x03050200
  233. #define CONFIG_SYS_EBC_PB3CR (CONFIG_SYS_FLASH3 | 0x7A000) /* BAS=0xFF8,BS=8MB,BU=R/W,BW=16bit */
  234. /* Memory Bank 7 (USB controller) initialization */
  235. #define CONFIG_SYS_EBC_PB7AP 0x02015000
  236. #define CONFIG_SYS_EBC_PB7CR (CONFIG_SYS_USB | 0xFE000) /* BAS=0xF00,BS=128MB,BU=R/W,BW=16bit*/
  237. /*-----------------------------------------------------------------------
  238. * FLASH related
  239. *----------------------------------------------------------------------*/
  240. #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
  241. #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
  242. #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH3, CONFIG_SYS_FLASH2, CONFIG_SYS_FLASH1, CONFIG_SYS_FLASH0 }
  243. #define CONFIG_SYS_MAX_FLASH_BANKS 4 /* max number of memory banks */
  244. #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
  245. #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
  246. #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
  247. #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
  248. #define CONFIG_SYS_FLASH_PROTECTION 1 /* use hardware flash protection */
  249. #define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
  250. #define CONFIG_SYS_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
  251. #define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
  252. #define CONFIG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
  253. #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE-CONFIG_ENV_SECT_SIZE)
  254. #define CONFIG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
  255. /* Address and size of Redundant Environment Sector */
  256. #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR-CONFIG_ENV_SECT_SIZE)
  257. #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
  258. /*
  259. * For booting Linux, the board info and command line data
  260. * have to be in the first 8 MB of memory, since this is
  261. * the maximum mapped by the Linux kernel during initialization.
  262. */
  263. #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
  264. #if defined(CONFIG_CMD_KGDB)
  265. #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
  266. #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
  267. #endif
  268. #endif /* __CONFIG_H */