/dvbt/trunk/debug/lib_rtl_rs/pe_lib.v
http://github.com/zaqwes8811/decoder-reed-solomon · Verilog · 243 lines · 138 code · 20 blank · 85 comment · 4 complexity · 9a7f7af9f4d1f914ba9638cb3f9d8f21 MD5 · raw file
- /**
- File: pe_lib.v
-
- Abstract: ?????????????? ????? ?? iBM
- ?????????
- */
- `include "vc_top.v"
- /**
- Abst.:
- ????????? ?????
-
- Con.:
- PE_fold PEj_fold(
- .clk(clk), .rst(rst), .clk_ena(clk_ena),
- // control
- .load(load), // ???????? ????????
- .MCr(MCr),
- //.LCr(LCr),
- // dataflow ///
- .delta0r(),
- .gammar(),
- .deltaiir(),
- .syndvali(), // ??????????????? ???????
- // out
- .deltair() // ?? ??????????? ?????
- );
- */
- module PE_fold(
- clk, rst, clk_ena,
- // control
- load, // ???????? ????????
- MCr,
- LCr,
- // dataflow ///
- delta0r,
- gammar,
-
- deltaiir, //
-
- syndvali, // ??????????????? ???????
- // out
- deltair, // ?? ??????????? ?????
- bigdelta // ????? ???????? ?? ??????? ?????!!!
- );
- //parameter FOLDING_FACTOR = 4;
- //
- input clk, rst, clk_ena;
- input load; // ????????, ??? ? ????
- input MCr;
- input LCr;
- input [`WIDTH-1:0] delta0r;
- input [`WIDTH-1:0] gammar;
-
- input [`WIDTH-1:0] deltaiir; // ?????? ??????
- wire [`WIDTH-1:0] deltaiir_mux_in;
- input [(`WIDTH)*(`NUM_REG)-1:0] syndvali;
- output [`WIDTH-1:0] deltair;
- //output [`WIDTH-1:0] tttar;
- output [(`WIDTH)*(`NUM_REG)-1:0] bigdelta; // ?????? ???? ? ??????????
- // local ///
- wire [(`WIDTH)*(`NUM_REG)-1:0] doutbig_2;
- wire [`WIDTH-1:0] ogmult1, ogmult2; // ?????? ???????????
- wire [`WIDTH-1:0] oreg1, oreg2, omux;
- wire [`WIDTH-1:0] omux_delay; // ? ?????? ?????????
- wire [`WIDTH-1:0] ogadder;
-
- // connecting ///
- mux2bus #(.WIDTH(`WIDTH)) // ??????? ?????????????
- mult_input_pe(
- .sel(LCr),
- .A0(
- oreg2),
- //doutbig_2[(`NUM_REG-1)*(`WIDTH)-1:(`NUM_REG-2)*(`WIDTH)]),
- .A1(deltaiir),
- .Z(deltaiir_mux_in));
-
- // ???. ????. ???.
- wire [`WIDTH-1:0] oreg2_delay;
- wire [`WIDTH-1:0] oreg2_tmp;
- mux2bus #(.WIDTH(`WIDTH)) // ??????? ?????????????
- mult_out_pe(
- .sel(
- //1),
- LCr),
- .A0(oreg2_delay), // ?? ???? ????? ?????
- .A1(oreg2),
- .Z(oreg2_tmp));
-
- register_pe
- out_reg(
- .clk(clk), .rst(rst), .clk_ena(clk_ena),
- // control ///
- .load(load),
- // dataflow ///
- .datain(oreg2_tmp),
- .dforload(syndvali[(`NUM_REG)*(`WIDTH)-1:
- (`NUM_REG-1)*(`WIDTH)]), // inputs
- .dataout(oreg2_delay));
-
-
- // ??????????
- generate if(`WIDTH == 8) begin : asdfadf // ???????? ???????????
- gmult8_rtl gm_pe1(
- .a(deltaiir_mux_in), .b(gammar),
- .c(ogmult1));
- gmult8_rtl gm_pe2(
- .a(omux_delay), .b(delta0r),
- .c(ogmult2));
- end endgenerate
- mux2bus #(.WIDTH(`WIDTH)) multip(
- .sel(MCr),
- .A0(omux_delay), .A1(deltaiir_mux_in),
- .Z(omux));
-
- /// ttta-???????
- shift_reg_width
- #(.NUM_REG(`NUM_REG)) // ???!
- label_ttta(
- .clk(clk), .rst(rst), .clk_ena(clk_ena),
- // control ///
- .load(load),
- // dataflow ///
- .din(omux),
- .dfload(
- syndvali), // ?? ????????
- //syndvali_tmp), // ?? ????????
- // out. //
- .dout(omux_delay),
- .doutbig(doutbig)); // ???????? ??????
-
- /// delta-???????
- assign ogadder = ogmult1^ogmult2;
- shift_reg_width
- #(.NUM_REG(`NUM_REG-1)) // ?? ???!!
- label_delta(
- .clk(clk), .rst(rst), .clk_ena(clk_ena),
- // control ///
- .load(load),
- // dataflow ///
- .din(ogadder),
- .dfload(syndvali[(`NUM_REG-1)*(`WIDTH)-1:(0)*(`WIDTH)]), // ?? ????????
- // out. //
- .dout(oreg2),
- .doutbig(doutbig_2)); // ???????? ??????
-
- // output
- assign deltair = oreg2_delay;
- //assign tttar =
- assign bigdelta = doutbig_2;
- assign bigdelta[(`FOLDING_FACTOR)*(`WIDTH)-1:(`FOLDING_FACTOR-1)*(`WIDTH)] = oreg2_delay;
- endmodule
- /**
- ????????? ??????. ?????
- 1. ? ????????? ?????????
- 2. ??? ????
- 3. ??
-
- Connect:
- PE PEj(
- .clk(clk), .rst(rst), .clk_ena(clk_ena),
- // control
- .load(load), // ???????? ????????
- .MCr(MCr),
- // dataflow ///
- .delta0r(),
- .gammar(),
- .deltaiir(),
- .syndvali(), // ??????????????? ???????
- // out
- .deltair() // ?? ??????????? ?????
- );
- */
- module PE(
- clk, rst, clk_ena,
- // control
- load, // ???????? ????????
- MCr,
- // dataflow ///
- delta0r,
- gammar,
- deltaiir,
- syndvali, // ??????????????? ???????
- // out
- deltair // ?? ??????????? ?????
- );
- input clk, rst, clk_ena;
- input load; // ????????, ??? ? ????
- input MCr;
- input [`WIDTH-1:0] delta0r;
- input [`WIDTH-1:0] gammar;
- input [`WIDTH-1:0] deltaiir;
- input [`WIDTH-1:0] syndvali;
- output [`WIDTH-1:0] deltair;
- // local //////////////
- wire [`WIDTH-1:0] ogmult1, ogmult2; // ?????? ???????????
- wire [`WIDTH-1:0] oreg1, oreg2, omux;
- wire [`WIDTH-1:0] omux_delay; // ? ?????? ?????????
- wire [`WIDTH-1:0] ogadder;
-
- // connecting /////////////
- generate if(`WIDTH == 8) begin : asdfadf // ???????? ???????????
- gmult8_rtl gm_pe1(
- .a(deltaiir), .b(gammar),
- .c(ogmult1));
- gmult8_rtl gm_pe2(
- .a(omux_delay), .b(delta0r),
- .c(ogmult2));
- end endgenerate
- mux2bus #(.WIDTH(`WIDTH)) multip(
- .sel(MCr),
- .A0(omux_delay), .A1(deltaiir),
- .Z(omux));
-
- /// ttta-???????
- register_pe label_ttta(
- .clk(clk), .rst(rst), .clk_ena(clk_ena),
- // control ///
- .load(load),
- // dataflow ///
- .datain(omux), .dforload(syndvali), // inputs
- .dataout(omux_delay)
- );
- // ???????? ??????? ///
- assign ogadder = ogmult1^ogmult2;
- register_pe label_delta(
- .clk(clk), .rst(rst), .clk_ena(clk_ena),
- // control ///
- .load(load),
- // dataflow ///
- .datain(ogadder), .dforload(syndvali), // inputs
- .dataout(oreg2)
- );
-
- // output
- assign deltair = oreg2;
- endmodule