/dvbt/trunk/debug/lib_rtl_rs/pe_lib.v

http://github.com/zaqwes8811/decoder-reed-solomon · Verilog · 243 lines · 138 code · 20 blank · 85 comment · 4 complexity · 9a7f7af9f4d1f914ba9638cb3f9d8f21 MD5 · raw file

  1. /**
  2. File: pe_lib.v
  3. Abstract: ?????????????? €????? ??€ iBM
  4. ?????????
  5. */
  6. `include "vc_top.v"
  7. /**
  8. Abst.:
  9. ?????????€ €?????
  10. Con.:
  11. PE_fold PEj_fold(
  12. .clk(clk), .rst(rst), .clk_ena(clk_ena),
  13. // control
  14. .load(load), // ???????? ????????
  15. .MCr(MCr),
  16. //.LCr(LCr),
  17. // dataflow ///
  18. .delta0r(),
  19. .gammar(),
  20. .deltaiir(),
  21. .syndvali(), // ??????????????? ???????
  22. // out
  23. .deltair() // ?? ??????????? €?????
  24. );
  25. */
  26. module PE_fold(
  27. clk, rst, clk_ena,
  28. // control
  29. load, // ???????? ????????
  30. MCr,
  31. LCr,
  32. // dataflow ///
  33. delta0r,
  34. gammar,
  35. deltaiir, //
  36. syndvali, // ??????????????? ???????
  37. // out
  38. deltair, // ?? ??????????? €?????
  39. bigdelta // ????? ???????? ?? ??????? ?????!!!
  40. );
  41. //parameter FOLDING_FACTOR = 4;
  42. //
  43. input clk, rst, clk_ena;
  44. input load; // ?????€???, ??? ? ????
  45. input MCr;
  46. input LCr;
  47. input [`WIDTH-1:0] delta0r;
  48. input [`WIDTH-1:0] gammar;
  49. input [`WIDTH-1:0] deltaiir; // ??????€ ???€???
  50. wire [`WIDTH-1:0] deltaiir_mux_in;
  51. input [(`WIDTH)*(`NUM_REG)-1:0] syndvali;
  52. output [`WIDTH-1:0] deltair;
  53. //output [`WIDTH-1:0] tttar;
  54. output [(`WIDTH)*(`NUM_REG)-1:0] bigdelta; // ??????€ ???? ? ??????????
  55. // local ///
  56. wire [(`WIDTH)*(`NUM_REG)-1:0] doutbig_2;
  57. wire [`WIDTH-1:0] ogmult1, ogmult2; // ?????? ???????????
  58. wire [`WIDTH-1:0] oreg1, oreg2, omux;
  59. wire [`WIDTH-1:0] omux_delay; // ? ?????? ?????????€
  60. wire [`WIDTH-1:0] ogadder;
  61. // connecting ///
  62. mux2bus #(.WIDTH(`WIDTH)) // ??????? ?????????????
  63. mult_input_pe(
  64. .sel(LCr),
  65. .A0(
  66. oreg2),
  67. //doutbig_2[(`NUM_REG-1)*(`WIDTH)-1:(`NUM_REG-2)*(`WIDTH)]),
  68. .A1(deltaiir),
  69. .Z(deltaiir_mux_in));
  70. // ???. ????. ???.
  71. wire [`WIDTH-1:0] oreg2_delay;
  72. wire [`WIDTH-1:0] oreg2_tmp;
  73. mux2bus #(.WIDTH(`WIDTH)) // ??????? ?????????????
  74. mult_out_pe(
  75. .sel(
  76. //1),
  77. LCr),
  78. .A0(oreg2_delay), // ?? ???? ????? ?????
  79. .A1(oreg2),
  80. .Z(oreg2_tmp));
  81. register_pe
  82. out_reg(
  83. .clk(clk), .rst(rst), .clk_ena(clk_ena),
  84. // control ///
  85. .load(load),
  86. // dataflow ///
  87. .datain(oreg2_tmp),
  88. .dforload(syndvali[(`NUM_REG)*(`WIDTH)-1:
  89. (`NUM_REG-1)*(`WIDTH)]), // inputs
  90. .dataout(oreg2_delay));
  91. // ??????????
  92. generate if(`WIDTH == 8) begin : asdfadf // ???????? ???????????
  93. gmult8_rtl gm_pe1(
  94. .a(deltaiir_mux_in), .b(gammar),
  95. .c(ogmult1));
  96. gmult8_rtl gm_pe2(
  97. .a(omux_delay), .b(delta0r),
  98. .c(ogmult2));
  99. end endgenerate
  100. mux2bus #(.WIDTH(`WIDTH)) multip(
  101. .sel(MCr),
  102. .A0(omux_delay), .A1(deltaiir_mux_in),
  103. .Z(omux));
  104. /// ttta-???????
  105. shift_reg_width
  106. #(.NUM_REG(`NUM_REG)) // ???!
  107. label_ttta(
  108. .clk(clk), .rst(rst), .clk_ena(clk_ena),
  109. // control ///
  110. .load(load),
  111. // dataflow ///
  112. .din(omux),
  113. .dfload(
  114. syndvali), // ??€ ????????
  115. //syndvali_tmp), // ??€ ????????
  116. // out. //
  117. .dout(omux_delay),
  118. .doutbig(doutbig)); // ???????? ??????
  119. /// delta-???????
  120. assign ogadder = ogmult1^ogmult2;
  121. shift_reg_width
  122. #(.NUM_REG(`NUM_REG-1)) // ?? ???!!
  123. label_delta(
  124. .clk(clk), .rst(rst), .clk_ena(clk_ena),
  125. // control ///
  126. .load(load),
  127. // dataflow ///
  128. .din(ogadder),
  129. .dfload(syndvali[(`NUM_REG-1)*(`WIDTH)-1:(0)*(`WIDTH)]), // ??€ ????????
  130. // out. //
  131. .dout(oreg2),
  132. .doutbig(doutbig_2)); // ???????? ??????
  133. // output
  134. assign deltair = oreg2_delay;
  135. //assign tttar =
  136. assign bigdelta = doutbig_2;
  137. assign bigdelta[(`FOLDING_FACTOR)*(`WIDTH)-1:(`FOLDING_FACTOR-1)*(`WIDTH)] = oreg2_delay;
  138. endmodule
  139. /**
  140. ????????? ??????. €?????
  141. 1. ? ????????? ?????????
  142. 2. ??? ????
  143. 3. ??
  144. Connect:
  145. PE PEj(
  146. .clk(clk), .rst(rst), .clk_ena(clk_ena),
  147. // control
  148. .load(load), // ???????? ????????
  149. .MCr(MCr),
  150. // dataflow ///
  151. .delta0r(),
  152. .gammar(),
  153. .deltaiir(),
  154. .syndvali(), // ??????????????? ???????
  155. // out
  156. .deltair() // ?? ??????????? €?????
  157. );
  158. */
  159. module PE(
  160. clk, rst, clk_ena,
  161. // control
  162. load, // ???????? ????????
  163. MCr,
  164. // dataflow ///
  165. delta0r,
  166. gammar,
  167. deltaiir,
  168. syndvali, // ??????????????? ???????
  169. // out
  170. deltair // ?? ??????????? €?????
  171. );
  172. input clk, rst, clk_ena;
  173. input load; // ?????€???, ??? ? ????
  174. input MCr;
  175. input [`WIDTH-1:0] delta0r;
  176. input [`WIDTH-1:0] gammar;
  177. input [`WIDTH-1:0] deltaiir;
  178. input [`WIDTH-1:0] syndvali;
  179. output [`WIDTH-1:0] deltair;
  180. // local //////////////
  181. wire [`WIDTH-1:0] ogmult1, ogmult2; // ?????? ???????????
  182. wire [`WIDTH-1:0] oreg1, oreg2, omux;
  183. wire [`WIDTH-1:0] omux_delay; // ? ?????? ?????????€
  184. wire [`WIDTH-1:0] ogadder;
  185. // connecting /////////////
  186. generate if(`WIDTH == 8) begin : asdfadf // ???????? ???????????
  187. gmult8_rtl gm_pe1(
  188. .a(deltaiir), .b(gammar),
  189. .c(ogmult1));
  190. gmult8_rtl gm_pe2(
  191. .a(omux_delay), .b(delta0r),
  192. .c(ogmult2));
  193. end endgenerate
  194. mux2bus #(.WIDTH(`WIDTH)) multip(
  195. .sel(MCr),
  196. .A0(omux_delay), .A1(deltaiir),
  197. .Z(omux));
  198. /// ttta-???????
  199. register_pe label_ttta(
  200. .clk(clk), .rst(rst), .clk_ena(clk_ena),
  201. // control ///
  202. .load(load),
  203. // dataflow ///
  204. .datain(omux), .dforload(syndvali), // inputs
  205. .dataout(omux_delay)
  206. );
  207. // ???????? ??????? ///
  208. assign ogadder = ogmult1^ogmult2;
  209. register_pe label_delta(
  210. .clk(clk), .rst(rst), .clk_ena(clk_ena),
  211. // control ///
  212. .load(load),
  213. // dataflow ///
  214. .datain(ogadder), .dforload(syndvali), // inputs
  215. .dataout(oreg2)
  216. );
  217. // output
  218. assign deltair = oreg2;
  219. endmodule