/dvbt/trunk/debug/lib_rtl_rs/pe_lib.v
Verilog | 243 lines | 138 code | 20 blank | 85 comment | 4 complexity | 9a7f7af9f4d1f914ba9638cb3f9d8f21 MD5 | raw file
1/** 2 File: pe_lib.v 3 4 Abstract: ?????????????? ????? ?? iBM 5 ????????? 6 7*/ 8 9`include "vc_top.v" 10/** 11 Abst.: 12 ????????? ????? 13 14 Con.: 15 PE_fold PEj_fold( 16 .clk(clk), .rst(rst), .clk_ena(clk_ena), 17 // control 18 .load(load), // ???????? ???????? 19 .MCr(MCr), 20 //.LCr(LCr), 21 // dataflow /// 22 .delta0r(), 23 .gammar(), 24 .deltaiir(), 25 .syndvali(), // ??????????????? ??????? 26 // out 27 .deltair() // ?? ??????????? ????? 28 ); 29*/ 30module PE_fold( 31 clk, rst, clk_ena, 32 // control 33 load, // ???????? ???????? 34 MCr, 35 LCr, 36 // dataflow /// 37 delta0r, 38 gammar, 39 40 deltaiir, // 41 42 syndvali, // ??????????????? ??????? 43 // out 44 deltair, // ?? ??????????? ????? 45 bigdelta // ????? ???????? ?? ??????? ?????!!! 46); 47 //parameter FOLDING_FACTOR = 4; 48 // 49 input clk, rst, clk_ena; 50 input load; // ????????, ??? ? ???? 51 input MCr; 52 input LCr; 53 input [`WIDTH-1:0] delta0r; 54 input [`WIDTH-1:0] gammar; 55 56 input [`WIDTH-1:0] deltaiir; // ?????? ?????? 57 wire [`WIDTH-1:0] deltaiir_mux_in; 58 input [(`WIDTH)*(`NUM_REG)-1:0] syndvali; 59 output [`WIDTH-1:0] deltair; 60 //output [`WIDTH-1:0] tttar; 61 output [(`WIDTH)*(`NUM_REG)-1:0] bigdelta; // ?????? ???? ? ?????????? 62 63 // local /// 64 wire [(`WIDTH)*(`NUM_REG)-1:0] doutbig_2; 65 wire [`WIDTH-1:0] ogmult1, ogmult2; // ?????? ??????????? 66 wire [`WIDTH-1:0] oreg1, oreg2, omux; 67 wire [`WIDTH-1:0] omux_delay; // ? ?????? ????????? 68 wire [`WIDTH-1:0] ogadder; 69 70 // connecting /// 71 mux2bus #(.WIDTH(`WIDTH)) // ??????? ????????????? 72 mult_input_pe( 73 .sel(LCr), 74 .A0( 75 oreg2), 76 //doutbig_2[(`NUM_REG-1)*(`WIDTH)-1:(`NUM_REG-2)*(`WIDTH)]), 77 .A1(deltaiir), 78 .Z(deltaiir_mux_in)); 79 80 // ???. ????. ???. 81 wire [`WIDTH-1:0] oreg2_delay; 82 wire [`WIDTH-1:0] oreg2_tmp; 83 mux2bus #(.WIDTH(`WIDTH)) // ??????? ????????????? 84 mult_out_pe( 85 .sel( 86 //1), 87 LCr), 88 .A0(oreg2_delay), // ?? ???? ????? ????? 89 .A1(oreg2), 90 .Z(oreg2_tmp)); 91 92 register_pe 93 out_reg( 94 .clk(clk), .rst(rst), .clk_ena(clk_ena), 95 // control /// 96 .load(load), 97 // dataflow /// 98 .datain(oreg2_tmp), 99 .dforload(syndvali[(`NUM_REG)*(`WIDTH)-1: 100 (`NUM_REG-1)*(`WIDTH)]), // inputs 101 .dataout(oreg2_delay)); 102 103 104 // ?????????? 105 generate if(`WIDTH == 8) begin : asdfadf // ???????? ??????????? 106 gmult8_rtl gm_pe1( 107 .a(deltaiir_mux_in), .b(gammar), 108 .c(ogmult1)); 109 gmult8_rtl gm_pe2( 110 .a(omux_delay), .b(delta0r), 111 .c(ogmult2)); 112 end endgenerate 113 mux2bus #(.WIDTH(`WIDTH)) multip( 114 .sel(MCr), 115 .A0(omux_delay), .A1(deltaiir_mux_in), 116 .Z(omux)); 117 118 /// ttta-??????? 119 shift_reg_width 120 #(.NUM_REG(`NUM_REG)) // ???! 121 label_ttta( 122 .clk(clk), .rst(rst), .clk_ena(clk_ena), 123 // control /// 124 .load(load), 125 // dataflow /// 126 .din(omux), 127 .dfload( 128 syndvali), // ?? ???????? 129 //syndvali_tmp), // ?? ???????? 130 // out. // 131 .dout(omux_delay), 132 .doutbig(doutbig)); // ???????? ?????? 133 134 /// delta-??????? 135 assign ogadder = ogmult1^ogmult2; 136 shift_reg_width 137 #(.NUM_REG(`NUM_REG-1)) // ?? ???!! 138 label_delta( 139 .clk(clk), .rst(rst), .clk_ena(clk_ena), 140 // control /// 141 .load(load), 142 // dataflow /// 143 .din(ogadder), 144 .dfload(syndvali[(`NUM_REG-1)*(`WIDTH)-1:(0)*(`WIDTH)]), // ?? ???????? 145 // out. // 146 .dout(oreg2), 147 .doutbig(doutbig_2)); // ???????? ?????? 148 149 // output 150 assign deltair = oreg2_delay; 151 152 //assign tttar = 153 assign bigdelta = doutbig_2; 154 assign bigdelta[(`FOLDING_FACTOR)*(`WIDTH)-1:(`FOLDING_FACTOR-1)*(`WIDTH)] = oreg2_delay; 155endmodule 156 157/** 158 ????????? ??????. ????? 159 1. ? ????????? ????????? 160 2. ??? ???? 161 3. ?? 162 163 Connect: 164 PE PEj( 165 .clk(clk), .rst(rst), .clk_ena(clk_ena), 166 // control 167 .load(load), // ???????? ???????? 168 .MCr(MCr), 169 // dataflow /// 170 .delta0r(), 171 .gammar(), 172 .deltaiir(), 173 .syndvali(), // ??????????????? ??????? 174 // out 175 .deltair() // ?? ??????????? ????? 176 ); 177*/ 178 179module PE( 180 clk, rst, clk_ena, 181 // control 182 load, // ???????? ???????? 183 MCr, 184 // dataflow /// 185 delta0r, 186 gammar, 187 deltaiir, 188 syndvali, // ??????????????? ??????? 189 // out 190 deltair // ?? ??????????? ????? 191); 192 input clk, rst, clk_ena; 193 input load; // ????????, ??? ? ???? 194 input MCr; 195 input [`WIDTH-1:0] delta0r; 196 input [`WIDTH-1:0] gammar; 197 input [`WIDTH-1:0] deltaiir; 198 input [`WIDTH-1:0] syndvali; 199 output [`WIDTH-1:0] deltair; 200 201 // local ////////////// 202 wire [`WIDTH-1:0] ogmult1, ogmult2; // ?????? ??????????? 203 wire [`WIDTH-1:0] oreg1, oreg2, omux; 204 wire [`WIDTH-1:0] omux_delay; // ? ?????? ????????? 205 wire [`WIDTH-1:0] ogadder; 206 207 // connecting ///////////// 208 generate if(`WIDTH == 8) begin : asdfadf // ???????? ??????????? 209 gmult8_rtl gm_pe1( 210 .a(deltaiir), .b(gammar), 211 .c(ogmult1)); 212 gmult8_rtl gm_pe2( 213 .a(omux_delay), .b(delta0r), 214 .c(ogmult2)); 215 end endgenerate 216 mux2bus #(.WIDTH(`WIDTH)) multip( 217 .sel(MCr), 218 .A0(omux_delay), .A1(deltaiir), 219 .Z(omux)); 220 221 /// ttta-??????? 222 register_pe label_ttta( 223 .clk(clk), .rst(rst), .clk_ena(clk_ena), 224 // control /// 225 .load(load), 226 // dataflow /// 227 .datain(omux), .dforload(syndvali), // inputs 228 .dataout(omux_delay) 229 ); 230 // ???????? ??????? /// 231 assign ogadder = ogmult1^ogmult2; 232 register_pe label_delta( 233 .clk(clk), .rst(rst), .clk_ena(clk_ena), 234 // control /// 235 .load(load), 236 // dataflow /// 237 .datain(ogadder), .dforload(syndvali), // inputs 238 .dataout(oreg2) 239 ); 240 241 // output 242 assign deltair = oreg2; 243endmodule