/dvbt/trunk/debug/rtl_template/xxx_wapper_rtl.v

http://github.com/zaqwes8811/decoder-reed-solomon · Verilog · 36 lines · 13 code · 8 blank · 15 comment · 0 complexity · 0a03d18540b70577c0c608350da2d669 MD5 · raw file

  1. /*
  2. Abstract: ???????? ??? ?????
  3. ??????????? ????
  4. */
  5. `include "vconst.v"
  6. module kes_wapper_rtl(
  7. clk, rst, clk_ena,
  8. // control ///
  9. // slave
  10. // master
  11. // dataflow ///
  12. // in
  13. psindroms, // ???????????? ???? ?????????
  14. // out
  15. plambda,
  16. phomega
  17. );
  18. //
  19. wire plambda
  20. wire [`WIDTH-1:0] ireg_out; // ????? ???????? ????????
  21. wire [`WIDTH-1:0] ireg_out;
  22. // output
  23. endmodule
  24. /*
  25. Abstract: slave-master control
  26. */
  27. module sm_control();
  28. endmodule