/dvbt/trunk/debug/gl_top_fold/forge.sdc

 1###########################################################################
 2#
 3# Generated by : Version 10.1 Build 153 11/29/2010 SJ Web Edition
 4#
 5# Project      : forge
 6# Revision     : forge
 7#
 8# Date         : Thu Apr 14 00:38:00 MSD 2011
 9#
10###########################################################################
11 
12 
13# WARNING: Expected ENABLE_CLOCK_LATENCY to be set to 'ON', but it is set to 'OFF'
14#          In SDC, create_generated_clock auto-generates clock latency
15#
16# ------------------------------------------
17#
18# Create generated clocks based on PLLs
19derive_pll_clocks -use_tan_name
20#
21# ------------------------------------------
22
23# ** Clock Latency
24#    -------------
25
26# ** Clock Uncertainty
27#    -----------------
28
29# ** Multicycles
30#    -----------
31# ** Cuts
32#    ----
33
34# ** Input/Output Delays
35#    -------------------
36
37
38
39
40# ** Tpd requirements
41#    ----------------
42
43# ** Setup/Hold Relationships
44#    ------------------------
45
46# ** Tsu/Th requirements
47#    -------------------
48
49
50# ** Tco/MinTco requirements
51#    -----------------------
52
53
54
55# ---------------------------------------------
56