PageRenderTime 25ms CodeModel.GetById 11ms app.highlight 8ms RepoModel.GetById 1ms app.codeStats 0ms

/arch/arm/mach-msm/include/mach/dma.h

https://github.com/AICP/kernel_asus_grouper
C Header | 177 lines | 118 code | 33 blank | 26 comment | 0 complexity | 9cc317661f36bf5fcd9bb48103264557 MD5 | raw file
  1/* linux/include/asm-arm/arch-msm/dma.h
  2 *
  3 * Copyright (C) 2007 Google, Inc.
  4 *
  5 * This software is licensed under the terms of the GNU General Public
  6 * License version 2, as published by the Free Software Foundation, and
  7 * may be copied, distributed, and modified under those terms.
  8 *
  9 * This program is distributed in the hope that it will be useful,
 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 12 * GNU General Public License for more details.
 13 *
 14 */
 15
 16#ifndef __ASM_ARCH_MSM_DMA_H
 17
 18#include <linux/list.h>
 19#include <mach/msm_iomap.h>
 20
 21struct msm_dmov_errdata {
 22	uint32_t flush[6];
 23};
 24
 25struct msm_dmov_cmd {
 26	struct list_head list;
 27	unsigned int cmdptr;
 28	void (*complete_func)(struct msm_dmov_cmd *cmd,
 29			      unsigned int result,
 30			      struct msm_dmov_errdata *err);
 31	void (*execute_func)(struct msm_dmov_cmd *cmd);
 32	void *data;
 33};
 34
 35#ifndef CONFIG_ARCH_MSM8X60
 36void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd);
 37void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful);
 38int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr);
 39#else
 40static inline
 41void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) { }
 42static inline
 43void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd, int graceful) { }
 44static inline
 45int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr) { return -EIO; }
 46#endif
 47
 48
 49#define DMOV_SD0(off, ch) (MSM_DMOV_BASE + 0x0000 + (off) + ((ch) << 2))
 50#define DMOV_SD1(off, ch) (MSM_DMOV_BASE + 0x0400 + (off) + ((ch) << 2))
 51#define DMOV_SD2(off, ch) (MSM_DMOV_BASE + 0x0800 + (off) + ((ch) << 2))
 52#define DMOV_SD3(off, ch) (MSM_DMOV_BASE + 0x0C00 + (off) + ((ch) << 2))
 53
 54#if defined(CONFIG_ARCH_MSM7X30)
 55#define DMOV_SD_AARM DMOV_SD2
 56#else
 57#define DMOV_SD_AARM DMOV_SD3
 58#endif
 59
 60#define DMOV_CMD_PTR(ch)      DMOV_SD_AARM(0x000, ch)
 61#define DMOV_CMD_LIST         (0 << 29) /* does not work */
 62#define DMOV_CMD_PTR_LIST     (1 << 29) /* works */
 63#define DMOV_CMD_INPUT_CFG    (2 << 29) /* untested */
 64#define DMOV_CMD_OUTPUT_CFG   (3 << 29) /* untested */
 65#define DMOV_CMD_ADDR(addr)   ((addr) >> 3)
 66
 67#define DMOV_RSLT(ch)         DMOV_SD_AARM(0x040, ch)
 68#define DMOV_RSLT_VALID       (1 << 31) /* 0 == host has empties result fifo */
 69#define DMOV_RSLT_ERROR       (1 << 3)
 70#define DMOV_RSLT_FLUSH       (1 << 2)
 71#define DMOV_RSLT_DONE        (1 << 1)  /* top pointer done */
 72#define DMOV_RSLT_USER        (1 << 0)  /* command with FR force result */
 73
 74#define DMOV_FLUSH0(ch)       DMOV_SD_AARM(0x080, ch)
 75#define DMOV_FLUSH1(ch)       DMOV_SD_AARM(0x0C0, ch)
 76#define DMOV_FLUSH2(ch)       DMOV_SD_AARM(0x100, ch)
 77#define DMOV_FLUSH3(ch)       DMOV_SD_AARM(0x140, ch)
 78#define DMOV_FLUSH4(ch)       DMOV_SD_AARM(0x180, ch)
 79#define DMOV_FLUSH5(ch)       DMOV_SD_AARM(0x1C0, ch)
 80
 81#define DMOV_STATUS(ch)       DMOV_SD_AARM(0x200, ch)
 82#define DMOV_STATUS_RSLT_COUNT(n)    (((n) >> 29))
 83#define DMOV_STATUS_CMD_COUNT(n)     (((n) >> 27) & 3)
 84#define DMOV_STATUS_RSLT_VALID       (1 << 1)
 85#define DMOV_STATUS_CMD_PTR_RDY      (1 << 0)
 86
 87#define DMOV_ISR              DMOV_SD_AARM(0x380, 0)
 88  
 89#define DMOV_CONFIG(ch)       DMOV_SD_AARM(0x300, ch)
 90#define DMOV_CONFIG_FORCE_TOP_PTR_RSLT (1 << 2)
 91#define DMOV_CONFIG_FORCE_FLUSH_RSLT   (1 << 1)
 92#define DMOV_CONFIG_IRQ_EN             (1 << 0)
 93
 94/* channel assignments */
 95
 96#define DMOV_NAND_CHAN        7
 97#define DMOV_NAND_CRCI_CMD    5
 98#define DMOV_NAND_CRCI_DATA   4
 99
100#define DMOV_SDC1_CHAN        8
101#define DMOV_SDC1_CRCI        6
102
103#define DMOV_SDC2_CHAN        8
104#define DMOV_SDC2_CRCI        7
105
106#define DMOV_TSIF_CHAN        10
107#define DMOV_TSIF_CRCI        10
108
109#define DMOV_USB_CHAN         11
110
111/* no client rate control ifc (eg, ram) */
112#define DMOV_NONE_CRCI        0
113
114
115/* If the CMD_PTR register has CMD_PTR_LIST selected, the data mover
116 * is going to walk a list of 32bit pointers as described below.  Each
117 * pointer points to a *array* of dmov_s, etc structs.  The last pointer
118 * in the list is marked with CMD_PTR_LP.  The last struct in each array
119 * is marked with CMD_LC (see below).
120 */
121#define CMD_PTR_ADDR(addr)  ((addr) >> 3)
122#define CMD_PTR_LP          (1 << 31) /* last pointer */
123#define CMD_PTR_PT          (3 << 29) /* ? */
124
125/* Single Item Mode */
126typedef struct {
127	unsigned cmd;
128	unsigned src;
129	unsigned dst;
130	unsigned len;
131} dmov_s;
132
133/* Scatter/Gather Mode */
134typedef struct {
135	unsigned cmd;
136	unsigned src_dscr;
137	unsigned dst_dscr;
138	unsigned _reserved;
139} dmov_sg;
140
141/* Box mode */
142typedef struct {
143	uint32_t cmd;
144	uint32_t src_row_addr;
145	uint32_t dst_row_addr;
146	uint32_t src_dst_len;
147	uint32_t num_rows;
148	uint32_t row_offset;
149} dmov_box;
150
151/* bits for the cmd field of the above structures */
152
153#define CMD_LC      (1 << 31)  /* last command */
154#define CMD_FR      (1 << 22)  /* force result -- does not work? */
155#define CMD_OCU     (1 << 21)  /* other channel unblock */
156#define CMD_OCB     (1 << 20)  /* other channel block */
157#define CMD_TCB     (1 << 19)  /* ? */
158#define CMD_DAH     (1 << 18)  /* destination address hold -- does not work?*/
159#define CMD_SAH     (1 << 17)  /* source address hold -- does not work? */
160
161#define CMD_MODE_SINGLE     (0 << 0) /* dmov_s structure used */
162#define CMD_MODE_SG         (1 << 0) /* untested */
163#define CMD_MODE_IND_SG     (2 << 0) /* untested */
164#define CMD_MODE_BOX        (3 << 0) /* untested */
165
166#define CMD_DST_SWAP_BYTES  (1 << 14) /* exchange each byte n with byte n+1 */
167#define CMD_DST_SWAP_SHORTS (1 << 15) /* exchange each short n with short n+1 */
168#define CMD_DST_SWAP_WORDS  (1 << 16) /* exchange each word n with word n+1 */
169
170#define CMD_SRC_SWAP_BYTES  (1 << 11) /* exchange each byte n with byte n+1 */
171#define CMD_SRC_SWAP_SHORTS (1 << 12) /* exchange each short n with short n+1 */
172#define CMD_SRC_SWAP_WORDS  (1 << 13) /* exchange each word n with word n+1 */
173
174#define CMD_DST_CRCI(n)     (((n) & 15) << 7)
175#define CMD_SRC_CRCI(n)     (((n) & 15) << 3)
176
177#endif