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/arch/arm/mach-exynos/include/mach/regs-gpio.h

https://github.com/AICP/kernel_google_msm
C Header | 40 lines | 19 code | 9 blank | 12 comment | 0 complexity | 22d0206bba5bd49d44f06de906643c64 MD5 | raw file
 1/* linux/arch/arm/mach-exynos4/include/mach/regs-gpio.h
 2 *
 3 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
 4 *		http://www.samsung.com
 5 *
 6 * EXYNOS4 - GPIO (including EINT) register definitions
 7 *
 8 * This program is free software; you can redistribute it and/or modify
 9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#ifndef __ASM_ARCH_REGS_GPIO_H
14#define __ASM_ARCH_REGS_GPIO_H __FILE__
15
16#include <mach/map.h>
17#include <mach/irqs.h>
18
19#define EINT_REG_NR(x)			(EINT_OFFSET(x) >> 3)
20#define EINT_CON(b, x)			(b + 0xE00 + (EINT_REG_NR(x) * 4))
21#define EINT_FLTCON(b, x)		(b + 0xE80 + (EINT_REG_NR(x) * 4))
22#define EINT_MASK(b, x)			(b + 0xF00 + (EINT_REG_NR(x) * 4))
23#define EINT_PEND(b, x)			(b + 0xF40 + (EINT_REG_NR(x) * 4))
24
25#define EINT_OFFSET_BIT(x)		(1 << (EINT_OFFSET(x) & 0x7))
26
27/* compatibility for plat-s5p/irq-pm.c */
28#define EXYNOS4_EINT40CON		(S5P_VA_GPIO2 + 0xE00)
29#define S5P_EINT_CON(x)			(EXYNOS4_EINT40CON + ((x) * 0x4))
30
31#define EXYNOS4_EINT40FLTCON0		(S5P_VA_GPIO2 + 0xE80)
32#define S5P_EINT_FLTCON(x)		(EXYNOS4_EINT40FLTCON0 + ((x) * 0x4))
33
34#define EXYNOS4_EINT40MASK		(S5P_VA_GPIO2 + 0xF00)
35#define S5P_EINT_MASK(x)		(EXYNOS4_EINT40MASK + ((x) * 0x4))
36
37#define EXYNOS4_EINT40PEND		(S5P_VA_GPIO2 + 0xF40)
38#define S5P_EINT_PEND(x)		(EXYNOS4_EINT40PEND + ((x) * 0x4))
39
40#endif /* __ASM_ARCH_REGS_GPIO_H */