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/arch/arm/mach-footbridge/include/mach/entry-macro.S

https://github.com/AICP/kernel_google_msm
Assembly | 107 lines | 83 code | 24 blank | 0 comment | 1 complexity | 0e4c25c8e08e4c041b3caf927ac064cd MD5 | raw file
  1/*
  2 * arch/arm/mach-footbridge/include/mach/entry-macro.S
  3 *
  4 * Low-level IRQ helper macros for footbridge-based platforms
  5 *
  6 * This file is licensed under  the terms of the GNU General Public
  7 * License version 2. This program is licensed "as is" without any
  8 * warranty of any kind, whether express or implied.
  9 */
 10#include <mach/hardware.h>
 11#include <mach/irqs.h>
 12#include <asm/hardware/dec21285.h>
 13
 14		.equ	dc21285_high, ARMCSR_BASE & 0xff000000
 15		.equ	dc21285_low, ARMCSR_BASE & 0x00ffffff
 16
 17		.macro  get_irqnr_preamble, base, tmp
 18		mov	\base, #dc21285_high
 19		.if	dc21285_low
 20		orr	\base, \base, #dc21285_low
 21		.endif
 22		.endm
 23
 24		.macro	get_irqnr_and_base, irqnr, irqstat, base, tmp
 25		ldr	\irqstat, [\base, #0x180]	@ get interrupts
 26
 27		mov	\irqnr, #IRQ_SDRAMPARITY
 28		tst	\irqstat, #IRQ_MASK_SDRAMPARITY
 29		bne	1001f
 30
 31		tst	\irqstat, #IRQ_MASK_UART_RX
 32		movne	\irqnr, #IRQ_CONRX
 33		bne	1001f
 34
 35		tst	\irqstat, #IRQ_MASK_DMA1
 36		movne	\irqnr, #IRQ_DMA1
 37		bne	1001f
 38
 39		tst	\irqstat, #IRQ_MASK_DMA2
 40		movne	\irqnr, #IRQ_DMA2
 41		bne	1001f
 42
 43		tst	\irqstat, #IRQ_MASK_IN0
 44		movne	\irqnr, #IRQ_IN0
 45		bne	1001f
 46
 47		tst	\irqstat, #IRQ_MASK_IN1
 48		movne	\irqnr, #IRQ_IN1
 49		bne	1001f
 50
 51		tst	\irqstat, #IRQ_MASK_IN2
 52		movne	\irqnr, #IRQ_IN2
 53		bne	1001f
 54
 55		tst	\irqstat, #IRQ_MASK_IN3
 56		movne	\irqnr, #IRQ_IN3
 57		bne	1001f
 58
 59		tst	\irqstat, #IRQ_MASK_PCI
 60		movne	\irqnr, #IRQ_PCI
 61		bne	1001f
 62
 63		tst	\irqstat, #IRQ_MASK_DOORBELLHOST
 64		movne	\irqnr, #IRQ_DOORBELLHOST
 65		bne     1001f
 66
 67		tst	\irqstat, #IRQ_MASK_I2OINPOST
 68		movne	\irqnr, #IRQ_I2OINPOST
 69		bne	1001f
 70
 71		tst	\irqstat, #IRQ_MASK_TIMER1
 72		movne	\irqnr, #IRQ_TIMER1
 73		bne	1001f
 74
 75		tst	\irqstat, #IRQ_MASK_TIMER2
 76		movne	\irqnr, #IRQ_TIMER2
 77		bne	1001f
 78
 79		tst	\irqstat, #IRQ_MASK_TIMER3
 80		movne	\irqnr, #IRQ_TIMER3
 81		bne	1001f
 82
 83		tst	\irqstat, #IRQ_MASK_UART_TX
 84		movne	\irqnr, #IRQ_CONTX
 85		bne	1001f
 86
 87		tst	\irqstat, #IRQ_MASK_PCI_ABORT
 88		movne	\irqnr, #IRQ_PCI_ABORT
 89		bne	1001f
 90
 91		tst	\irqstat, #IRQ_MASK_PCI_SERR
 92		movne	\irqnr, #IRQ_PCI_SERR
 93		bne	1001f
 94
 95		tst	\irqstat, #IRQ_MASK_DISCARD_TIMER
 96		movne	\irqnr, #IRQ_DISCARD_TIMER
 97		bne	1001f
 98
 99		tst	\irqstat, #IRQ_MASK_PCI_DPERR
100		movne	\irqnr, #IRQ_PCI_DPERR
101		bne	1001f
102
103		tst	\irqstat, #IRQ_MASK_PCI_PERR
104		movne	\irqnr, #IRQ_PCI_PERR
1051001:
106		.endm
107