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/arch/arm/mach-highbank/platsmp.c

https://github.com/AICP/kernel_google_msm
C | 78 lines | 38 code | 13 blank | 27 comment | 3 complexity | e3fa187f9f27342686e3beea6f79285e MD5 | raw file
 1/*
 2 * Copyright 2010-2011 Calxeda, Inc.
 3 * Based on platsmp.c, Copyright (C) 2002 ARM Ltd.
 4 *
 5 * This program is free software; you can redistribute it and/or modify it
 6 * under the terms and conditions of the GNU General Public License,
 7 * version 2, as published by the Free Software Foundation.
 8 *
 9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program.  If not, see <http://www.gnu.org/licenses/>.
16 */
17#include <linux/init.h>
18#include <linux/smp.h>
19#include <linux/io.h>
20
21#include <asm/smp_scu.h>
22#include <asm/hardware/gic.h>
23
24#include "core.h"
25
26extern void secondary_startup(void);
27
28void __cpuinit platform_secondary_init(unsigned int cpu)
29{
30	gic_secondary_init(0);
31}
32
33int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
34{
35	gic_raise_softirq(cpumask_of(cpu), 0);
36	return 0;
37}
38
39/*
40 * Initialise the CPU possible map early - this describes the CPUs
41 * which may be present or become present in the system.
42 */
43void __init smp_init_cpus(void)
44{
45	unsigned int i, ncores;
46
47	ncores = scu_get_core_count(scu_base_addr);
48
49	/* sanity check */
50	if (ncores > NR_CPUS) {
51		printk(KERN_WARNING
52		       "highbank: no. of cores (%d) greater than configured "
53		       "maximum of %d - clipping\n",
54		       ncores, NR_CPUS);
55		ncores = NR_CPUS;
56	}
57
58	for (i = 0; i < ncores; i++)
59		set_cpu_possible(i, true);
60
61	set_smp_cross_call(gic_raise_softirq);
62}
63
64void __init platform_smp_prepare_cpus(unsigned int max_cpus)
65{
66	int i;
67
68	scu_enable(scu_base_addr);
69
70	/*
71	 * Write the address of secondary startup into the jump table
72	 * The cores are in wfi and wait until they receive a soft interrupt
73	 * and a non-zero value to jump to. Then the secondary CPU branches
74	 * to this address.
75	 */
76	for (i = 1; i < max_cpus; i++)
77		highbank_set_cpu_jump(i, secondary_startup);
78}