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/arch/arm/mach-imx/imx27-dt.c

https://github.com/AICP/kernel_google_msm
C | 91 lines | 68 code | 13 blank | 10 comment | 0 complexity | 6d729bd0ad79ff454228610a9fbc2661 MD5 | raw file
 1/*
 2 * Copyright 2012 Sascha Hauer, Pengutronix
 3 *
 4 * The code contained herein is licensed under the GNU General Public
 5 * License. You may obtain a copy of the GNU General Public License
 6 * Version 2 or later at the following locations:
 7 *
 8 * http://www.opensource.org/licenses/gpl-license.html
 9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#include <linux/irq.h>
13#include <linux/irqdomain.h>
14#include <linux/of_irq.h>
15#include <linux/of_platform.h>
16#include <asm/mach/arch.h>
17#include <asm/mach/time.h>
18#include <mach/common.h>
19#include <mach/mx27.h>
20
21static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = {
22	OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART1_BASE_ADDR, "imx21-uart.0", NULL),
23	OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART2_BASE_ADDR, "imx21-uart.1", NULL),
24	OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART3_BASE_ADDR, "imx21-uart.2", NULL),
25	OF_DEV_AUXDATA("fsl,imx27-fec", MX27_FEC_BASE_ADDR, "imx27-fec.0", NULL),
26	OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
27	OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
28	OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI1_BASE_ADDR, "imx27-cspi.0", NULL),
29	OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI2_BASE_ADDR, "imx27-cspi.1", NULL),
30	OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI3_BASE_ADDR, "imx27-cspi.2", NULL),
31	OF_DEV_AUXDATA("fsl,imx27-wdt", MX27_WDOG_BASE_ADDR, "imx2-wdt.0", NULL),
32	{ /* sentinel */ }
33};
34
35static int __init imx27_avic_add_irq_domain(struct device_node *np,
36				struct device_node *interrupt_parent)
37{
38	irq_domain_add_legacy(np, 64, 0, 0, &irq_domain_simple_ops, NULL);
39	return 0;
40}
41
42static int __init imx27_gpio_add_irq_domain(struct device_node *np,
43				struct device_node *interrupt_parent)
44{
45	static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
46
47	gpio_irq_base -= 32;
48	irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
49				NULL);
50
51	return 0;
52}
53
54static const struct of_device_id imx27_irq_match[] __initconst = {
55	{ .compatible = "fsl,imx27-avic", .data = imx27_avic_add_irq_domain, },
56	{ .compatible = "fsl,imx27-gpio", .data = imx27_gpio_add_irq_domain, },
57	{ /* sentinel */ }
58};
59
60static void __init imx27_dt_init(void)
61{
62	of_irq_init(imx27_irq_match);
63
64	of_platform_populate(NULL, of_default_bus_match_table,
65			     imx27_auxdata_lookup, NULL);
66}
67
68static void __init imx27_timer_init(void)
69{
70	mx27_clocks_init_dt();
71}
72
73static struct sys_timer imx27_timer = {
74	.init = imx27_timer_init,
75};
76
77static const char *imx27_dt_board_compat[] __initdata = {
78	"fsl,imx27",
79	NULL
80};
81
82DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)")
83	.map_io		= mx27_map_io,
84	.init_early	= imx27_init_early,
85	.init_irq	= mx27_init_irq,
86	.handle_irq	= imx27_handle_irq,
87	.timer		= &imx27_timer,
88	.init_machine	= imx27_dt_init,
89	.dt_compat	= imx27_dt_board_compat,
90	.restart	= mxc_restart,
91MACHINE_END