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/arch/arm/mach-imx/mach-mx50_rdp.c

https://github.com/AICP/kernel_google_msm
C | 226 lines | 162 code | 29 blank | 35 comment | 0 complexity | a8c4e6f9164f8e2dde1c64184bb64116 MD5 | raw file
  1/*
  2 * Copyright (C) 2010 Freescale Semiconductor, Inc. All Rights Reserved.
  3 */
  4
  5/*
  6 * This program is free software; you can redistribute it and/or modify
  7 * it under the terms of the GNU General Public License as published by
  8 * the Free Software Foundation; either version 2 of the License, or
  9 * (at your option) any later version.
 10
 11 * This program is distributed in the hope that it will be useful,
 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 14 * GNU General Public License for more details.
 15
 16 * You should have received a copy of the GNU General Public License along
 17 * with this program; if not, write to the Free Software Foundation, Inc.,
 18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 19 */
 20
 21#include <linux/init.h>
 22#include <linux/platform_device.h>
 23#include <linux/gpio.h>
 24#include <linux/delay.h>
 25#include <linux/io.h>
 26
 27#include <mach/common.h>
 28#include <mach/hardware.h>
 29#include <mach/iomux-mx50.h>
 30
 31#include <asm/irq.h>
 32#include <asm/setup.h>
 33#include <asm/mach-types.h>
 34#include <asm/mach/arch.h>
 35#include <asm/mach/time.h>
 36
 37#include "devices-imx50.h"
 38
 39#define FEC_EN		IMX_GPIO_NR(6, 23)
 40#define FEC_RESET_B	IMX_GPIO_NR(4, 12)
 41
 42static iomux_v3_cfg_t mx50_rdp_pads[] __initdata = {
 43	/* SD1 */
 44	MX50_PAD_ECSPI2_SS0__GPIO_4_19,
 45	MX50_PAD_EIM_CRE__GPIO_1_27,
 46	MX50_PAD_SD1_CMD__SD1_CMD,
 47
 48	MX50_PAD_SD1_CLK__SD1_CLK,
 49	MX50_PAD_SD1_D0__SD1_D0,
 50	MX50_PAD_SD1_D1__SD1_D1,
 51	MX50_PAD_SD1_D2__SD1_D2,
 52	MX50_PAD_SD1_D3__SD1_D3,
 53
 54	/* SD2 */
 55	MX50_PAD_SD2_CD__GPIO_5_17,
 56	MX50_PAD_SD2_WP__GPIO_5_16,
 57	MX50_PAD_SD2_CMD__SD2_CMD,
 58	MX50_PAD_SD2_CLK__SD2_CLK,
 59	MX50_PAD_SD2_D0__SD2_D0,
 60	MX50_PAD_SD2_D1__SD2_D1,
 61	MX50_PAD_SD2_D2__SD2_D2,
 62	MX50_PAD_SD2_D3__SD2_D3,
 63	MX50_PAD_SD2_D4__SD2_D4,
 64	MX50_PAD_SD2_D5__SD2_D5,
 65	MX50_PAD_SD2_D6__SD2_D6,
 66	MX50_PAD_SD2_D7__SD2_D7,
 67
 68	/* SD3 */
 69	MX50_PAD_SD3_CMD__SD3_CMD,
 70	MX50_PAD_SD3_CLK__SD3_CLK,
 71	MX50_PAD_SD3_D0__SD3_D0,
 72	MX50_PAD_SD3_D1__SD3_D1,
 73	MX50_PAD_SD3_D2__SD3_D2,
 74	MX50_PAD_SD3_D3__SD3_D3,
 75	MX50_PAD_SD3_D4__SD3_D4,
 76	MX50_PAD_SD3_D5__SD3_D5,
 77	MX50_PAD_SD3_D6__SD3_D6,
 78	MX50_PAD_SD3_D7__SD3_D7,
 79
 80	/* PWR_INT */
 81	MX50_PAD_ECSPI2_MISO__GPIO_4_18,
 82
 83	/* UART pad setting */
 84	MX50_PAD_UART1_TXD__UART1_TXD,
 85	MX50_PAD_UART1_RXD__UART1_RXD,
 86	MX50_PAD_UART1_RTS__UART1_RTS,
 87	MX50_PAD_UART2_TXD__UART2_TXD,
 88	MX50_PAD_UART2_RXD__UART2_RXD,
 89	MX50_PAD_UART2_CTS__UART2_CTS,
 90	MX50_PAD_UART2_RTS__UART2_RTS,
 91
 92	MX50_PAD_I2C1_SCL__I2C1_SCL,
 93	MX50_PAD_I2C1_SDA__I2C1_SDA,
 94	MX50_PAD_I2C2_SCL__I2C2_SCL,
 95	MX50_PAD_I2C2_SDA__I2C2_SDA,
 96
 97	MX50_PAD_EPITO__USBH1_PWR,
 98	/* Need to comment below line if
 99	 * one needs to debug owire.
100	 */
101	MX50_PAD_OWIRE__USBH1_OC,
102	/* using gpio to control otg pwr */
103	MX50_PAD_PWM2__GPIO_6_25,
104	MX50_PAD_I2C3_SCL__USBOTG_OC,
105
106	MX50_PAD_SSI_RXC__FEC_MDIO,
107	MX50_PAD_SSI_RXFS__FEC_MDC,
108	MX50_PAD_DISP_D0__FEC_TXCLK,
109	MX50_PAD_DISP_D1__FEC_RX_ER,
110	MX50_PAD_DISP_D2__FEC_RX_DV,
111	MX50_PAD_DISP_D3__FEC_RXD1,
112	MX50_PAD_DISP_D4__FEC_RXD0,
113	MX50_PAD_DISP_D5__FEC_TX_EN,
114	MX50_PAD_DISP_D6__FEC_TXD1,
115	MX50_PAD_DISP_D7__FEC_TXD0,
116	MX50_PAD_I2C3_SDA__GPIO_6_23,
117	MX50_PAD_ECSPI1_SCLK__GPIO_4_12,
118
119	MX50_PAD_CSPI_SS0__CSPI_SS0,
120	MX50_PAD_ECSPI1_MOSI__CSPI_SS1,
121	MX50_PAD_CSPI_MOSI__CSPI_MOSI,
122	MX50_PAD_CSPI_MISO__CSPI_MISO,
123
124	/* SGTL500_OSC_EN */
125	MX50_PAD_UART1_CTS__GPIO_6_8,
126
127	/* SGTL_AMP_SHDN */
128	MX50_PAD_UART3_RXD__GPIO_6_15,
129
130	/* Keypad */
131	MX50_PAD_KEY_COL0__KEY_COL0,
132	MX50_PAD_KEY_ROW0__KEY_ROW0,
133	MX50_PAD_KEY_COL1__KEY_COL1,
134	MX50_PAD_KEY_ROW1__KEY_ROW1,
135	MX50_PAD_KEY_COL2__KEY_COL2,
136	MX50_PAD_KEY_ROW2__KEY_ROW2,
137	MX50_PAD_KEY_COL3__KEY_COL3,
138	MX50_PAD_KEY_ROW3__KEY_ROW3,
139	MX50_PAD_EIM_DA0__KEY_COL4,
140	MX50_PAD_EIM_DA1__KEY_ROW4,
141	MX50_PAD_EIM_DA2__KEY_COL5,
142	MX50_PAD_EIM_DA3__KEY_ROW5,
143	MX50_PAD_EIM_DA4__KEY_COL6,
144	MX50_PAD_EIM_DA5__KEY_ROW6,
145	MX50_PAD_EIM_DA6__KEY_COL7,
146	MX50_PAD_EIM_DA7__KEY_ROW7,
147	/*EIM pads */
148	MX50_PAD_EIM_DA8__GPIO_1_8,
149	MX50_PAD_EIM_DA9__GPIO_1_9,
150	MX50_PAD_EIM_DA10__GPIO_1_10,
151	MX50_PAD_EIM_DA11__GPIO_1_11,
152	MX50_PAD_EIM_DA12__GPIO_1_12,
153	MX50_PAD_EIM_DA13__GPIO_1_13,
154	MX50_PAD_EIM_DA14__GPIO_1_14,
155	MX50_PAD_EIM_DA15__GPIO_1_15,
156	MX50_PAD_EIM_CS2__GPIO_1_16,
157	MX50_PAD_EIM_CS1__GPIO_1_17,
158	MX50_PAD_EIM_CS0__GPIO_1_18,
159	MX50_PAD_EIM_EB0__GPIO_1_19,
160	MX50_PAD_EIM_EB1__GPIO_1_20,
161	MX50_PAD_EIM_WAIT__GPIO_1_21,
162	MX50_PAD_EIM_BCLK__GPIO_1_22,
163	MX50_PAD_EIM_RDY__GPIO_1_23,
164	MX50_PAD_EIM_OE__GPIO_1_24,
165};
166
167/* Serial ports */
168static const struct imxuart_platform_data uart_pdata __initconst = {
169	.flags = IMXUART_HAVE_RTSCTS,
170};
171
172static const struct fec_platform_data fec_data __initconst = {
173	.phy = PHY_INTERFACE_MODE_RMII,
174};
175
176static inline void mx50_rdp_fec_reset(void)
177{
178	gpio_request(FEC_EN, "fec-en");
179	gpio_direction_output(FEC_EN, 0);
180	gpio_request(FEC_RESET_B, "fec-reset_b");
181	gpio_direction_output(FEC_RESET_B, 0);
182	msleep(1);
183	gpio_set_value(FEC_RESET_B, 1);
184}
185
186static const struct imxi2c_platform_data i2c_data __initconst = {
187	.bitrate = 100000,
188};
189
190/*
191 * Board specific initialization.
192 */
193static void __init mx50_rdp_board_init(void)
194{
195	imx50_soc_init();
196
197	mxc_iomux_v3_setup_multiple_pads(mx50_rdp_pads,
198					ARRAY_SIZE(mx50_rdp_pads));
199
200	imx50_add_imx_uart(0, &uart_pdata);
201	imx50_add_imx_uart(1, &uart_pdata);
202	mx50_rdp_fec_reset();
203	imx50_add_fec(&fec_data);
204	imx50_add_imx_i2c(0, &i2c_data);
205	imx50_add_imx_i2c(1, &i2c_data);
206	imx50_add_imx_i2c(2, &i2c_data);
207}
208
209static void __init mx50_rdp_timer_init(void)
210{
211	mx50_clocks_init(32768, 24000000, 22579200);
212}
213
214static struct sys_timer mx50_rdp_timer = {
215	.init	= mx50_rdp_timer_init,
216};
217
218MACHINE_START(MX50_RDP, "Freescale MX50 Reference Design Platform")
219	.map_io = mx50_map_io,
220	.init_early = imx50_init_early,
221	.init_irq = mx50_init_irq,
222	.handle_irq = imx50_handle_irq,
223	.timer = &mx50_rdp_timer,
224	.init_machine = mx50_rdp_board_init,
225	.restart	= mxc_restart,
226MACHINE_END