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/arch/powerpc/boot/dts/ep405.dts

https://github.com/aicjofs/android_kernel_lge_v500_20d_f2fs
Device Tree | 230 lines | 179 code | 27 blank | 24 comment | 0 complexity | 1043a9336466519c8a39f1851d099a7b MD5 | raw file
  1/*
  2 * Device Tree Source for EP405
  3 *
  4 * Copyright 2007 IBM Corp.
  5 * Benjamin Herrenschmidt <benh@kernel.crashing.org>
  6 *
  7 * This file is licensed under the terms of the GNU General Public
  8 * License version 2.  This program is licensed "as is" without
  9 * any warranty of any kind, whether express or implied.
 10 */
 11
 12/dts-v1/;
 13
 14/ {
 15	#address-cells = <1>;
 16	#size-cells = <1>;
 17	model = "ep405";
 18	compatible = "ep405";
 19	dcr-parent = <&{/cpus/cpu@0}>;
 20
 21	aliases {
 22		ethernet0 = &EMAC;
 23		serial0 = &UART0;
 24		serial1 = &UART1;
 25	};
 26
 27	cpus {
 28		#address-cells = <1>;
 29		#size-cells = <0>;
 30
 31		cpu@0 {
 32			device_type = "cpu";
 33			model = "PowerPC,405GP";
 34			reg = <0x00000000>;
 35			clock-frequency = <200000000>; /* Filled in by zImage */
 36			timebase-frequency = <0>; /* Filled in by zImage */
 37			i-cache-line-size = <32>;
 38			d-cache-line-size = <32>;
 39			i-cache-size = <16384>;
 40			d-cache-size = <16384>;
 41			dcr-controller;
 42			dcr-access-method = "native";
 43		};
 44	};
 45
 46	memory {
 47		device_type = "memory";
 48		reg = <0x00000000 0x00000000>; /* Filled in by zImage */
 49	};
 50
 51	UIC0: interrupt-controller {
 52		compatible = "ibm,uic";
 53		interrupt-controller;
 54		cell-index = <0>;
 55		dcr-reg = <0x0c0 0x009>;
 56		#address-cells = <0>;
 57		#size-cells = <0>;
 58		#interrupt-cells = <2>;
 59	};
 60
 61	plb {
 62		compatible = "ibm,plb3";
 63		#address-cells = <1>;
 64		#size-cells = <1>;
 65		ranges;
 66		clock-frequency = <0>; /* Filled in by zImage */
 67
 68		SDRAM0: memory-controller {
 69			compatible = "ibm,sdram-405gp";
 70			dcr-reg = <0x010 0x002>;
 71		};
 72
 73		MAL: mcmal {
 74			compatible = "ibm,mcmal-405gp", "ibm,mcmal";
 75			dcr-reg = <0x180 0x062>;
 76			num-tx-chans = <1>;
 77			num-rx-chans = <1>;
 78			interrupt-parent = <&UIC0>;
 79			interrupts = <
 80				0xb 0x4 /* TXEOB */
 81				0xc 0x4 /* RXEOB */
 82				0xa 0x4 /* SERR */
 83				0xd 0x4 /* TXDE */
 84				0xe 0x4 /* RXDE */>;
 85		};
 86
 87		POB0: opb {
 88			compatible = "ibm,opb-405gp", "ibm,opb";
 89			#address-cells = <1>;
 90			#size-cells = <1>;
 91			ranges = <0xef600000 0xef600000 0x00a00000>;
 92			dcr-reg = <0x0a0 0x005>;
 93			clock-frequency = <0>; /* Filled in by zImage */
 94
 95			UART0: serial@ef600300 {
 96				device_type = "serial";
 97				compatible = "ns16550";
 98				reg = <0xef600300 0x00000008>;
 99				virtual-reg = <0xef600300>;
100				clock-frequency = <0>; /* Filled in by zImage */
101				current-speed = <9600>;
102				interrupt-parent = <&UIC0>;
103				interrupts = <0x0 0x4>;
104			};
105
106			UART1: serial@ef600400 {
107				device_type = "serial";
108				compatible = "ns16550";
109				reg = <0xef600400 0x00000008>;
110				virtual-reg = <0xef600400>;
111				clock-frequency = <0>; /* Filled in by zImage */
112				current-speed = <9600>;
113				interrupt-parent = <&UIC0>;
114				interrupts = <0x1 0x4>;
115			};
116
117			IIC: i2c@ef600500 {
118				compatible = "ibm,iic-405gp", "ibm,iic";
119				reg = <0xef600500 0x00000011>;
120				interrupt-parent = <&UIC0>;
121				interrupts = <0x2 0x4>;
122			};
123
124			GPIO: gpio@ef600700 {
125				compatible = "ibm,gpio-405gp";
126				reg = <0xef600700 0x00000020>;
127			};
128
129			EMAC: ethernet@ef600800 {
130				linux,network-index = <0x0>;
131				device_type = "network";
132				compatible = "ibm,emac-405gp", "ibm,emac";
133				interrupt-parent = <&UIC0>;
134				interrupts = <
135					0xf 0x4 /* Ethernet */
136					0x9 0x4 /* Ethernet Wake Up */>;
137				local-mac-address = [000000000000]; /* Filled in by zImage */
138				reg = <0xef600800 0x00000070>;
139				mal-device = <&MAL>;
140				mal-tx-channel = <0>;
141				mal-rx-channel = <0>;
142				cell-index = <0>;
143				max-frame-size = <1500>;
144				rx-fifo-size = <4096>;
145				tx-fifo-size = <2048>;
146				phy-mode = "rmii";
147				phy-map = <0x00000000>;
148			};
149
150		};
151
152		EBC0: ebc {
153			compatible = "ibm,ebc-405gp", "ibm,ebc";
154			dcr-reg = <0x012 0x002>;
155			#address-cells = <2>;
156			#size-cells = <1>;
157
158
159			/* The ranges property is supplied by the bootwrapper
160			 * and is based on the firmware's configuration of the
161			 * EBC bridge
162			 */
163			clock-frequency = <0>; /* Filled in by zImage */
164
165			/* NVRAM and RTC */
166			nvrtc@4,200000 {
167				compatible = "ds1742";
168				reg = <0x00000004 0x00200000 0x00000000>; /* size fixed up by zImage */
169			};
170
171			/* "BCSR" CPLD contains a PCI irq controller */
172			bcsr@4,0 {
173				compatible = "ep405-bcsr";
174				reg = <0x00000004 0x00000000 0x00000010>;
175				interrupt-controller;
176				/* Routing table */
177				irq-routing = [	00	/* SYSERR */
178						01	/* STTM */
179						01	/* RTC */
180						01	/* FENET */
181						02	/* NB PCIIRQ mux ? */
182						03	/* SB Winbond 8259 ? */
183						04	/* Serial Ring */
184						05	/* USB (ep405pc) */
185						06	/* XIRQ 0 */
186						06	/* XIRQ 1 */
187						06	/* XIRQ 2 */
188						06	/* XIRQ 3 */
189						06	/* XIRQ 4 */
190						06	/* XIRQ 5 */
191						06	/* XIRQ 6 */
192						07];	/* Reserved */
193			};
194		};
195
196		PCI0: pci@ec000000 {
197			device_type = "pci";
198			#interrupt-cells = <1>;
199			#size-cells = <2>;
200			#address-cells = <3>;
201			compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
202			primary;
203			reg = <0xeec00000 0x00000008	/* Config space access */
204			       0xeed80000 0x00000004	/* IACK */
205			       0xeed80000 0x00000004	/* Special cycle */
206			       0xef480000 0x00000040>;	/* Internal registers */
207
208			/* Outbound ranges, one memory and one IO,
209			 * later cannot be changed. Chip supports a second
210			 * IO range but we don't use it for now
211			 */
212			ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
213				  0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
214
215			/* Inbound 2GB range starting at 0 */
216			dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
217
218			/* That's all I know about IRQs on that thing ... */
219			interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
220			interrupt-map = <
221				/* USB */
222				0x7000 0x0 0x0 0x0 &UIC0 0x1e 0x8 /* IRQ5 */
223			>;
224		};
225	};
226
227	chosen {
228		linux,stdout-path = "/plb/opb/serial@ef600300";
229	};
230};