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/arch/arm/mach-iop13xx/include/mach/pci.h

https://github.com/AICP/kernel_google_msm
C Header | 57 lines | 48 code | 7 blank | 2 comment | 0 complexity | beca4d907475d630c23d95d9be0cbfe2 MD5 | raw file
 1#ifndef _IOP13XX_PCI_H_
 2#define _IOP13XX_PCI_H_
 3#include <linux/io.h>
 4#include <mach/irqs.h>
 5
 6struct pci_sys_data;
 7struct hw_pci;
 8int iop13xx_pci_setup(int nr, struct pci_sys_data *sys);
 9struct pci_bus *iop13xx_scan_bus(int nr, struct pci_sys_data *);
10void iop13xx_atu_select(struct hw_pci *plat_pci);
11void iop13xx_pci_init(void);
12void iop13xx_map_pci_memory(void);
13
14#define IOP_PCI_STATUS_ERROR (PCI_STATUS_PARITY |	     \
15			       PCI_STATUS_SIG_TARGET_ABORT | \
16			       PCI_STATUS_REC_TARGET_ABORT | \
17			       PCI_STATUS_REC_TARGET_ABORT | \
18			       PCI_STATUS_REC_MASTER_ABORT | \
19			       PCI_STATUS_SIG_SYSTEM_ERROR | \
20	 		       PCI_STATUS_DETECTED_PARITY)
21
22#define IOP13XX_ATUE_ATUISR_ERROR (IOP13XX_ATUE_STAT_HALT_ON_ERROR |  \
23				    IOP13XX_ATUE_STAT_ROOT_SYS_ERR |   \
24				    IOP13XX_ATUE_STAT_PCI_IFACE_ERR |  \
25				    IOP13XX_ATUE_STAT_ERR_COR |	       \
26				    IOP13XX_ATUE_STAT_ERR_UNCOR |      \
27				    IOP13XX_ATUE_STAT_CRS |	       \
28				    IOP13XX_ATUE_STAT_DET_PAR_ERR |    \
29				    IOP13XX_ATUE_STAT_EXT_REC_MABORT | \
30				    IOP13XX_ATUE_STAT_SIG_TABORT |     \
31				    IOP13XX_ATUE_STAT_EXT_REC_TABORT | \
32				    IOP13XX_ATUE_STAT_MASTER_DATA_PAR)
33
34#define IOP13XX_ATUX_ATUISR_ERROR (IOP13XX_ATUX_STAT_TX_SCEM |        \
35				    IOP13XX_ATUX_STAT_REC_SCEM |       \
36				    IOP13XX_ATUX_STAT_TX_SERR |	       \
37				    IOP13XX_ATUX_STAT_DET_PAR_ERR |    \
38				    IOP13XX_ATUX_STAT_INT_REC_MABORT | \
39				    IOP13XX_ATUX_STAT_REC_SERR |       \
40				    IOP13XX_ATUX_STAT_EXT_REC_MABORT | \
41				    IOP13XX_ATUX_STAT_EXT_REC_TABORT | \
42				    IOP13XX_ATUX_STAT_EXT_SIG_TABORT | \
43				    IOP13XX_ATUX_STAT_MASTER_DATA_PAR)
44
45/* PCI interrupts
46 */
47#define ATUX_INTA IRQ_IOP13XX_XINT0
48#define ATUX_INTB IRQ_IOP13XX_XINT1
49#define ATUX_INTC IRQ_IOP13XX_XINT2
50#define ATUX_INTD IRQ_IOP13XX_XINT3
51
52#define ATUE_INTA IRQ_IOP13XX_ATUE_IMA
53#define ATUE_INTB IRQ_IOP13XX_ATUE_IMB
54#define ATUE_INTC IRQ_IOP13XX_ATUE_IMC
55#define ATUE_INTD IRQ_IOP13XX_ATUE_IMD
56
57#endif /* _IOP13XX_PCI_H_ */