PageRenderTime 24ms CodeModel.GetById 14ms app.highlight 2ms RepoModel.GetById 5ms app.codeStats 0ms

/arch/powerpc/boot/dts/mpc8572ds.dts

https://github.com/aicjofs/android_kernel_lge_v500_20d
Device Tree | 90 lines | 62 code | 14 blank | 14 comment | 0 complexity | 44e64cf8bb1c79de31087d2a820dbd44 MD5 | raw file
 1/*
 2 * MPC8572 DS Device Tree Source
 3 *
 4 * Copyright 2007-2009 Freescale Semiconductor Inc.
 5 *
 6 * This program is free software; you can redistribute  it and/or modify it
 7 * under  the terms of  the GNU General  Public License as published by the
 8 * Free Software Foundation;  either version 2 of the  License, or (at your
 9 * option) any later version.
10 */
11
12/include/ "fsl/mpc8572si-pre.dtsi"
13
14/ {
15	model = "fsl,MPC8572DS";
16	compatible = "fsl,MPC8572DS";
17
18	memory {
19		device_type = "memory";
20	};
21
22	board_lbc: lbc: localbus@ffe05000 {
23		reg = <0 0xffe05000 0 0x1000>;
24
25		ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
26			  0x1 0x0 0x0 0xe0000000 0x08000000
27			  0x2 0x0 0x0 0xffa00000 0x00040000
28			  0x3 0x0 0x0 0xffdf0000 0x00008000
29			  0x4 0x0 0x0 0xffa40000 0x00040000
30			  0x5 0x0 0x0 0xffa80000 0x00040000
31			  0x6 0x0 0x0 0xffac0000 0x00040000>;
32	};
33
34	board_soc: soc: soc8572@ffe00000 {
35		ranges = <0x0 0 0xffe00000 0x100000>;
36	};
37
38	board_pci0: pci0: pcie@ffe08000 {
39		reg = <0 0xffe08000 0 0x1000>;
40		ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
41			  0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x00010000>;
42		pcie@0 {
43			ranges = <0x2000000 0x0 0x80000000
44				  0x2000000 0x0 0x80000000
45				  0x0 0x20000000
46
47				  0x1000000 0x0 0x0
48				  0x1000000 0x0 0x0
49				  0x0 0x10000>;
50		};
51	};
52
53	pci1: pcie@ffe09000 {
54		reg = <0 0xffe09000 0 0x1000>;
55		ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
56			  0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x00010000>;
57		pcie@0 {
58			ranges = <0x2000000 0x0 0xa0000000
59				  0x2000000 0x0 0xa0000000
60				  0x0 0x20000000
61
62				  0x1000000 0x0 0x0
63				  0x1000000 0x0 0x0
64				  0x0 0x10000>;
65		};
66	};
67
68	pci2: pcie@ffe0a000 {
69		reg = <0 0xffe0a000 0 0x1000>;
70		ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
71			  0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x00010000>;
72		pcie@0 {
73			ranges = <0x2000000 0x0 0xc0000000
74				  0x2000000 0x0 0xc0000000
75				  0x0 0x20000000
76
77				  0x1000000 0x0 0x0
78				  0x1000000 0x0 0x0
79				  0x0 0x10000>;
80		};
81	};
82};
83
84/*
85 * mpc8572ds.dtsi must be last to ensure board_pci0 overrides pci0 settings
86 * for interrupt-map & interrupt-map-mask
87 */
88
89/include/ "fsl/mpc8572si-post.dtsi"
90/include/ "mpc8572ds.dtsi"