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/arch/arm/mach-iop32x/include/mach/iop32x.h

https://github.com/AICP/kernel_google_msm
C Header | 35 lines | 9 code | 5 blank | 21 comment | 0 complexity | 729ca6fb05a6505218069d979081b5c9 MD5 | raw file
 1/*
 2 * arch/arm/mach-iop32x/include/mach/iop32x.h
 3 *
 4 * Intel IOP32X Chip definitions
 5 *
 6 * Author: Rory Bolt <rorybolt@pacbell.net>
 7 * Copyright (C) 2002 Rory Bolt
 8 * Copyright (C) 2004 Intel Corp.
 9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15#ifndef __IOP32X_H
16#define __IOP32X_H
17
18/*
19 * Peripherals that are shared between the iop32x and iop33x but
20 * located at different addresses.
21 */
22#define IOP3XX_GPIO_REG(reg)	(IOP3XX_PERIPHERAL_VIRT_BASE + 0x07c4 + (reg))
23#define IOP3XX_TIMER_REG(reg)	(IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg))
24
25#include <asm/hardware/iop3xx.h>
26
27/* ATU Parameters
28 * set up a 1:1 bus to physical ram relationship
29 * w/ physical ram on top of pci in the memory map
30 */
31#define IOP32X_MAX_RAM_SIZE            0x40000000UL
32#define IOP3XX_MAX_RAM_SIZE            IOP32X_MAX_RAM_SIZE
33#define IOP3XX_PCI_LOWER_MEM_BA        0x80000000
34
35#endif