/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts

 1/*
 2 * P1020 RDB  Core0 Device Tree Source in CAMP mode.
 3 *
 4 * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
 5 * can be shared, all the other devices must be assigned to one core only.
 6 * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb,
 7 * eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi.
 8 *
 9 * Please note to add "-b 0" for core0's dts compiling.
10 *
11 * Copyright 2011 Freescale Semiconductor Inc.
12 *
13 * This program is free software; you can redistribute  it and/or modify it
14 * under  the terms of  the GNU General  Public License as published by the
15 * Free Software Foundation;  either version 2 of the  License, or (at your
16 * option) any later version.
17 */
18
19/include/ "p1020rdb.dts"
20
21/ {
22	model = "fsl,P1020RDB";
23	compatible = "fsl,P1020RDB", "fsl,MPC85XXRDB-CAMP";
24
25	aliases {
26		ethernet1 = &enet1;
27		ethernet2 = &enet2;
28		serial0 = &serial0;
29		pci0 = &pci0;
30		pci1 = &pci1;
31	};
32
33	cpus {
34		PowerPC,P1020@1 {
35			status = "disabled";
36		};
37	};
38
39	memory {
40		device_type = "memory";
41	};
42
43	localbus@ffe05000 {
44		status = "disabled";
45	};
46
47	soc@ffe00000 {
48		serial1: serial@4600 {
49			status = "disabled";
50		};
51
52		enet0: ethernet@b0000 {
53			status = "disabled";
54		};
55
56		mpic: pic@40000 {
57			protected-sources = <
58			42 29 30 34	/* serial1, enet0-queue-group0 */
59			17 18 24 45	/* enet0-queue-group1, crypto */
60			>;
61		};
62	};
63};