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/arch/arm/mach-iop33x/include/mach/iop33x.h

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C Header | 41 lines | 13 code | 7 blank | 21 comment | 0 complexity | 5ac1f08c54af7a4efbef1588e9c015f8 MD5 | raw file
 1/*
 2 * arch/arm/mach-iop33x/include/mach/iop33x.h
 3 *
 4 * Intel IOP33X Chip definitions
 5 *
 6 * Author: Dave Jiang (dave.jiang@intel.com)
 7 * Copyright (C) 2003, 2004 Intel Corp.
 8 *
 9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#ifndef __IOP33X_H
15#define __IOP33X_H
16
17/*
18 * Peripherals that are shared between the iop32x and iop33x but
19 * located at different addresses.
20 */
21#define IOP3XX_GPIO_REG(reg)	(IOP3XX_PERIPHERAL_VIRT_BASE + 0x1780 + (reg))
22#define IOP3XX_TIMER_REG(reg)	(IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg))
23
24#include <asm/hardware/iop3xx.h>
25
26/* UARTs  */
27#define IOP33X_UART0_PHYS	(IOP3XX_PERIPHERAL_PHYS_BASE + 0x1700)
28#define IOP33X_UART0_VIRT	(IOP3XX_PERIPHERAL_VIRT_BASE + 0x1700)
29#define IOP33X_UART1_PHYS	(IOP3XX_PERIPHERAL_PHYS_BASE + 0x1740)
30#define IOP33X_UART1_VIRT	(IOP3XX_PERIPHERAL_VIRT_BASE + 0x1740)
31
32/* ATU Parameters
33 * set up a 1:1 bus to physical ram relationship
34 * w/ pci on top of physical ram in memory map
35 */
36#define IOP33X_MAX_RAM_SIZE		0x80000000UL
37#define IOP3XX_MAX_RAM_SIZE		IOP33X_MAX_RAM_SIZE
38#define IOP3XX_PCI_LOWER_MEM_BA	(PHYS_OFFSET + IOP33X_MAX_RAM_SIZE)
39
40
41#endif